Jobs

Interviews
Job Alerts
Tools

Upskill and Grow with AI

Mock Interview Practice interviews in realistic simulations

Coding Practice Improve your coding skills with challenges

Certification Earn certifications to validate your skills

AI Learning Get trained with AI expert sessions

Career Path AI insights for smarter career decisions

AI Job Match Score AI-Powered Job Match Against Your Resume and Optimize Your Resume

Career Tools and Resources

Resume Builder Build Professional Resume with Ease

ATS Friendliness Check Check Resume Friendliness for Applicant Tracking Systems

Auto Apply Apply to hundreds of jobs on any platform effortlessly

Co-Pilot (Chrome Extension) Your AI Assistant for Seamless Browsing Efficiency

Interview Questions Streamline interviews with ready-to-use questions

Salaries Discover market-driven salary insights across skillsets and geographies

Companies Explore leading companies actively hiring talent
For Employers

Home

Jobs

Home
>
Jobs in Bengaluru
>
Quest Global Technologies
>
Senior Engineer - Analog Design

Senior Engineer - Analog Design

Quest Global Technologies

4 - 8 years

7 - 12 Lacs

Bengaluru

Posted:1 day ago| Platform:

Apply

Skills Required

Prototype Simulation Pumps Digital design Project management Analog Circuit designing Verilog MATLAB Physical design

Work Mode

Work from Office

Job Type

Full Time

Job Description

Design, simulate, and verify transistor-level analog circuits for Phase-Locked Loops (PLLs), including key blocks such as VCOs, charge pumps, loop filters, and phase/frequency detectors. Collaborate with cross-functional teams to integrate PLLs into advanced semiconductor products and ensure high performance and reliability.

Key Responsibilities:

- Design and develop analog PLL circuits at the transistor level, focusing on VCOs, charge pumps, loop filters, and phase/frequency detectors.

- Use CADENCE simulation tools, MATLAB for circuit design, modeling, and verification.

- Perform circuit simulations to validate functionality, performance, and reliability; optimize designs based on simulation and test results.

- Collaborate with layout engineers to ensure robust physical design, addressing parasitics, noise, and signal integrity.

- Develop and execute test plans for prototype validation; analyze test data and iterate on designs as needed.

- Document design specifications, schematics, simulation results, and test reports; participate in design reviews.

Qualifications:

- Bachelor or Master degree in Electrical Engineering or related field.

- Strong understanding of analog and mixed-signal circuit design, with direct experience in PLL architectures and transistor-level design.

- Excellent problem-solving, documentation, and communication skills.

- 3+ years of relevant experience preferred; advanced degrees or additional experience are advantageous.

Preferred Skills:

- Experience with high-frequency PLLs (e. g. , > 10GHz), spread-spectrum clocks, or advanced CMOS/FinFET processes[2][3].

- Familiarity with digital design tools (e. g. , Verilog) and mixed-signal integration[2][3].

- Project management and mentoring abilities are a plus[3].

Role:

Key Responsibilities:

- Design and develop analog PLL circuits at the transistor level, focusing on VCOs, charge pumps, loop filters, and phase/frequency detectors.

- Use CADENCE simulation tools, MATLAB for circuit design, modeling, and verification.

- Perform circuit simulations to validate functionality, performance, and reliability; optimize designs based on simulation and test results.

- Collaborate with layout engineers to ensure robust physical design, addressing parasitics, noise, and signal integrity.

- Develop and execute test plans for prototype validation; analyze test data and iterate on designs as needed.

- Document design specifications, schematics, simulation results, and test reports; participate in design reviews.

Qualifications:

- Bachelor or Master degree in Electrical Engineering or related field.

- Strong understanding of analog and mixed-signal circuit design, with direct experience in PLL architectures and transistor-level design.

- Excellent problem-solving, documentation, and communication skills.

- 3+ years of relevant experience preferred; advanced degrees or additional experience are advantageous.

Preferred Skills:

- Experience with high-frequency PLLs (e. g. , > 10GHz), spread-spectrum clocks, or advanced CMOS/FinFET processes[2][3].

- Familiarity with digital design tools (e. g. , Verilog) and mixed-signal integration[2][3].

- Project management and mentoring abilities are a plus[3].

More Jobs at Quest Global Technologies

Design Engineer - Electrical

Chennai

2.0 - 4.0 yrs

INR 5 - 6 Lacs

Design Engineer - Electrical

Chennai

2.0 - 4.0 yrs

INR 5 - 6 Lacs

Windowss C++ C# developer(3-6)

Pune

5.0 - 8.0 yrs

INR 5 - 9 Lacs

Senior Lead Engineer

Thiruvananthapuram

6.0 - 11.0 yrs

INR 11 - 15 Lacs

Coker Process Surveillance Engineer

Bengaluru

5.0 - 6.0 yrs

INR 7 - 8 Lacs

Mock Interview

Practice Video Interview with JobPe AI

Start Job-Specific Interview

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.

Job Application AI Bot

Apply to 20+ Portals in one click

Download Now

Download the Mobile App

Instantly access job listings, apply easily, and track applications.

Enhance Your Skills

Practice coding challenges to boost your skills

Start Practicing Now

Quest Global Technologies

Engineering Services

San Jose

Login to

Please Verify Your Phone or Email

Confirm Action

Search

Profile

Upskill and Grow with AI

Senior Engineer - Analog Design