Senior ASIC CAD Engineer

Job Description

The SoC and 3D-IC design construction CAD team provides automated environments for industry leading technologies and complex 3D stack products across the AMD portfolio The flows provide end-to-end automation for users across design planning, implementation, and analysis Experience with Verilog, clock and power distributions, high-performance bus implementation, and timing budgeting is preferred The role will be a part of a global team working in concert with project design teams from North America, China, and India You will work directly with the global CAD organization and project teams to understand the design requirements and deliver innovative solutions using EDA tools and custom in-house capabilities Individuals should have a strong silicon hardware design background and be proficient in software and scripting development 3D die-stack planning, integration, and routing Chip-to-chip and chip-to-package interface planning and implementation Bump/bond and TSV planning and layout Connectivity and DRC verification Design for signal integrity and thermal robustness Routing techniques for die-to-die communication protocols such as HBM and UCIe THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills, eager to learn, and ready to take on problems. KEY RESPONSIBILITIES: Work closely with CAD implementation members to deliver high quality tools and flows that meet all the key metrics of QoR: Manufacturability, Reliability, Timing, Area, and Performance. Regress methodology and develop capabilities to improve quality. Develop the strategy and key initiatives to ensure the CAD flows meet the future design needs and the most advances technologies. PREFERRED EXPERIENCE: 3-5 years experience in Silicon design or CAD/EDA development Understanding of EDA tools from Synopsys and Cadence Synopsys 3DIC Compiler experience is a plus Proficient in programming with Python and Linux Familiar in automating workflows in a distributed compute environment. Excellent communication skills (both written and oral). ACADEMIC CREDENTIALS: Bachelors or Masters degree in Computer Engineering/Electrical Engineering