Senior Analog Circuit Designer

Job Description

What You'll Be Doing: Review SerDes standards to develop novel transceiver architectures and sub-block specifications. Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets. Work across project and department teams to streamline design and verification strategies ensuring overall design quality, efficiency, and performance. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present and review simulation data from internal project teams; present results externally at industry panels or customer reviews. Document design features and test plans; consult on the overall electrical characterization of the SerDes IP product. Analyze customer silicon data for design enhancements and propose solutions for post-silicon design updates. The Impact You Will Have: Contribute to the development of cutting-edge Multi-Gbps NRZ & PAM4 SERDES IP, shaping the future of high-speed communication technology. Drive revolutionary improvements in power, area, and performance, enhancing the overall efficiency and effectiveness of our designs. Streamline design and verification strategies across teams, fostering a collaborative and innovative work environment. Ensure high-quality design and performance through meticulous oversight of physical layouts and awareness of design for reliability and signal integrity issues. Enhance customer satisfaction by analyzing silicon data and proposing effective design updates. Represent Synopsys at industry panels and customer reviews, showcasing our commitment to excellence and innovation. What You'll Need: MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical Engineering, Computer Engineering, or a related field. Experience with FinFET technologies and a strong understanding of transistor-level circuit design and CMOS fundamentals. Extensive design experience with high-speed designs, including PAM4 SerDes architectures and various SerDes sub-circuits. Familiarity with tools for schematic entry, physical layout, design verification, and SPICE simulators. Exposure to scripting for post-processing of simulation results (e.g., TCL, PERL, MATLAB).