Posted:3 days ago|
Platform:
On-site
Full Time
Experience : 2-4 years
Location : Hyderabad
FPGA architecture
Vivado Flow
Scripting and automation
Verilog / VHDL
HW debugging
Interested,please share your updated resume to [HIDDEN TEXT]
ACL Digital
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hyderabad, telangana, india
Salary: Not disclosed
