Name: Jobpe
Address: T-Hub, Plot No 1/C, Sy No 83/1, Raidurgam panmaktha, Knowledge City Rd, Hyderabad, Telangana, 500081, IN
Telephone: +91-83339-09630
Price range: Free

Embedded System Engineer LeadSoc Technologies Pvt Ltd

8.0 - 12.0 years

0 Lacs

hyderabad, telangana

On-site

As a Senior Embedded Systems Engineer specializing in DDR (Double Data Rate) and LPDDR (Low Power Double Data Rate) memory technologies, you will be responsible for designing, developing, optimizing, and debugging memory subsystems for embedded platforms. Your role will involve architecting and developing DDR/LPDDR memory controllers, working on memory initialization, configuration, and tuning, analyzing and optimizing latency, bandwidth, and power consumption, as well as implementing error detection and correction mechanisms for reliability. You will also be tasked with debugging memory timing issues, bus contention, and signal integrity problems using oscilloscope and logic analyzers, optimizing memory access patterns to enhance overall system throughput, and developing power management techniques for LPDDR to optimize energy efficiency in low-power embedded systems. Additionally, you will work on developing low-level firmware, bootloader configurations, and memory initialization scripts for embedded platforms, implementing memory drivers in C/C++ for real-time operating systems (RTOS) or bare-metal environments, and collaborating with software teams to integrate memory controller firmware into embedded applications. In this role, you will collaborate with hardware engineers for PCB design, memory routing, and signal integrity analysis, perform hardware bring-up and validation of DDR/LPDDR components, work with SoC vendors and memory manufacturers to ensure compatibility and performance compliance, and develop and execute memory stress tests to validate reliability under different conditions. You will also use JTAG, debuggers, and oscilloscopes to troubleshoot and analyze memory-related issues and perform thermal and power analysis to ensure compliance with design specifications. The ideal candidate for this position should have a strong expertise in DDR/LPDDR memory technologies, including LPDDR2/LPDDR3/LPDDR4/LPDDR5, in-depth knowledge of memory controllers, PHY, DRAM refresh mechanisms, and clock synchronization, proficiency in low-level programming (C, C++) for embedded systems, experience with real-time operating systems (RTOS) such as FreeRTOS, QNX, or VxWorks, and an understanding of memory power management techniques for mobile and battery-powered devices. Additionally, hands-on experience with memory performance benchmarking tools and techniques, experience in debugging tools such as JTAG, Lauterbach, and oscilloscopes, and familiarity with SoC architecture, ARM processors, and bus protocols (AXI, AHB, SPI, I2C, PCIe) are desired skills. Soft skills such as strong problem-solving and analytical skills, excellent communication and documentation skills, ability to work collaboratively in cross-functional teams, attention to detail, and a proactive approach to debugging and optimization are also important for this role. Preferred qualifications include experience with high-speed PCB layout and signal integrity analysis tools, knowledge of AI/ML-based memory optimization techniques, familiarity with secure boot and memory encryption mechanisms, and prior experience working with memory manufacturers (Samsung, Micron, SK Hynix, etc.). This role offers the opportunity to work on cutting-edge embedded memory technologies, optimizing DDR/LPDDR performance for next-generation devices. You will collaborate with industry experts, tackle complex system challenges, and contribute to innovative solutions in high-performance and low-power computing.,

Posted 6 days ago

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Memory (DDR) Enablement Lead AMD

10.0 - 20.0 years

5 - 9 Lacs

Bengaluru, Karnataka, India

On-site

THE PERSON: As a Systems Design Engineer, you will drive balanced, scalable, and automated solutions. In this high visibility position, your software systems engineering expertise will be necessary towardsproduct development, definition, and root cause resolution. KEY RESPONSIBILITIES: Develop functional validation plans for DDR controller features, align cross-functional teams on the support and validation plans. Develop functional validation plans for RAS features (Reliability Availability Serviceability), align cross-functional teams (BIOS/firmware) on the support and validation plans Drive debug in post silicon, root-cause problems and steer the team to the best corrective action to move forward. Able to work as a team and work efficiently in a dynamic environment and on multiple projects. Develop scripts in python & automate test cases/debug scripts. PREFERRED EXPERIENCE: 10+ years of relevent experience. Solid understanding of basics electronics. Good understanding of DDR4/5, LPDDR4/5 functionalities. Functional & Margining testing experience in DDR or other HSIOs. Must be a self-starter, and able to independently drive tasks to completion with minimum guidance . Ability to apply knowledge of other high-speed, high-performance memory technologies. Hands-on experience in using industry standard JTAG, I2C, Tester and Lab tools. Should be able to use oscilloscopes, logical analyzers, power supply & thermal equipment. Should be able to read/understand schematics & layout. Experience with system validation with x86 processors is a plus. ACADEMIC CREDENTIALS: Bachelors orMaster'sdegree in electrical or computer engineering

Posted 1 month ago

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