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ASIC RTL Engineer, Integration

Google

8.0 - 10.0 years

Bengaluru, Karnataka, India

On-site

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with digital reasoning design principles, RTL design concepts, and languages like Verilog or SystemVerilog. Experience with micro-architecture and coding in one or more of these areas: memory compression, interconnects, coherence, cache, Dynamic Random Access Memory (DRAM) controller, Physical Layer Devices (PHYs). Experience in performance design, multi power domains with clocking. Experience with multiple System on a chip (SoCs). Preferred qualifications: Master's degree or PhD in Electrical Engineering, C...

Posted 2 weeks ago

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