GFX sub-system/ Power Management verification

As a Senior Silicon Design Engineer (SMTS) at AMD, you will be an integral part of the GFX sub-system (Graphics Power Management) verification team. Your role will involve collaborating with lead architects and block design teams to understand the features to be implemented and verified. You will be responsible for developing robust test plans for both synthetic and real workload trace, debugging verification test failures, and ensuring that the design meets functional, performance, and power expectations. To excel in this role, you must have a strong background in ASIC design and be proficient in debugging Verilog RTL code using simulation/emulation tools. Your analytical thinking and problem-solving skills, attention to detail, and ability to work effectively with diverse teams will be crucial for success. Additionally, having good English communication skills, both verbal and written, is essential. Preferred qualifications for this position include a minimum of 12 years of experience in ASIC verification, proficiency in Verilog, System Verilog, UVM methodologies, and C/C++ programming. A solid academic background with a B.E/B.Tech or M.E/M.Tech degree in ECE/Electrical Engineering/Computer Engineering with Digital Systems/VLSI as a major is required. Candidates with graphics pipeline experience and deep knowledge of computer architecture will be given preference. Being a self-starter who can independently drive tasks to completion, while also possessing strong teamwork and interpersonal skills, is essential for this role. This position is based in Hyderabad, India. If you are looking to be part of a dynamic team that is dedicated to pushing the limits of innovation and solving the world's most important challenges, then AMD is the place for you. Join us in advancing technology and making a meaningful impact in the industry, communities, and the world.,