FPGA Validation Engineers and Leads

3 - 7 years

0 Lacs

Posted:1 week ago| Platform: Shine logo

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On-site

Job Type

Full Time

Job Description

As an FPGA validation engineer at UST, you will be responsible for validating FPGA designs with experience in PCIe 4/5, DDR 4/5, or USB3. Your key responsibilities will include: - Hands-on experience working with DSO and Logic Analyzers - Board-level debugging knowledge required for leads and senior members - Proficiency in embedded C and RTL coding for some team members - Basic knowledge of ARM Cortex-M3 or Risc-V will be helpful If interested, please share your resume to jayalakshmi.r2@ust.com. Regards, Jaya,

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IT Services and IT Consulting

Aliso Viejo CA

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