4.0 - 9.0 years

2 - 20 Lacs

hyderabad, telangana, india

On-site

Job Description ROLE & RESPONSIBILITIES: Incumbent will be responsible for Scan insertion and validation, BIST, MBIST insertion and validation, ATPG, IP Tests and Pattern validation w/wo Timing, DFT mode timing Analysis and sign off. Be responsible for a comprehensive DFT plan. Incumbent to work with DFT and cross functional teams. To architect and implement solutions for Scan and built-in self-test (Memory and Logic BIST) circuitry to test devices in the field. ESSENTIAL SKILLS & EXPERIENCE: Strong fundamentals on DFT and ASIC cycle. Sound expertise in Tcl, Perl, Shell scripting. Technically sound & good team player. Hands-on experience with DFT implementation using standard EDA and flow is...

Posted 7 hours ago

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Functional Safety Engineer, Silicon Waymo

8.0 - 12.0 years

0 Lacs

karnataka

On-site

Role Overview: Waymo is seeking a talented individual to join their Compute Team in Bengaluru, Karnataka, India. As part of the team, you will be responsible for defining functional safety architectures, features, and mechanisms for fault detection, isolation, and recovery at the hardware level. Your role will involve collaborating with cross-functional teams to ensure alignment in requirements and integration of safety features. In this hybrid role, you will report to a Silicon Design Lead and may need to work some hours aligned with the Pacific Time zone. Key Responsibilities: - Define functional safety architectures, features, and mechanisms for fault detection, isolation, and recovery at...

Posted 4 days ago

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Senior DFT Engineer, Google Cloud Google

3.0 - 7.0 years

0 Lacs

karnataka

On-site

Minimum qualifications: You should hold a Bachelor's degree in Electrical Engineering, a related field, or possess equivalent practical experience. Additionally, you must have at least 5 years of experience in DFT specification definition architecture and insertion. A minimum of 3 years of experience using electronic design automation (EDA) test tools (e.g., Spyglass, Tessent) is required. Your background should also include experience with ASIC DFT synthesis, STA, simulation, and verification flow. It is essential to have experience collaborating with ATE engineers, involving tasks such as silicon bring-up, patterns generation, debug, validation on automatic test equipment, and resolution o...

Posted 2 months ago

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VLSI MBIST Engineer Coventine Digital

4.0 - 8.0 years

5 - 15 Lacs

Bengaluru

Work from Office

Job Description : We are looking for a VLSI MBIST Engineer with strong expertise in Memory Built-In Self-Test (MBIST) methodologies for ASIC/SoC designs. The ideal candidate should have hands-on experience using Synopsys SMS tool and a solid understanding of MBIST test development, pattern generation, and fault simulation. Key Responsibilities : Develop and implement MBIST algorithms and test patterns for embedded memories (SRAM, DRAM, ROM, CAM) Use Synopsys SMS tool for MBIST pattern generation and validation Perform fault modeling, fault simulation, and fault coverage analysis Integrate MBIST macros into SoC designs in collaboration with RTL and physical design teams Debug MBIST issues in ...

Posted 2 months ago

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Structural Geologist ( Reservoir Characterization) Consult Asia

10.0 - 15.0 years

35 - 50 Lacs

Bengaluru

Work from Office

Deliver structural interpretation and fault framework modeling to evaluate reservoir trap geometry, seal integrity, and compartmentalization using seismic and wellbore data Required Candidate profile Geoscientists with strong skills in seismic interpretation, fault modeling, and structural analysis. Ability to contribute to exploration, basin modeling, and field development projects

Posted 3 months ago

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