Emulation Engineer (Zebu)

verify and validate complex chip designs

Key responsibilities would include:

• Porting and compiling

  ASIC/IP RTL (written in languages like SystemVerilog or Verilog) onto the

  Zebu

  platform.

• Debugging

  hardware and software issues on the emulation platform.

• Developing and executing

  full-chip/System-on-a-Chip (SoC) tests.

• Automating

  emulation workflows and creating tools to support the process.

• Collaborating

  with various teams, including designers, design verification (DV) engineers, and software engineers, to ensure the design is ready for tape-out.

Required Skills & Qualifications

A typical job description for such a role would require a solid foundation in digital logic and hardware design.

• Experience with Emulation:

  Direct experience with

  Synopsys ZeBu

  is the primary requirement. Other platforms like Cadence Palladium or Mentor Veloce would also be valuable.

• Hardware Description Languages (HDLs):

  Proficiency in

  Verilog

  ,

  SystemVerilog

  , or VHDL is essential for understanding and working with the RTL code.

• Scripting and Programming:

  Strong skills in languages like

  Python

  ,

  Perl

  , and

  TCL

  are necessary for automation, tool creation, and managing the emulation environment.

• Verification Methodologies:

  Knowledge of standard verification flows, including simulation (using tools like VCS), and an understanding of the complete design cycle.

• Educational Background:

  A bachelor's degree in Electrical Engineering, Computer Engineering, or a related field is typically required, with a master's degree often preferred.

This role is critical for ensuring that hardware designs are functional and bug-free before the expensive and time-consuming manufacturing process begins.