10.0 - 12.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Job Role: RTL Design Engineer Experience: 10+yrs Location: Bengaluru Notice Period: 30days max Role Summary We are seeking an experienced RTL Design Engineer to join our team and contribute to the RTL design and development of the signal processing path for Aeva's advanced 4-D Lidar processing chip. In this role, you will design, implement, and integrate key sub-components into both ASIC and FPGA platforms, ensuring performance, efficiency, and robustness. Key Responsibilities Design and develop custom components for the digital signal processing pipeline, including filters, FFTs, control logic, and related modules. Create micro-architecture specifications, write SystemVerilog RTL code, and ...

Posted 3 weeks ago

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Emulation Engineers Lead_Bangalore Nippon Data Systems

8.0 - 13.0 years

15 - 30 Lacs

bengaluru

Work from Office

Emulation Engineer with Zebu experience- digital systems RTL code for IP, sub-systems, and SoCs. hardware description languages (HDLs) such as Verilog or system Verilog Experience in building emulation model builds Email id - ta6@nippondata.com

Posted 2 months ago

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Emulation Zebu / HAPS Engineer Prodapt Solutions

6.0 - 11.0 years

20 - 35 Lacs

Bengaluru

Work from Office

Role & responsibilities We are actively looking for highly experienced Emulation Engineers to join our team in Bangalore. If you have over 6+ years of experience in FPGA(HAPS) / Synopsys(ZEBU) with expertise in: Emulation and Prototyping technologies such as Palladium, Veloce, Zebu, HAPS, (these names are registered trade marks of their respective owners)Developing emulation testbenches to support necessary Design Verification scenarios and firmware/software/hardware bring up Build emulation models from RTL and release/support those models Develop emulation tools such as debugger and monitor features Work closely with verification and software development teams Develop emulation and verifica...

Posted 5 months ago

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Accelerated Design Verification Professional Shashwath Solution

5 - 10 years

40 - 45 Lacs

Bengaluru

Work from Office

Responsibilities & Achievements: Reduced post-silicon bug escapes through early software-driven validation in emulation environments. (Accelerated Verification) Cut SoC bring-up time by 50% by architecting a unified simulation-to-emulation testbench with reusable transactors. Spearheaded the Accelerated verification plan for a next-gen ADAS SoC including use cases like Start Up, BOOTROM, Complex data path, Negative tests Enabled 80% reuse of verification components across simulation, emulation, and prototype platforms through modular UVM design. Successfully led a AV verification team of engineers across DV, emulation Key Skills Accelerated Verification: Synopsys ZeBu, Siemens Veloce Verific...

Posted 5 months ago

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