Emulation Zebu / HAPS Engineer Prodapt Solutions

6.0 - 11.0 years

20 - 35 Lacs

Bengaluru

Work from Office

Role & responsibilities We are actively looking for highly experienced Emulation Engineers to join our team in Bangalore. If you have over 6+ years of experience in FPGA(HAPS) / Synopsys(ZEBU) with expertise in: Emulation and Prototyping technologies such as Palladium, Veloce, Zebu, HAPS, (these names are registered trade marks of their respective owners)Developing emulation testbenches to support necessary Design Verification scenarios and firmware/software/hardware bring up Build emulation models from RTL and release/support those models Develop emulation tools such as debugger and monitor features Work closely with verification and software development teams Develop emulation and verification strategy Develop test framework and test cases Write documents such as verification specification and reports Preferred candidate profile Bachelors/Master’s degree or higher in EEE/ECE 6 to 12 years or more of practical semiconductor Emulation and Prototyping technologies such as Palladium, Veloce, Zebu, HAPS, (these names are registered trade marks of their respective owners) Experience with one or more of the emulation platforms like HAPS, Zebu, Palladium, or Veloce Experience in FPGA prototyping, with programming experience in C/C++, Verilog, Python, shell scripting. Prototyping / ProtoCompiler and Vivado expert added advantage. Experience with emulation model development and bring up Experience with developing new transactors and hybrid emulation model development Computer architecture knowledge, especially in CPU and standard bus protocols Excellent verbal and written communication skills

Posted 1 month ago

Apply

Accelerated Design Verification Professional Shashwath Solution

5 - 10 years

40 - 45 Lacs

Bengaluru

Work from Office

Responsibilities & Achievements: Reduced post-silicon bug escapes through early software-driven validation in emulation environments. (Accelerated Verification) Cut SoC bring-up time by 50% by architecting a unified simulation-to-emulation testbench with reusable transactors. Spearheaded the Accelerated verification plan for a next-gen ADAS SoC including use cases like Start Up, BOOTROM, Complex data path, Negative tests Enabled 80% reuse of verification components across simulation, emulation, and prototype platforms through modular UVM design. Successfully led a AV verification team of engineers across DV, emulation Key Skills Accelerated Verification: Synopsys ZeBu, Siemens Veloce Verification Methodologies: UVM, System Verilog, Acceleratable UVM, C based V&V Reuse & Bridging: Simulation-to-Emulation Flow, Coverage Continuity, Transactor Development is desirable.

Posted 2 months ago

Apply

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.