ASIC Verification Engineer

Role Overview: As a Junior ASIC Verification Engineer at Kinara, you will be a key member of the dynamic team responsible for leading and executing verification efforts for complex ASIC designs. Your role will involve developing and maintaining verification plans, testbenches, and test cases to ensure the quality and reliability of our products. You will design and implement SystemVerilog/UVM-based verification environments, create and execute test cases, and write testplans at unit or SOC level. Key Responsibilities: - Develop and maintain verification plans, testbenches, and test cases for ASIC designs. - Design and implement SystemVerilog/UVM-based verification environments. - Create and execute test cases to verify functionality, performance, and compliance with specifications. - Write testplans, testcases at unit or SOC level. Qualifications Required: - Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field. - Expertise in SystemVerilog, C, C++ languages. - Experience with verification tools such as VCS, QuestaSim, or similar is helpful. - Excellent problem-solving and debugging skills. - Strong communication and teamwork abilities. Additional Details: Kinara fosters an environment of innovation where technology experts and mentors work together to tackle exciting challenges. The team at Kinara values shared responsibilities and diverse perspectives, making it an ideal place to work. Join us and be a part of our journey towards creating a smarter, safer, and more enjoyable world through high-performance AI solutions embedded in edge devices. Make your mark and become a part of the Kinara team!,