Architect Telecom Packet Core

You will be responsible for software development, designing and building scalable, high-performance C++ applications using DPDK for telecom solutions. Your role will involve implementing low-latency and high-throughput processing features tailored to telecom workloads. In addition, you will develop and optimize components in 4G Core Networks (PCEF, MME, SGW, PGW, HSS) and work with key telecom protocols such as GTP, S1AP, SCTP, and Diameter. Your focus will also be on optimizing packet processing using DPDK for latency-sensitive telecom applications and detecting, as well as resolving system bottlenecks for real-time network environments. Furthermore, you will be required to identify, analyze, and fix complex system/network-level issues. You will conduct code reviews and rigorous testing to ensure system reliability and code quality. Collaboration with cross-functional teams to integrate and deliver complete solutions and preparing and maintaining documentation for system architecture, designs, and operational procedures will be a key part of your role. The must-have requirements for this position include proficiency in C++ with deep knowledge of multithreading, memory management, and performance tuning. Hands-on experience with DPDK and VPP for data plane processing, knowledge of telecom protocols (GTP, S1AP, SCTP, Diameter), solid grasp of Linux/Unix development environments, and experience with debugging tools (gdb), profilers (Valgrind), and version control systems (Git). Preferred qualifications for this role include a background in 4G Core Network architecture (EPC, MME, SGW, PGW, HSS), exposure to 5G or IMS systems, and a Bachelors or Masters degree in Computer Science, Telecommunications, or a related field.,