SMTS Silicon Design Engineer Advanced Micro Devices (AMD)

13.0 - 15.0 years

9 - 12 Lacs

bengaluru, karnataka, india

On-site

Responsible for the design and development of test environment components to support the pre-silicon validation of embedded firmware, BIOS features and other IP features of x86 based SOC. Responsible for writing directed tests to verify features in a co-simulated and emulated/FPGA hardware environment. Responsible for writing monitors and checkers to support end-to-end firmware/hardware validation. Responsible for writing and developing coverage goals and and test plans. Responsible for running emulator workloads to test new features and debug technical issues using logs, waveform dumps and RTL debug. PREFERRED EXPERIENCE: Experience with BIOS/OS bring up on x86 based SOC emulation platform. Experience working with CPU, GPU, and Memory subsystem. Experience with System Verilog, C/C++, or UVM for SOC verification. Must have hands-on experience on Zebu/Palladium/Veloce platform to bring-up the SOC. Experience in writing and debugging testbenches. Good understanding of Power Management Modes / SOC and IP power states. Good understanding of PCIe/USB/Ethernet standards. Experience on debugging SOC IO interfaces with Transactor solutions in emulation platform. Hands-on experience writing scripts using Python, Shell, or TCL. Think differently and out of the box to stress the DUT in Emulation platform and verify it in efficient way. Should be open to learning verification methodologies and working closely with design, verification, validation, architecture and firmware teams. Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design.

Posted 1 day ago

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