104 Xilinx Jobs - Page 5

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: About The Role :: As a "CPU Core Validation Engineer" you would be part of CPU Validation team in CPU org working on validation of CPU core pipeline arch and micro arch features. Roles and Responsibilities: Develop detailed test plan considering the IP arch and uarch features. Work with CPU design and verification teams to develop CPU bring up and functional validation test plans for the IP owned. Develop validation methodology and test contents to exercise on emulators during pre-Si phase and on Silicon. Work with SOC bring up teams, software teams to plan CPU core features bringup and end to end validation. Triage and debug failures on Silicon. Develop test contents and testing strategies to assist validation of CPU on silicon. Work with CPU verification teams to reproduce silicon fails on emulators and FPGAs. Work with design team to suggest, architect new debug features to improve future CPU bringup"™s. Minimum Requirements: BA/BS degree in CS/EE with 5+ years"™ experience. 5+ Experience in Silicon Validation and bring up. Implementation of assembly, C/C++ language embedded firmware Experience with software tool chain including assemblers, C compilers, Makefiles, and source code control tools. Preferred Requirements: Good understanding of micro-processor architecture, in domains such as:Cache Coherence, Memory ordering and Consistency, Prefetching, Branch Prediction, Renaming, Speculative execution, and Address Translation/Memory Management. Knowledge of Random Instruction Sequencing (RIS) and testing a given design, at the Block/Unit-level and Subsystem/Chip-level for proving correctness. Experience in writing Test plans and Assembly code. Ability to develop and work independently on a block/unit of the design Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

As FPGA Designer, you will be responsible for the definition and development of complex FPGA designs for AWG & Digitizer products and work in a highly collaborative, fast-paced environment. You will work closely with R&D Project Manager, Product Architects, Solution Teams, Software Qualification and Software Engineers to develop new product offerings and improve existing ones. The candidate should be a strong team worker and should be able and willing to collaborate with other design teams located in the US & Europe. Essential: - Bachelor degree or Master degree in Electrical / Electronic Engineering - 4-8 years of experience in FPGA development (Altera, Xilinx) - Experience of RTL languages - VHDL and Verilog - Experience of Xilinx FPGA Tools Design Flow - Vivado, Chipscope - Experience with timing closure for complex designs - Experience of Functional Simulation tools Synopsys or Mentor or Cadence or Vivado simulator - Experience of creating a self-checking Simulation environment involving test bench, scripts for automation, writing test cases. - Ability to quickly learn new technologies and product segments - Excellent written skills which are required for creating documents like Product Definition, Detailed FPGA Design, Hardware & Software Interface documents - Self-motivated and self-organized - Excellent team-player, responsive and accountable - Excellent verbal communication skills Preferred: - Experience with high data throughput real time processing (~ 1GSPS), PCIe, DDR memories, FSM, etc - Experience using Test & Measurement lab equipment. - Knowledge of C/C++.

Design next-generation HW features in partnership with front-end teams and industry partners Drive feature and cost trade-off analysis to provide technical recommendations Provide design guidance to enable and support global teams Deliver assigned system interfaces with design and process across extended teams Prepare documentation for inspection/testing procedures Take the first step towards your dream career Every Dell Technologies team member brings something unique to the table. Here s what we are looking for with this role: Essential Requirements 8-12 years of experience in systems design and architecture with Verilog coding, System Verilog, and VHDL coding practices. Experience in digital design methods such as CDC (Clock Domain Crossing), RDC (Rest Domain Crossing), timing constraints definition, and static timing analysis. Experience in RTL Design Digital Design Principles and x86 Core or ARM processor architecture. Experience in Peripheral Protocols like I2C, I3C, SMbus, IPMI, IPMB Strong fundamentals in both analog and digital design practices with a desire to share knowledge and mentor others Experience and deep knowledge of hardware and software interactions, and ability to apply this understanding to resolve issues. Desirable Requirements Experience in x86(AMD Intel) and ARM architecture. Experience with FPGA development tools like XILINX, Lattice, and Altera Quartus. (Modelsim/QuestaSim)

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As an ideal candidate for the ASIC Digital Design Engineer, Senior role, you are a highly motivated and innovative individual with a deep understanding of ASIC development flow. You are someone who thrives in dynamic environments and embraces the challenges that come with constant technological changes. You are self-motivated, proactive, and able to balance good design quality with tight deadlines. Your excellent communication skills enable you to interact seamlessly with different design groups and customer support teams. You are known for your ability to resolve issues creatively and exercise independent judgment in selecting methods and techniques to obtain solutions. You are a team player who can produce excellent results both as an individual and as part of a team. What You’ll Be Doing: Supporting development and verification of ASIC digital designs for next-generation NRZ and PAM-based SerDes products.Setting up and running lint/cdc/rdc checks using VC-Spyglass and synthesis flow using Design Compiler/Fusion Compiler.Working with Verilog and VCS to ensure design accuracy.Defining synthesis design constraints and resolving STA issues.Setting up and running FPGA prototyping flows to map RTL designs to Xilinx FPGAs. The Impact You Will Have: Contributing to the development of cutting-edge SerDes products that lead the industry.Enhancing the performance, power, and size efficiency of our silicon IP offerings.Enabling rapid market entry for differentiated products with reduced risk.Driving innovation in high-speed digital design and data recovery circuits.Supporting the creation of high-performance silicon chips and software content.Collaborating with a world-class team to solve complex design challenges. What You’ll Need: BSEE or MSEE with a minimum of 2 years of experience in digital design and front-end flows.Proficiency in running lint/cdc/rdc checks and synthesis flow.Experience in coding, verifying Verilog and System Verilog design.Experience of working with minimum supervision and owning and delivering for front-end activities in IP/SOC.Experience of leading technically for front-end activities.Knowledge of digital design methodologies, DFT insertion, synthesis constraints, and flows.Scripting experience in Shell, Perl, Python, and TCL (preferred). Who You Are: Excellent communicator with the ability to interact with diverse teams.Self-motivated and proactive, with a strong attention to detail.A creative problem-solver who can think independently.Capable of working under tight deadlines while maintaining high-quality standards.A team player who can contribute effectively both individually and collaboratively. The Team You’ll Be A Part Of: Join our highly experienced mixed-signal design and verification team, where you will work alongside experts in digital and mixed-signal engineering. Our team is dedicated to developing innovative solutions for the next generation of high-speed SerDes products, providing continuous training and opportunities for growth. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.