211 Xilinx Jobs - Page 5

→ → (A) Vacancies: Purchasing Manager/Buyer Locations: Malaysia/Philippines/India → →（B）Vacancies: Sales Account Manager / BD Manager Locations: India--Chennai/Pune/Delhi （urgent → →（C）Vacancies: Sales Account Manager / BD Manager Locations：Thailand （urgent → →（D）Vacancies: Inside/Outside Sales Manager Locations： Hongkong/Malaysia At Honortech, we thrive when our people thrive. To put our products and solutions into the hands of consumers worldwide, we need a professional who knows how to connect. We are currently looking for Sales Manager/Sales Executive/Country Manager/Partner to be the leading force that fuels our growing client relationships Japan/Southease Asia/European/ American market (Semiconductor/IC/integrated circuits/chip in automotive, medical, industrial, AI server and other fields for end customers). The ideal person will have proven experience building on existing relationships, eliminating competitor threats within our customer base, and ensuring customer satisfaction. With 8 offices/branches and 2 logistics centers, Honortech is offering comprehensive support to our customers. More locations/offices are to be set up in the future. ------------------ (A) Vacancies: Purchasing Manager/Buyer Locations: Malaysia/Philippines/India with strong resources and experience about active ICs/CPU/and other electronic components in manufacturers, franchised distributors and independent distributors, including regions lilke SEA/USA/EU （B）Vacancies: Sales Account Manager / BD Manager Locations： India/Philippines 【Responsibilities 岗位职责】 Provide long-term solutions to reduce the procurement cost of electronic components ( ST/ TI/ MAXIM/ MICROCHIP ) for the electronic product manufacturers (or automotive Tier1/ OEM/ ODM/ EMS ) mainly in Europen market, and help customers deal with excess inventory. Through phone calls, emails, visits to establish cooperative relationships with buyers from target country , develop new customers and improve the maintenance of the team's existing customers. Communicate effectively with internal purchasing specialists in order to handle the whole sales process of customer's various component requirements, quotation, order, delivery and payment collect. Forecast and plan sales activities, work closely with other sales staff as a team to accomplish sales tasks, submit regular sales reports, report sales volume, potential sales opportunities, and sales development programs, pay attention to and evaluate competitors' activities and products. 【Required skills and qualifications 任职资格】 At least 3 years sales experience or key account development experience in Automotive IC or related field. Accout or resources related to electronic components distributor, agent, original factory is preferred. Successfully developed and maintained more than clients/customers Skilled marketing channels to expand customers, monthly average of new customers Have successfully achieved monthly/annual targets during consecutive months, like K USD GP per month. Good oral and written English communication ability. Ability to manage multiple accounts while seeking new opportunities. Ability to understand client needs and negotiate costs and services. Collection market and competitor information, having keen insight and analytical ability for market and competitor trend, timely and accurate feedback customer needs. Basic computer skill. ------------------ （C）Emergency Recruitment: Inside Sales Manager/ Sales Associate Locations： HK/Malaysia//Shenzhen 【Responsibilities 岗位职责】 Mainly responsible for assisting in following up with customers in India first, and gradually with customers both in India and Malaysia. Be responsible for following up on quotations. Responsible for following up customers' problems by means of telephone and email. Regularly follow up on customers' new needs and resolve their complaints. Collaborate with the sales manager to achieve the monthly performance target. Work with outside sales manager to develop account plans and strategy to meet sales target. Manage all RFQs from clients and PO management, act as customer interface to address outstanding issues on order and all operational issues. 【Required skills and qualifications 任职资格】 At least 1 year related working experience in electronic component industry. Have a cheerful, positive and intelligent personality Be fluent both in English and Chinese, and can easily undersatand Indian colleague's English. Have a fast learning ability and can master new skills quickly Willing to respond quickly to support and be flexible in solving problems ------------------ (D) Vacancies: Sales Account Manager / BD Manager Locations: India / Malaysia / Thailand / Philippines 【Responsibilities 岗位职责】 Provide long-term solutions to reduce the procurement cost of electronic components ( ST/ TI/ MAXIM/ MICROCHIP ) for the electronic product manufacturers (or automotive Tier1/ OEM/ ODM/ EMS ) mainly in Europen market, and help customers deal with excess inventory. Through phone calls, emails, visits to establish cooperative relationships with buyers from target country , develop new customers and improve the maintenance of the team's existing customers. Communicate effectively with internal purchasing specialists in order to handle the whole sales process of customer's various component requirements, quotation, order, delivery and payment collect. Forecast and plan sales activities, work closely with other sales staff as a team to accomplish sales tasks, submit regular sales reports, report sales volume, potential sales opportunities, and sales development programs, pay attention to and evaluate competitors' activities and products. 【Required skills and qualifications 任职资格】 At least 3 years sales experience or key account development experience in Automotive IC or related field. Accout or resources related to electronic components distributor, agent, original factory is preferred. Successfully developed and maintained more than clients/customers Skilled marketing channels to expand customers, monthly average of new customers Have successfully achieved monthly/annual targets during consecutive months, like K USD GP per month. Good oral and written English communication ability. Ability to manage multiple accounts while seeking new opportunities. Ability to understand client needs and negotiate costs and services. Collection market and competitor information, having keen insight and analytical ability for market and competitor trend, timely and accurate feedback customer needs. Basic computer skill. ------------------ ------------------ 【Benefits 员工福利】 1.High salary: the industry's competitive "three high" compensation: high base salary + high commission + high bonus. Hornortech’s sales amount has ramped up to USD 150 million in the year of 2021 and there is outstanding employee whose annual salary has reached over RMB 10 million in 2021. 2. Good protection: five insurance and one pension upon joining, 5+3 annual incremental leave model. 3. More team building activities: team building, afternoon tea, birthday parties, internal and external training, badminton, basketball, holiday games,dozens of annual activities. 4. Flexible: 7H X 5 days, flexible working hours, two shifts to effectively avoid the peak hours. 5. More training: perfect training system, pass on the new system to help you work without worry. 6. Wide promotion: with a broad promotion channel, fair and strong competition with strength. 7. Excellent location: 5A grade office building, superior and comfortable office environment, convenient transportation, seamless connection with the subway entrance. 【Company Profile 公司简介】 Honortech International Limited (Honortech International Limited) was established in August 18, 2008, is a fast-growing mixed distributor (agent/trader) of electronic components, with sales of 150M USD in 2021. The sales turnover is 280+ million USD in the year of 2022. Headquartered in Hongkong, we have branches and offices in Japan,Malaysia,Thailand,Philippines,India,Taiwan,Shenzhen,Suzhou,Shanghai,Dalian,Fuzhou. The Suzhou branch was established in 2018, located in the heart of the beautiful Eastern/Western CBD, and is one of the most promising marketing centers of Honortech, with business scope covering Central, East and North China, and a wide range of trading customers, and many famous enterprises from domestic and abroad have reached close cooperation with Suzhou branch, with annual sales of over hundreds million. Honortech focuses on the distribution of international manufacturers (TI, ST, XILINX ALTERA...) and the agency business of domestic manufacturers, and has a highly professional purchasing team and QC team to provide customers with high efficiency and quality control of electronic components transfer services. The company has obtained agent authorization of "Geehy, 3peak, joulwatt, pangomicro and other domestic first-class reputable manufacturers, configuration of professional PM and FAE team, to provide customers with domestic brands of supporting alternative solutions; customer areas cover: network communications, green energy, industrial control, medical, Internet of things, automotive and other related fields. For three consecutive years, Honortech has been awarded as International Most Promising Distributor, Shenzhen High-Tech Enterprise, the company has passed ISO9001 international system certification, ERAI certified member, Dun & Bradstreet 3A level enterprise. 【Contact Details 联系方式】 TEL: 86-0755-82995960 / E-mail: HR5@honortech-int.com

FPGA Developer --> --> Location, Designation --> LocationRemote DesignationFPGA Developer Experience7- 9 Years Skills required: 1. Should have worked on USRP N310/X310 (N3xx/X3x0) 2. In-depth Knowledge of FPGA Architecture 3. Able to write own RTL custom HDL or drops in IP a) VHDL, Verilog, System,Verilog, Vivado HLS b) Xilinx IP, Vivado Block Diagram 4. Should have developed RFNoC Block 5. Have working knowledge of USRP Hardware Driver (UHD) 6. Able to write custom FPGA logic in RFNoC Blocks 7. Able to use library of existing RFNoC Blocks a) FFT, FIR, Signal Generator, Fosphor 8. Have understanding of GNU Radio interface to RFNoC Block 9. FPGA debugging and HW/SW integration 10. Thorough understanding of appropriate coding styles for FPGAs, and trade-offs for density and speed 11. In-depth knowledge of XILINX ZYNQ 71xx/pl-kINTEX-7 based RFNoC architecture is must. 12.Understand Customer requirements, define architecture and detailed design 13. Good Customer Communication Skills 14. Working knowledge of Agile Feel Free To Contact Us...!!! Submit

We are pleased to launch the ExcelHer program - the career returnship program at Volvo Group in India. The program is for women men who have been on a career break for a year or more. This is our step towards empowering women men to relaunch their professional journey after their absence from the workplace due to personal commitments. Exciting work assignments have been identified which you can refer in the list below. The assignments are for a tenure of 9 months. The participant of this program would have access to professional development programs, mentoring assistance by a business leader, apart from the experience of working with people from different functions/technologies/culture. Location : Bangalore Responsibilities : Ph.d/M.sc/M.Tech/B.Sc/B.Tech in Electronics engineering, Computer science or similar. 5-7 years of experience in Automotive embedded system development. Knowledge of advanced Embedded SW development. Expert in C and C++ Programming. Knowledge on ISO26262 Functional Safety and Cybersecurity. Knowledge in Classic Adaptive AUTOSAR SW . Good knowledge on Davinci Developer and Davinci Configurator Good Knowledge in Integration, Application SW Development, IOHAL and Platform software Good Debugging skills Knowledge on EE architecture. Knowledge on communication protocols like Ethernet, CAN etc. Working knowledge on Power PC and ARM based architectures, Microcontrollers like Xilinx zc702 and TI J7E etc.. Experience in SAFe and Agile SW development. Experience in using agile development tools like Jira, Confluence etc.

Amrita Vishwa Vidyapeetham, Chennai Campus, is inviting applications from qualified candidates for the post of Immediate Joiners-Assistant Professor/Associate Professor/Professor @ Department of Electronics and Communications Engineering. For Details Contact : hrase.chn@ch.amrita.edu Job Title Immediate Joiners-Assistant Professor/Associate Professor/Professor @ Department of Electronics and Communications Engineering at Amrita Vishwa Vidyapeetham, Chennai Campus Location Chennai, Tamil Nadu Required Number 4 Qualification Ph.D. (ECE) from a reputed college/ institute with good research/ academic/ administrative experience will be considered. Minimum experience of 15 years will be given preference. Retired faculty from IIT/ NIT/ reputed state Universities may apply for Adjunct Faculty/Visiting Faculty positions. Job description For Electronics and Communication Engineering Program: Teaching & Research experience in the following areas – Robotics/Artificial Intelligence/Machine Learning/Data Science/Signal Processing / VLSI / Embedded Systems / Internet of Things / Nano Materials / Sensors / Quantum Computing / Data Structures and Algorithms / Computer Vision / AI, ML, DL / Image Processing / Cyber-Physical Systems / Wireless Sensor Networks / Next Generation Wireless Technologies / Intelligent Systems. Skill Required Robotic System Development and Programming Architecture, ROS MATLAB, Keil, Cadence tool, Xilinx Vivado, Microwave Studio, Python, Embedded C. The candidate should have adequate experience in research in their area of specialization, publications in top-tier journals, sponsored research, patent publication, and industry consultancy. Job category Teaching Last date to apply 30-07-2025 For details contact hrase.chn@ch.amrita.edu

Amrita Vishwa Vidyapeetham, Chennai Campus, is inviting applications from qualified candidates for the post of Immediate Joiners-Assistant Professor/Associate Professor/Professor @ Department of Electronics and Communications Engineering. For Details Contact : hrase.chn@ch.amrita.edu Job Title Immediate Joiners-Assistant Professor/Associate Professor/Professor @ Department of Electronics and Communications Engineering at Amrita Vishwa Vidyapeetham, Chennai Campus Location Chennai, Tamil Nadu Required Number 4 Qualification Ph.D. (ECE) from a reputed college/ institute with good research/ academic/ administrative experience will be considered. Minimum experience of 15 years will be given preference. Retired faculty from IIT/ NIT/ reputed state Universities may apply for Adjunct Faculty/Visiting Faculty positions. Job description For Electronics and Communication Engineering Program: Teaching & Research experience in the following areas – Robotics/Artificial Intelligence/Machine Learning/Data Science/Signal Processing / VLSI / Embedded Systems / Internet of Things / Nano Materials / Sensors / Quantum Computing / Data Structures and Algorithms / Computer Vision / AI, ML, DL / Image Processing / Cyber-Physical Systems / Wireless Sensor Networks / Next Generation Wireless Technologies / Intelligent Systems. Skill Required Robotic System Development and Programming Architecture, ROS MATLAB, Keil, Cadence tool, Xilinx Vivado, Microwave Studio, Python, Embedded C. The candidate should have adequate experience in research in their area of specialization, publications in top-tier journals, sponsored research, patent publication, and industry consultancy. Job category Teaching Last date to apply 30-07-2025 For details contact hrase.chn@ch.amrita.edu

Job Title: Technical Project Manager Location: Senapati Bapat Road, Pune Role Summary As a Technical Project Manager, you will coordinate cross-functional teams of data scientists, developers, engineers, and designers to deliver high-quality AI and Computer Vision projects. You will ensure agile practices, maintain project transparency with clients, and drive the technical roadmap from ideation to successful deployment. Key Responsibilities ✅ Project Management & Delivery: Plan, coordinate, and execute AI/ML projects end-to-end, ensuring delivery aligns with business goals. Lead government and enterprise-scale projects, from RFP analysis, bidding, to post-deployment support. Facilitate Scrum ceremonies: daily stand-ups, sprint planning, reviews, and retrospectives. Develop vision and roadmap for AI-based solutions using stakeholder input and industry trends. ✅ Technical Oversight Conduct code reviews, make decisions on tech stack, system architecture, and development methods. Guide teams on AI/ML, Computer Vision, NLP/NLQ, and Audio/Video processing modules. Manage deployment pipelines, testing, optimisation, and SaaS-based infrastructure setups. ✅ Client & Stakeholder Management Serve as primary point of contact for clients; ensure transparency, proactive updates, and smooth communication. Liaison with government bodies and large-scale homeland security agencies for custom product needs. ✅ Team Leadership Mentor multi-disciplinary teams, driving collaboration and knowledge-sharing. Coordinate with backend/frontend teams working with Python, Node.js, and cloud infrastructures (Docker, Kubernetes). Requirements ✔️ Engineering Graduate or Postgraduate in Electronics/Communication/Computer Science or related fields. ✔️ 7-10 years of experience in project development, delivery, and government business development. ✔️ Hands-on coding experience with Python, C/C++, and familiarity with AI frameworks. ✔️ Expertise in Computer Vision, Deep Learning, NLP modules, and advanced data analytics. ✔️ Experience with containerisation (Docker, Kubernetes) and CI/CD pipelines. ✔️ Strong leadership, communication, and analytical problem-solving skills. ✔️ Proven success in winning, implementing, and managing large infrastructure projects. ✔️ Proficiency in MS Office, networking tools, and electronics design tools is a plus. Why Join Us? Work on impactful projects in smart cities and homeland security. Opportunity to lead AI solutions from research to deployment. Collaborate with top governmental organisations and drive tech innovation at scale. Skills: data analytics,deep learning,rfp generation,ai/ml,python,kubernetes,testing,ai,xilinx,nlp/nlq,c,c++,agile,ci/cd pipelines,audio/video processing,computer vision,vision models,c/c++,scrum,java,video processing,project management,project management skills,ml,keil,docker,saas

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: THE ROLE: AMD is looking for a senior software engineer to join our growing team. As a key contributor you will be part of a leading team to drive and enhance AMD’s abilities to deliver the highest quality, industry-leading technologies to market. THE PERSON: The ideal candidate possesses an innovative and problem-solving mindset, has a keen eye for Software engineering development, and is diligent and passionate about Technology. A successful candidate will need to employ strong knowledge in computer technologies, leadership skills in technical areas, and SW engineering expertise as well as a strong ability to compete effectively in a fast-paced, relevant environment while working with different teams of engineers and collaborators. KEY RESPONSIBILITIES: Develop and drive execution of comprehensive, highly effective software for sophisticated new technology and new product introduction projects Validate new SW features before releasing them to customers Contribute to a high-functioning feature team Collaborate closely with multiple teams to deliver key planning solutions and the technology to support them Help contribute to the design and implementation of future architecture for a highly scalable, durable, and innovative system Work very closely with dev teams and Project Managers to drive results PREFERRED EXPERIENCE: Strong digital design and simulations basics RTL (VHDL, Verilog & System Verilog) coding skills Understanding of FPGA design flow and tools (Synthesis, Simulation and implementation) ASIC/FPGA verification experience – VHDL and Verilog Xilinx Vivado Design Suite experience Hands on experience on simulators like XSIM, Questa, Modelsim, VCS etc. Advanced Debug skills in software environment or strong problem-solving skills Hands on experience with scripting preferably tcl, pearl and python ACADEMIC CREDENTIALS: Bachelor’s or Master’s degree in Computer/Software Engineering, Computer Science, or related technical discipline #LI-NR1 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

An FPGA Design Engineer is responsible for designing, developing, and testing digital circuits using Field-Programmable Gate Arrays (FPGAs). This role involves translating system requirements into hardware implementations, coding in hardware description languages (HDLs) like VHDL or Verilog, and verifying the design through simulation and testing. They work with various tools and technologies to optimize performance, power consumption, and area of the FPGA designs. Key Responsibilities: Design and Implementation: Developing digital circuits and systems using FPGAs, including coding in VHDL or Verilog. Verification and Testing: Simulating and testing FPGA designs to ensure functionality and performance meet specifications. Hardware Optimization: Optimizing FPGA designs for performance, power consumption, and area. Collaboration: Working closely with other engineers, including hardware and software teams, to integrate FPGA designs into larger systems. Documentation: Creating and maintaining design documentation, including specifications, test plans, and implementation details. Required Skills: Technical Skills: Proficiency in VHDL or Verilog, and FPGA synthesis tools like Xilinx Vivado or Intel Quartus. Strong understanding of digital logic design, circuit design, and hardware architecture. Knowledge of FPGA debugging techniques and simulation tools. Familiarity with high-speed digital design, communication protocols (like PCIe or Ethernet), and embedded systems programming. Understanding of power analysis and optimization, and error detection and correction techniques. Soft Skills: Strong problem-solving and analytical skills. Ability to work effectively in a team environment. Excellent communication and documentation skills. Ability to adapt to new technologies and learn new skills. Education and Experience: A bachelor's or master's degree in Electrical Engineering, Computer Science, or a related field is typically required. Experience in FPGA design and development is essential. Experience with specific FPGA families and development tools is often preferred. Tamil candidates only Job Types: Full-time, Permanent Pay: ₹473,534.17 - ₹1,879,777.73 per year Benefits: Work from home Schedule: Day shift Monday to Friday Supplemental Pay: Yearly bonus Work Location: In person

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ The Role AMD is looking for a senior software engineer to join our growing team. As a key contributor you will be part of a leading team to drive and enhance AMD’s abilities to deliver the highest quality, industry-leading technologies to market. The Person The ideal candidate possesses an innovative and problem-solving mindset, has a keen eye for Software engineering development, and is diligent and passionate about Technology. A successful candidate will need to employ strong knowledge in computer technologies, leadership skills in technical areas, and SW engineering expertise as well as a strong ability to compete effectively in a fast-paced, relevant environment while working with different teams of engineers and collaborators. Key Responsibilities Develop and drive execution of comprehensive, highly effective software for sophisticated new technology and new product introduction projects Validate new SW features before releasing them to customers Contribute to a high-functioning feature team Collaborate closely with multiple teams to deliver key planning solutions and the technology to support them Help contribute to the design and implementation of future architecture for a highly scalable, durable, and innovative system Work very closely with dev teams and Project Managers to drive results Preferred Experience Strong digital design and simulations basics RTL (VHDL, Verilog & System Verilog) coding skills Understanding of FPGA design flow and tools (Synthesis, Simulation and implementation) ASIC/FPGA verification experience - VHDL and Verilog Xilinx Vivado Design Suite experience Hands on experience on simulators like XSIM, Questa, Modelsim, VCS etc. Advanced Debug skills in software environment or strong problem-solving skills Hands on experience with scripting preferably tcl, pearl and python Academic Credentials Bachelor’s or Master’s degree in Computer/Software Engineering, Computer Science, or related technical discipline Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Min 10 yrs of R&D experience in FPGA development (Altera, Xilinx) Experience of RTL languages - VHDL or Verilog Xilinx FPGA Tools Design Flow - Vivado, Chipscope, Quartus. EDA Functional Simulation tools – Synopsys or Mentor or Cadence.

Job Title: FPGA Architect Location: Gurgoan, HR Experience: 10+ Years Job Summary: As FPGA Architect, you will lead the design development effort on a variety of projects in a highly collaborative, fast-paced environment. In this role, you will be responsible for the definition and development of complex FPGA designs for our Test products. You will work closely with RD Project Manager, Product Architects, Solution Teams, FPGA developers, Software Qualification and Software Engineers to develop new product offerings and improve existing ones. The candidate should be a strong team worker and should be able and willing to collaborate with other design teams located in US Europe. Qualifications Essential: Bachelor degree or masters degree in electrical / Electronic Engineering Minimum 10 years of RD experience in FPGA development (Altera, Xilinx) Experience of RTL languages - VHDL or Verilog Experience of Xilinx FPGA Tools Design Flow - Vivado, Chipscope, Quartus. Experience of EDA Functional Simulation tools Synopsys or Mentor or Cadence Experience of Altera or Xilinx FPGA Tools Design Flow Ability to quickly learn new technologies, protocols and product segments Experience of creating self-checking Simulation environment involving test bench, scripts for automation, writing test cases. Collaborate with system architects to define the system architecture and determine how the FPGA will interface with other components on the PCA board and choose an appropriate FPGA based on the projects requirements. Experience with timing closure for complex designs Excellent written skills which are required for creating documents like Product Definition, Detailed FPGA Design, Hardware Software Interface documents Self-motivated and self-organized Excellent team-player, responsive and accountable Excellent verbal communication skills Preferred: Experience with Keysight instruments like Oscilloscope, Analyzer, AWG BERT Experience of working on Protocols such as PCI Express, USB, MIPI (MPHY, DPHY, CPHY based), Ethernet, DDR etc. Experience in international collaboration (US EUR) Experience in multi-vendor collaboration (software supplied by and/or to external organizations)

JOB DESCRIPTION As FPGA Architect , you will lead the design & development effort on a variety of projects in a highly collaborative, fast-paced environment. In this role, you will be responsible for the definition and development of complex FPGA designs for our Test products. You will work closely with R&D Project Manager, Product Architects, Solution Teams, FPGA developers, Software Qualification and Software Engineers to develop new product offerings and improve existing ones. The candidate should be a strong team worker and should be able and willing to collaborate with other design teams located in US & Europe. Qualifications Essential: Bachelor degree or Master's degree in electrical / Electronic Engineering Minimum 10 years of R&D experience in FPGA development (Altera, Xilinx) Experience of RTL languages - VHDL or Verilog Experience of Xilinx FPGA Tools Design Flow - Vivado, Chipscope, Quartus. Experience of EDA Functional Simulation tools – Synopsys or Mentor or Cadence Experience of Altera or Xilinx FPGA Tools Design Flow Ability to quickly learn new technologies, protocols and product segments Experience of creating self-checking Simulation environment involving test bench, scripts for automation, writing test cases. Collaborate with system architects to define the system architecture and determine how the FPGA will interface with other components on the PCA board and choose an appropriate FPGA based on the project's requirements. Experience with timing closure for complex designs Excellent written skills which are required for creating documents like Product Definition, Detailed FPGA Design, Hardware & Software Interface documents Self-motivated and self-organized Excellent team-player, responsive and accountable Excellent verbal communication skills Preferred: Experience with Keysight instruments like Oscilloscope, Analyzer, AWG & BERT Experience of working on Protocols such as PCI Express, USB, MIPI (MPHY, DPHY, CPHY based), Ethernet, DDR etc. Experience in international collaboration (US & EUR) Experience in multi-vendor collaboration (software supplied by and/or to external organizations) Job Type: Full-time Pay: ₹2,000,000.00 - ₹2,500,000.00 per month Benefits: Flexible schedule Work Location: In person

Ubuntu Linux, already the most popular Linux distribution in the world, is looking to increase its adoption even further by expanding the number of System On Chip (SoC) platforms supported natively and further optimising to ensure the highest performant experience for all users. There is a strong demand from silicon manufacturers such as NVIDIA, Xilinx, MediaTek, and Qualcomm to provide Ubuntu Linux to their customers and Canonical is looking to broaden its silicon enablement squads to meet this challenge. The Canonical Kernel Team - those responsible for the build, maintenance, and distribution of the Linux kernel for Ubuntu - are looking for individuals with a strong flair for software development at the hardware level and a passion for ensuring the most optimal performance the silicon can provide. The successful candidate will be able to prove a strong aptitude for software engineering at the hardware level. While direct experience with the Linux kernel would be a substantial advantage, it is not a hard requirement for candidates with prior background in other RTOS' or bare-metal environments as long as direct hardware experience can be demonstrated. There are a number of work-from-home based roles available worldwide and we are looking for experience levels from early career candidates with a couple of years under their belt up through senior industry veterans. What your day will look like Collaborate regularly and proactively with a globally distributed team Work closely with our silicon vendor partners to integrate their platform support into the Ubuntu Linux kernel for their product ranges Diagnose and resolve issues in the kernel reported by partners, customers, the community at large, and discovered by your own rigorous testing Take responsibility for the delivery of distinct silicon-optimised variants of the Ubuntu Linux kernel to the world Improve tooling and automation for the delivery and test of Ubuntu Linux kernels Submit, review, and apply kernel patches, working with both internal and external upstream maintainers Identify new means of maximising performance on partner silicon What we are looking for in you Well-organised and motivated self-starter able to thrive in a remote work environment Professional manner with colleagues, business partners, and the open-source community Ability to communicate effectively in English, both written and verbal Significant programming ability in C Strong grasp of device drivers, BSP's, and other aspects of hardware-level system engineering Solid background with git Understanding of operating system kernel fundamentals Ability to travel twice a year for company events of up to two weeks length Additional skills that you might also bring Python and Bash scripting ability Prior background with the major SoC families Ubuntu/Debian/Snap packaging Demonstrated experience with Linux kernel patching and debugging Solid understanding of performance optimisation for silicon platforms What we offer you We consider geographical location, experience, and performance in shaping compensation worldwide. We revisit compensation annually to ensure we recognise outstanding performance. In addition to base pay, we offer a performance-driven annual bonus. We provide all team members with additional benefits, which reflect our values and ideals. We balance our programs to meet local needs and ensure fairness globally. Home-based work environment with twice-yearly team sprints in person Personal learning and development budget of USD 2,000 per year Annual compensation review Recognition rewards Annual holiday leave Maternity and paternity leave Employee Assistance Programme Opportunity to travel to new locations to meet colleagues Priority Pass, and travel upgrades for long haul company events About Canonical Canonical is a pioneering tech firm at the forefront of the global move to open source. As the company that publishes Ubuntu, one of the most important open source projects and the platform for AI, IoT and the cloud, we are changing the world on a daily basis. We recruit on a global basis and set a very high standard for people joining the company. We expect excellence - in order to succeed, we need to be the best at what we do. Canonical has been a remote-first company since its inception in 2004. Working here is a step into the future, and will challenge you to think differently, work smarter, learn new skills, and raise your game. Canonical is an equal opportunity employer We are proud to foster a workplace free from discrimination. Diversity of experience, perspectives, and background create a better work environment and better products. Whatever your identity, we will give your application fair consideration.

Ubuntu Linux, already the most popular Linux distribution in the world, is looking to increase its adoption even further by expanding the number of System On Chip (SoC) platforms supported natively and further optimising to ensure the highest performant experience for all users. There is a strong demand from silicon manufacturers such as NVIDIA, Xilinx, MediaTek, and Qualcomm to provide Ubuntu Linux to their customers and Canonical is looking to broaden its silicon enablement squads to meet this challenge. The Canonical Kernel Team - those responsible for the build, maintenance, and distribution of the Linux kernel for Ubuntu - are looking for individuals with a strong flair for software development at the hardware level and a passion for ensuring the most optimal performance the silicon can provide. The successful candidate will be able to prove a strong aptitude for software engineering at the hardware level. While direct experience with the Linux kernel would be a substantial advantage, it is not a hard requirement for candidates with prior background in other RTOS' or bare-metal environments as long as direct hardware experience can be demonstrated. There are a number of work-from-home based roles available worldwide and we are looking for experience levels from early career candidates with a couple of years under their belt up through senior industry veterans. What your day will look like Collaborate regularly and proactively with a globally distributed team Work closely with our silicon vendor partners to integrate their platform support into the Ubuntu Linux kernel for their product ranges Diagnose and resolve issues in the kernel reported by partners, customers, the community at large, and discovered by your own rigorous testing Take responsibility for the delivery of distinct silicon-optimised variants of the Ubuntu Linux kernel to the world Improve tooling and automation for the delivery and test of Ubuntu Linux kernels Submit, review, and apply kernel patches, working with both internal and external upstream maintainers Identify new means of maximising performance on partner silicon What we are looking for in you Well-organised and motivated self-starter able to thrive in a remote work environment Professional manner with colleagues, business partners, and the open-source community Ability to communicate effectively in English, both written and verbal Significant programming ability in C Strong grasp of device drivers, BSP's, and other aspects of hardware-level system engineering Solid background with git Understanding of operating system kernel fundamentals Ability to travel twice a year for company events of up to two weeks length Additional skills that you might also bring Python and Bash scripting ability Prior background with the major SoC families Ubuntu/Debian/Snap packaging Demonstrated experience with Linux kernel patching and debugging Solid understanding of performance optimisation for silicon platforms What we offer you We consider geographical location, experience, and performance in shaping compensation worldwide. We revisit compensation annually to ensure we recognise outstanding performance. In addition to base pay, we offer a performance-driven annual bonus. We provide all team members with additional benefits, which reflect our values and ideals. We balance our programs to meet local needs and ensure fairness globally. Home-based work environment with twice-yearly team sprints in person Personal learning and development budget of USD 2,000 per year Annual compensation review Recognition rewards Annual holiday leave Maternity and paternity leave Employee Assistance Programme Opportunity to travel to new locations to meet colleagues Priority Pass, and travel upgrades for long haul company events About Canonical Canonical is a pioneering tech firm at the forefront of the global move to open source. As the company that publishes Ubuntu, one of the most important open source projects and the platform for AI, IoT and the cloud, we are changing the world on a daily basis. We recruit on a global basis and set a very high standard for people joining the company. We expect excellence - in order to succeed, we need to be the best at what we do. Canonical has been a remote-first company since its inception in 2004. Working here is a step into the future, and will challenge you to think differently, work smarter, learn new skills, and raise your game. Canonical is an equal opportunity employer We are proud to foster a workplace free from discrimination. Diversity of experience, perspectives, and background create a better work environment and better products. Whatever your identity, we will give your application fair consideration.

Role: Hardware Engineer Location: Hyderabad and Bangalore Experience : 3- 8 yrs Role & responsibilities Should have experience in Aerospace Industry. High speed Mixed Signal Design Expertise (FPGA, SoC, MPSoC, RFSoC, Versal). Knowledge in designing of power Modules (Regulators, Switchers, DC-DC convertors, etc). Understanding of schematic design in Orcad/Altium. Hands on experience in Design and debug on interfaces such as I2C, UART, SPI, AFDX, Ethernet, 1553 etc. Knowledge in memories Like Nand Flash, Nor Flash, SD-Ram(DDR), EEprom, NVSram,emmc. Knowledge in Circuit design, circuit simulation, calculation and analysis of circuit(SI, PI, Derating, MTBF ). Documentation. Good communication skills & Interaction with Clients/ Inspection agency.

This requirement is for design and development for candidates with experience and working knowledge of latest AMD/Xilinx FPGAs/SoC/Versal/Alveo/RFSoC devices Responsibilities Candidate will be responsible for firmware coding, hardware implementation using VHDL/Verilog/Python/C/C++. Candidate will be responsible for embedded system design, digital readout system designs, ADC/DAC interfacing, High Speed RF design and AI/ML implementation on FPGA platform development. Qualifications BTech / MTech in Electronics / VLSI / Embedded Systems / Computer Science Minimum 3+ experience in FPGA design and development is mandatory. Only core experience will be considered. Freshers will not be considered. Practical Exposure to FPGA design is mandatory Must have at least one strong skill out of the ones listed under "responsibilities" Must be self driven with strong analytical skills and must be a quick learner Must have good communication skills Must be hard working and focused

Job Description: Understand customers requirements /specifications /tender enquiry. Define DSP, System and Board architecture. Project ownership from concept to delivery. This includes identifying risks, dependencies, creating mitigation plan, tracking project schedule, discussions with customers, design reviews. Partition the algorithms for implementing in FPGA and/or in SW. Identify the building blocks & Signal Processing functions. Provide estimates on FPGA resources, computation bandwidth, and memory bandwidth. Create module level details from architecture, coding, simulation and perform peer reviews. Apply the methodologies for design, verification or validation. Define, create and maintain all project related documentation, especially design documents with detailed analysis reports. Provide support to customer during integration phases at test sites and support to production teams. Defining the architecture of RTL functions HDL Coding Simulation and Implementation Testing on board and debugging Professional Skills: VHDL Knowledge Xilinx tools for synthesis and implementation Thorough understanding of Xilinx FPGAs Functional Simulation Hardware Design : Logic Design & Debugging expertise FPGA Design : VHDL/Verilog RTL Coding, System C/ System Verilog FPGA Synthesis & PAR Tools Implementing DSP algorithms in FPGA environment for Radar and Electronic Warfare systems. Modeling the algorithms in Octave/MATLAB, generating test vectors, visualizing data. Working knowledge on interfacing with ADCs and DACs and interpreting their performance. Fluency, good communication & presentation skills. Configuration/Version control tools like SVN

Role Purpose The purpose of the role is to support process delivery by ensuring daily performance of the Production Specialists, resolve technical escalations and develop technical capability within the Production Specialists. Do Oversee and support process by reviewing daily transactions on performance parameters Review performance dashboard and the scores for the team Support the team in improving performance parameters by providing technical support and process guidance Record, track, and document all queries received, problem-solving steps taken and total successful and unsuccessful resolutions Ensure standard processes and procedures are followed to resolve all client queries Resolve client queries as per the SLAs defined in the contract Develop understanding of process/ product for the team members to facilitate better client interaction and troubleshooting Document and analyze call logs to spot most occurring trends to prevent future problems Identify red flags and escalate serious client issues to Team leader in cases of untimely resolution Ensure all product information and disclosures are given to clients before and after the call/email requests Avoids legal challenges by monitoring compliance with service agreements Handle technical escalations through effective diagnosis and troubleshooting of client queries Manage and resolve technical roadblocks/ escalations as per SLA and quality requirements If unable to resolve the issues, timely escalate the issues to TA & SES Provide product support and resolution to clients by performing a question diagnosis while guiding users through step-by-step solutions Troubleshoot all client queries in a user-friendly, courteous and professional manner Offer alternative solutions to clients (where appropriate) with the objective of retaining customers and clients business Organize ideas and effectively communicate oral messages appropriate to listeners and situations Follow up and make scheduled call backs to customers to record feedback and ensure compliance to contract SLAs Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client Mentor and guide Production Specialists on improving technical knowledge Collate trainings to be conducted as triage to bridge the skill gaps identified through interviews with the Production Specialist Develop and conduct trainings (Triages) within products for production specialist as per target Inform client about the triages being conducted Undertake product trainings to stay current with product features, changes and updates Enroll in product specific and any other trainings per client requirements/recommendations Identify and document most common problems and recommend appropriate resolutions to the team Update job knowledge by participating in self learning opportunities and maintaining personal networks Deliver NoPerformance ParameterMeasure1ProcessNo. of cases resolved per day, compliance to process and quality standards, meeting process level SLAs, Pulse score, Customer feedback, NSAT/ ESAT2Team ManagementProductivity, efficiency, absenteeism3Capability developmentTriages completed, Technical Test performance Mandatory Skills: FPGA Design. Experience5-8 Years.

What is Armory? What we are building requires hard work, tenacity, ownership, creativity and way more man-hours than an everyday job. If you are a savant at what you do, love autonomy, have high agency and genuinely want to impact the future of this country, we want you to work with us starting yesterday! Modern conflicts waged remotely demand a radical rethinking of strategy as adversaries deploy inexpensive drones and technology to inflict maximum damage with minimal risk. If you prefer routine over the dynamic unpredictability of innovation, Armory isn't for you. Our fast-paced environment requires genuine curiosity, resilience, a passion for continuous learning, and comfort with rapid change. Armory is a new age defence tech startup building next-generation products to strengthen Indian forces in the modern battlefields. About the founder Amardeep Singh is an IIT Bombay alumnus & an aerospace engineer by education. He was a founding member of ideaForge - currently India’s biggest drone company & the first drone company to get listed on the Indian stock exchange. His 16-year entrepreneurial journey is marked by a series of ambitious ventures spanning across diverse tech domains like Drones, Consumer Hardware, B2B SaaS & AI. About this role You will be responsible for designing, implementing, and optimizing DSP algorithms and firmware for our state-of-the-art RF products and radar systems. Develop and implement real-time DSP algorithms for radar signal processing, including pulse compression, micro-Doppler processing, and target detection. Work with Software Defined Radios (SDRs), including RFSoC, to optimize signal acquisition and processing. Design and optimize firmware for radar data acquisition, processing, and control. Collaborate with cross-functional teams, including RF engineers and software developers, to integrate DSP firmware into the RF hardware system. Perform tests and troubleshoot RF system to ensure functionality and compliance with regulatory standards. Stay up-to-date with the latest trends and advancements in RF technology. Must haves Min. 15 years of experience in developing DSP algorithms and firmware, with a strong focus on Signal Intelligence (SigInt) applications. Hands-on experience with COMINT and ELINT signal processing. Experience with Software Defined Radios (SDRs) and RFSoC-based implementations. Strong understanding of radar signal processing concepts, including Pulse compression, Doppler processing, Beam-forming, Angle of Arrival/Estimation, DOA, MIMO & CFARs. Experience with communication protocols such as OFDM, QAM, and radar signal processing. Proficiency in programming languages such as C/C++, Python and MATLAB, with experience in developing real-time embedded firmware. Proficiency in working with DSP processors (TI, ADI, Xilinx, or equivalent). Strong debugging skills using lab instruments (oscilloscopes, spectrum analysers, logic analysers). Strong communication and collaboration abilities. Bonus points for Experience in designing and optimizing radar system FMCW chirps. Knowledge of radar architectures, including pulsed, CW, and FMCW radars. Experience with specific radar architectures, such as synthetic aperture radar (SAR) or phased array radar. Knowledge of radar performance metrics and analysis techniques, such as signal-to-noise ratio (SNR), probability of detection, and false alarm rate. Familiarity with radar performance metrics, such as range resolution, Doppler resolution, and sensitivity. Familiarity with radar system simulation tools, such as MATLAB Simulink or SystemVue. Experience with hardware-in-the-loop (HIL) testing and validation of radar systems. Kindly avoid "easy apply" and use the link below to apply: https://armoryshield.zohorecruit.in/jobs/Careers/128390000000334295/RF-Digital-Signal-Processing-Engineer?source=CareerSite

Ubuntu Linux, already the most popular Linux distribution in the world, is looking to increase its adoption even further by expanding the number of System On Chip (SoC) platforms supported natively and further optimising to ensure the highest performant experience for all users. There is a strong demand from silicon manufacturers such as NVIDIA, Xilinx, MediaTek, and Qualcomm to provide Ubuntu Linux to their customers and Canonical is looking to broaden its silicon enablement squads to meet this challenge. The Canonical Kernel Team - those responsible for the build, maintenance, and distribution of the Linux kernel for Ubuntu - are looking for individuals with a strong flair for software development at the hardware level and a passion for ensuring the most optimal performance the silicon can provide. The successful candidate will be able to prove a strong aptitude for software engineering at the hardware level. While direct experience with the Linux kernel would be a substantial advantage, it is not a hard requirement for candidates with prior background in other RTOS' or bare-metal environments as long as direct hardware experience can be demonstrated. There are a number of work-from-home based roles available worldwide and we are looking for experience levels from early career candidates with a couple of years under their belt up through senior industry veterans. What your day will look like Collaborate regularly and proactively with a globally distributed team Work closely with our silicon vendor partners to integrate their platform support into the Ubuntu Linux kernel for their product ranges Diagnose and resolve issues in the kernel reported by partners, customers, the community at large, and discovered by your own rigorous testing Take responsibility for the delivery of distinct silicon-optimised variants of the Ubuntu Linux kernel to the world Improve tooling and automation for the delivery and test of Ubuntu Linux kernels Submit, review, and apply kernel patches, working with both internal and external upstream maintainers Identify new means of maximising performance on partner silicon What we are looking for in you Well-organised and motivated self-starter able to thrive in a remote work environment Professional manner with colleagues, business partners, and the open-source community Ability to communicate effectively in English, both written and verbal Significant programming ability in C Strong grasp of device drivers, BSP's, and other aspects of hardware-level system engineering Solid background with git Understanding of operating system kernel fundamentals Ability to travel twice a year for company events of up to two weeks length Additional skills that you might also bring Python and Bash scripting ability Prior background with the major SoC families Ubuntu/Debian/Snap packaging Demonstrated experience with Linux kernel patching and debugging Solid understanding of performance optimisation for silicon platforms What we offer you We consider geographical location, experience, and performance in shaping compensation worldwide. We revisit compensation annually to ensure we recognise outstanding performance. In addition to base pay, we offer a performance-driven annual bonus. We provide all team members with additional benefits, which reflect our values and ideals. We balance our programs to meet local needs and ensure fairness globally. Home-based work environment with twice-yearly team sprints in person Personal learning and development budget of USD 2,000 per year Annual compensation review Recognition rewards Annual holiday leave Maternity and paternity leave Employee Assistance Programme Opportunity to travel to new locations to meet colleagues Priority Pass, and travel upgrades for long haul company events About Canonical Canonical is a pioneering tech firm at the forefront of the global move to open source. As the company that publishes Ubuntu, one of the most important open source projects and the platform for AI, IoT and the cloud, we are changing the world on a daily basis. We recruit on a global basis and set a very high standard for people joining the company. We expect excellence - in order to succeed, we need to be the best at what we do. Canonical has been a remote-first company since its inception in 2004. Working here is a step into the future, and will challenge you to think differently, work smarter, learn new skills, and raise your game. Canonical is an equal opportunity employer We are proud to foster a workplace free from discrimination. Diversity of experience, perspectives, and background create a better work environment and better products. Whatever your identity, we will give your application fair consideration.

Job description The selected candidate will be responsible for implementing control functions (telemetry and telecommand processing and associated coarse-time functions) in the application of different subsystems in state-of-the-art spaceborne payloads for high-performance applications in indigenous private-sector satellites in India. The work typically may involve, but not necessarily be limited to, the following activities: Understanding control, telemetry and telecommand requirements in operating payloads in orbit and implementing them at subsystem level Evolving efficient firmware architectures and coding for required performance goals in C/C++ Be a team contributor, code for parts of a larger functionality especially seamless integration with high-speed FPGA hardware and test the integrated firmware for requisite performance Part take in the full development cycle and not just design or verification , and be responsible for subsystem level outcome in an integrated system Prepare documents necessary at different stages and be able to interact with QA/QC guidelines and facilitate assurance of code compliance to a given standard including subsystem ICDs As a general rule, Azista requires that all engineers take an enthusiastic part in whatever activity they are required to contribute to in order to make the missions and the company successful. Abilities Required: The knowledge base required in the candidate will in general be a clear understanding of the fundamentals of Expert level sequential coding ability (C/C++) for the embedded environment, a significant experience profile in doing this. Excellent familiarity with the latest microcontroller architectures and a highly desirable experience in instantiating either processor soft cores or the use of hard cores provided in FPGAs Good knowledge and understanding of microcontroller peripheral interfacing standards like UART, SPI, I2C, CAN, SPACEWIRE etc Some desirable knowledge of the architectures of modern high-density FPGAs and SoC Devices from Xilinx (Now AMD) or Actel (Now Microchip) FPGAs Very good experience in actually porting developed code into the hardware platforms and testing the same for target performance characteristics, and the skill in spotting problems and be able to relate observations in tests back to necessary refinements in code Exposure to safe coding practices and high-reliability engineering Qualification: The successful candidate is likely to have An electronics degree, masters preferred but not necessary A consistent career in microcontroller firmware design and coding (6 to 10 years at least) Very good C/C++ Coding skills, knowledge of coding standards and practices Good experience in debugging systems, including the ability to probe hardware and make sense of the observations A good knowledge of hardware concepts and basic circuit theory Note: Interviews are likely to be multi-level very detailed. Please who do not check most of the points above may not be suitable at all. Experience: A consistent career in microcontroller firmware design and coding (6 to 10 years at least) Apply for a Microcontroller Firmware Designer Position Full name Contact number Email address Qualification Working experience

The selected candidate will be responsible for implementing high speed high volume data processing requirements on high density FPGA based hardware. These subsystems are the hearts of satellites and store data gathered on the eternal sojourns of satellites in orbits and send the data down interactively with ground commands. Azista is engaged in the making of state-of-the-art spaceborne payloads for high performance applications in indigenous private sector satellites in India. The work typically may involve, but not necessarily be limited to, the following activities: Understanding onboard image data processing, encryption and packetization (CCSDS) needs and the nuances of indexing, annotating, and storing data and evolving efficient architectures for implementing such functions in FPGA code. Be responsible for coding the above functionalities, porting the successful code and complete the in-situ validation process for the subsystems for flight readiness Be a team contributor, code for parts of a larger functionality and seamless integrate and test the integrated firmware Partake in the full development cycle and not just design or verification, and be responsible for subsystem level outcome in an integrated system Prepare documents necessary at different stages and be able to interact with QA/QC guidelines and facilitate assurance of code compliance to a given standard As a general rule, Azista requires that all engineers take enthusiastic part in whatever activity they are required to contribute to in order to make the missions and the company successful. The knowledge base required in the candidate will in general be a clear understanding of the fundamentals of Coding for FPGA environment, a significant experience profile of doing this. Excellent familiarity and skill in VHDL (or Verilog) and with MATLAB, and porting from it Knowledge of the architectures of modern high-density FPGAs and SoC Devices from Xilinx (Now AMD) or Actel (Now Microchip) FPGAs and familiarity with the use of these Excellent familiarity with the development environments for these devices and the simulation and pre-burn performance validation tools Very good experience of actually porting developed code into the hardware platforms and test the same for target performance characteristics, and the skill in spotting problems and be able to relate observations in tests back to necessary refinements in code Exposure to safe coding practices and high reliability engineering Specific successful design experience with at least two of the following: Encryption, AES standards; desirable exposure to custom encryption with significantly longer keys Data compression techniques, especially image data CCSDS standards for data handling The successful candidate is likely to have An electronics degree, masters preferred but not necessary A consistent career in FPGA based firmware design and coding (6 to 10 years at least) with exposure to high density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully in high volume data handling including Encryption/Compression/CCSDS etc Good experience in debugging systems, including the ability to probe hardware and make sense of the time domain / frequency domain observations A good knowledge of how to estimate rough-order-of-magnitude power consumption figures of FPGA designs even before a full design is evolved Note: Interviews are likely to be multi-level very detailed. Please who do not check most of the points above may not be suitable at all. A consistent career in FPGA based firmware design and coding (6 to 10 years at least) with exposure to high density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs FPGA Firmware Designer (FFW-004) Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

The selected candidate will be responsible for implementing high-speed high-volume data generation and handling requirements on FPGA-based hardware, including storage in and playback from SSDs/SSRs and high-speed serial (SERDES, going to several Gbps) / Parallel (LVDS exceeding a hundred MHz). The subsystems are for use in state-of-the-art spaceborne payloads for high-performance applications in indigenous private-sector satellites in India. The work typically may involve, but not necessarily be limited to, the following activities: Understanding hardware component/environment capabilities, requirements and limitations and evolving firmware architectures and coding for required performance goals. Be a team contributor, code for parts of a larger functionality and seamlessly integrate and test the integrated firmware Partake in the full development cycle and not just design or verification, and be responsible for subsystem level outcomes in an integrated system Prepare documents necessary at different stages and be able to interact with QA/QC guidelines and facilitate assurance of code compliance to a given standard As a general rule, Azista requires that all engineers take an enthusiastic part in whatever activity they are required to contribute to in order to make the missions and the company successful. The knowledge base required in the candidate will in general be a clear understanding of the fundamentals of Coding for FPGA environment, a significant experience profile of doing this. Excellent familiarity and skill in VHDL (or Verilog) Knowledge of the architectures of modern high-density FPGAs and SoC Devices from Xilinx (Now AMD) or Actel (Now Microchip) FPGAs and familiarity with the use of these Excellent familiarity with the development environments for these devices and the simulation and pre-burn performance validation tools Very good experience in actually porting developed code into the hardware platforms and testing the same for target performance characteristics, and the skill in spotting problems and be able to relate observations in tests back to necessary refinements in code Exposure to safe coding practices and high-reliability engineering Specific successful design experience with at least one of the following: Implementation of high-speed SERDES data links going to several Gbps and testing for the same Implementation of SSD interfaces and familiarity with modern SSD interface standards Implementation of gigabit ethernet solutions in FPGA environments and testing for the same The successful candidate is likely to have An electronics degree, masters preferred but not necessary A consistent career in FPGA-based firmware design and coding (6 to 10 years at least) with exposure to high-density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully Good experience in debugging systems, including the ability to probe hardware and make sense of the time domain/frequency domain observations A good knowledge of how to estimate rough-order-of-magnitude power consumption figures even before a full design is evolved Note: Interviews are likely to be multi-level and very detailed. Please who do not check most of the points above may not be suitable at all. A consistent career in FPGA-based firmware design and coding (6 to 10 years at least) with exposure to high-density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

FPGA design engineer will take part in the design domains of signal processing and data processing, image processing, other high-speed and control applications, implementing these functions on high-density state of the art FPGAs. Work may include specifying, architecture/microarchitecture definition and hands-on implementation work for every aspect of FPGA design, working closely with the system, software, and FPGA design and verification, guide and mentor juniors in the areas and Delivery of expert level technical support in the resolution of FPGA application issues at programming level. In addition to the FPGA implementation, the engineers are expected to understand subsystem/algorithm level behaviour of such designs and be able infer the necessary hardware design/resources necessary for a given subsystem level specification. Work may involve HDL level coding/verification/testing and/or System C coding levels and taking ownership of all aspects of the design verification of the FPGA chips and/or its functional blocks. Examples of possible micro streams of work: CCD/CMOS Image array readout at high speeds Formatting such data and serial or parallel transmission of the same to other subsystems Implementation of complex image or signal processing algorithms Implementation of i/o rich control functions to interface a large number of subsystems to central controllers. Working closely with microcontroller programmers, instantiation of controllers with sequential code inside FPGAs etc mapping algorithms and standards (PCIe, NVMe, SATA,USB, Ethernet, TCP/IP, TCP/IP off load engine (TOE), SERDES, LVDS, and Memory Controllers DDR2/DDR3 ) to hardware and architecture/system design trade-offs standard bus protocols, including I2C, SPI, USB, PCIe. Candidates should preferably have good quantitative aptitude and understand analy Content coding like Verilog/VHDL, or System C or equivalent, exposure to complex/high density FPGAs and FPGA-SoCs Familiarity with Matlab and Simulink Vitis Unified Software Platform - Xilinx or similar Bachelors in Electronics or equivalent stream and a minimum of 10 years experience or Masters Degree in a related specialization with a minimum of 8 years experience in Electronics Design/Embedded Electronics, out of which the most recent 6 years must have been in state of the art high density FPGA environments. FPGA Design Engineer Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

The selected candidate will be responsible for evolving hardware designs for specialized electronic subsystems (going to hundreds of MHz operational frequency, tens of Gbps data throughput and involving devices like FPGAs with thousand pins or more) based on subsystem functional requirements available from system designers. The work typically may involve, but not necessarily be limited to, the following activities: Understanding subsystem requirements available from system designers and identifying a core electronic hardware architecture to fulfil the same Identify a suitable critical BoM commensurate with the functional requirements and project schedules Prepare block-diagram level design and present for review Initiate procurement activity for the components Prepare (or help preparation of, as the case may be) schematics for the designs and design analysis documents for review Guide the design of PCBs (likely to be multilayer high-speed boards with FPGAs of 1000 pins or more) Oversee outsourced component mounting in accordance with quality requirements Carry on board bring up tests Interact with software designers to prepare appropriate test cases and exercise the external ICD and on-board performance parameters Test the design for integrity over temperature, vibration and vacuum tolerance and other environmental validation requirements (may involve EMI/EMC also) Hand over the qualified hardware to software designers to take the development forward. Present the designs to various reviews during the developmental and project phases and incorporate the respective comments As a general rule, Azista requires that all engineers take an enthusiastic part in whatever activity they are required to contribute to in order to make the missions and the company successful. The knowledge base required in the candidate will in general be a clear understanding of the fundamentals of Circuit theory and electronics in general, the behaviour of different electronic components Good skills in reading and understanding data sheets, interpreting data sheet information qualitatively and quantitatively and know how to translate them into schematic-level topographies Knowledge of how to build schematics including high-density devices like FPGAs with more than a thousand pins The nuances of high-speed high-density designs and a good knowledge of PCB design fundamentals to guide the PCB designers properly for ensuring intended performance. The successful candidate is likely to have An electronics degree, masters preferred but not necessary A consistent career in hardware design of (6 to 10 years at least) with exposure to high-density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs Exposure to high-speed and/or RF design (Only RF design is NOT suitable) A desirable experience in high-speed SERDES-based designs with modern FPGAs Exposure to high-speed data handling and memory interfacing like DDR3/4 A knowledge of how to do peripheral design around modern high-speed FPGAs like decoupling needs, power quality and POL conditioning including meeting sequencing needs A good knowledge of how to estimate rough-order-of-magnitude power consumption figures even before a full design is evolved Note: Interviews are likely to be multi-level and very detailed. Please who do not check most of the points above may not be suitable at all. A consistent career in hardware design of (6 to 10 years at least) with exposure to high-density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.