277 X86 Jobs - Page 10

Job Summary If you are a Embedded software engineering professional, Emerson has an exciting role for you! We are looking for a Embedded software engineer to work with our controls and software team. This role will work independently and as a part of a team and will be involved in development of real-time embedded software user stories and implement requirements with a focus on quality and performance. You must have a passion for learning, and the ability to apply that learning in a practical manner to your high-quality work In This Role, Your Responsibilities Will Be: As an Embedded Software Engineer, you will use your software skills to develop new features and solve customer problems in our control system products. Work in small, self-motivated teams collaborating with global Scrum teams. Be involved in all phases of software development from product definition to production release. Use Agile software development practices to build and test our products using Continuous Integration. Break down problems and estimate time for development tasks. Work with cross functional teams (i. e. Software, Hardware, System Test and Product Management) to accomplish your assignments. Develop deep domain expertise while working on various assignments in control system platforms. Drive world-class quality in the development and support of products. WHO YOU ARE You can take quick and decisive actions in constantly evolving, unexpected situations. Showing a tremendous amount of initiative in tough situations; is outstanding at spotting and seizing opportunities. Have a clear sense of ownership in accomplishing objectives despite obstacles and setbacks. Open to work collaboratively with others across the organization to achieve shared objectives. Like to encourage the expression of diverse ideas and opinions. For This Role, You Will Need: Bachelor s or master s degree in Computer science/Electronics and Communication/Electrical Engineering. 3 to 6 years of Embedded software development experience in with Intel x86/ ARM architectures-based microprocessors/controllers. Strong expertise and experience in C/C++ Programming languages Good Knowledge in RTOS concepts. Good understanding of TCP/IP, UDP and Serial based protocols like Modbus, Profinet, Profibus. . etc. Ability to read hardware schematics and use of debugging instruments like oscilloscope, logic analyzers. Experience with standard JTAG based debuggers for debugging the system. Experience with Agile development process. Good understanding of Continuous Integration and deployment systems used in software development. Strong analytical and problem-solving skills Strong written and oral communication skills Preferred Qualifications that Set You Apart: Experience with Programmable Logic Controllers Having firmware development experience with Xilinxs Ultrascale SOC is an added advantage Experience in scripting languages like Python Our Culture Commitment to You . .

System Programming with strong fundamentals in C Programming Experience in the area of Intel X86 processor-based system architectures, processor and chipsets, Memory management, Error management etc. Experience in EDKIi, Open-Source BIOS development and Initialization functionality for enterprise servers. In-depth understanding of Industry standards, such as, BMC, CPU (Intel X86), Intel PCH, MRC, PCle. HW debugging experience - ITP, Lauterbach or similar HW Debugging tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 6 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg.I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.

We re looking for DevOps Engineer to: propose and implement systems enhancements improve security posture of the development tools and applications built using the tools monitor usage and performance, and troubleshoot server and software issues analyze complexity and feasibility of new or changed requirements within specified architecture, define platform requirement sizing and controlling components plan, evaluate, migrate, develop, implement, configure, test and roll out systems (hardware or software, networks, controls) analyze outages and defective states, initiating and monitoring measures to remedy them install and administer Continuous Integration and Continuous Deployment tools Youll be working in the Core Platform Engineering team. Its part of Group CTO which is part of the global Technology Services division. You ll be focusing on DevOps tools engineering, Azure infrastructure. The team is truly agile and distribute across multiple locations, as a result you will gain valuable experience working with world-class IT and Banking expertise (including Europe, US and APAC). Diversity helps us grow, together. That s why we are committed to fostering and advancing diversity, equity, and inclusion. It strengthens our business and brings value to our clients ideally 7 years of experience and good knowledge of RedHat Linux and Solaris x86 Unix environments with scripting skills GitLab / GitHub / Azure Kubernetes Service / TeamCity / Jenkins / Nexus Repo administrator with installation and configuration experience working experience in configuring project build automation using Maven, Gradle, etc. strong background regarding Continuous Integration build chain and the tools and development processes strong knowledge and hands on experience on Kubernetes good understanding of Networking and storage good scripting knowledge of Unix shell and windows PowerShell strong knowledge of helm strong analytic and problem solving skills

Work Location : Bangalore, Belgrade, Penang, New York Work Expertise : 5 - 15 years Job Specs : - Expertise in the x86 BIOS / UEFI FSP / coreboot development - Expertise with x86 CPU/APU architectures and associated compilation tools - Expertise in C programming - Expertise with platform bring-up - Expertise with standard protocols like PCIe, SPI, eSPI, ACPI, SMM - Expertise with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. - Expertise on working with Intel FSP package source code and understanding of coreboot & FSP boot flow - Expertise with different coreboot payloads like edk2, SeaBios, Tianocore etc - Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required - Good coreboot upstreaming exposure - Familiar with coreboot boot stages, upds, memory map, FSP, devicetree concept, payloads to OS bootloader handoff - Understanding of coreboot & FSP build tools and build processes - Good understanding of UEFI framework concepts to port UEFI code to FSP - Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. - Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. - Good understanding of x86-64 architecture from BIOS developer's perspective. - Good understanding of UEFI BIOS Boot flow. - Basic understanding of Linux Kernel like software development concepts (Kconfig).

Job TitleEngineer (DWDM Planning Tool Development) LocationBengaluru Work EmploymentFull time DepartmentWireless DomainSoftware Reporting toSenior Manager About Us: Tejas Networks is a global broadband, optical and wireless networking company, with a focus on technology, innovation and R&D. We design and manufacture high-performance wireline and wireless networking products for telecommunications service providers, internet service providers, utilities, defence and government entities in over 75 countries. Tejas has an extensive portfolio of leading-edge telecom products for building end-to-end telecom networks based on the latest technologies and global standards with IPR ownership. We are a part of the Tata Group, with Panatone Finvest Ltd. (a subsidiary of Tata Sons Pvt. Ltd.) being the majority shareholder. Tejas has a rich portfolio of patents and has shipped more than 900,000 systems across the globe with an uptime of 99.999%. Our product portfolio encompasses wireless technologies (4G/5G based on 3GPP and O-RAN standards), fiber broadband (GPON/XGS-PON), carrier-grade optical transmission (DWDM/OTN), packet switching and routing (Ethernet, PTN, IP/MPLS) and Direct-to-Mobile and Satellite-IoT communication platforms. Our unified network management suite simplifies network deployments and service implementation across all our products with advanced capabilities for predictive fault detection and resolution. As an R&D-driven company, we recognize that human intelligence is a core asset that drives the organization’s long-term success. Over 60% of our employees are in R&D, we are reshaping telecom networks, one innovation at a time. Why join Tejas: We are on a journey to connect the world with some of the most innovative products and solutions in the wireless and wireline optical networking domains. Would you like to be part of this journey and do something truly meaningful? Challenge yourself by working in Tejas’ fast-paced, autonomous learning environment and see your output and contributions become a part of live products worldwide. At Tejas, you will have the unique opportunity to work with cutting-edge technologies, alongside some of the industry’s brightest minds. From 5G to DWDM/ OTN, Switching and Routing, we work on technologies and solutions that create a connected society. Our solutions power over 500 networks across 75+ countries worldwide, and we’re constantly pushing boundaries to achieve more. If you thrive on taking ownership, have a passion for learning and enjoy challenging the status quo, we want to hear from you! Who we are: Our team submits contributions to the standards organization like IEEE, ITU-T, ITU-R, 3GPP RAN/SA, etc. and has generated more than 200 patents in various technology areas like TCP, IP/MPLS, MAC/Ethernet, SDH, DWDM, Routing, Scheduling, Optimization, Operation Research, 4G/LTE, 5G/NR, Protection Switching, etc. The team is expected to have a sound knowledge in the following theoriesstochastic processes and communication networking, RF circuit design and VLSI, digital signal processing, and operations research, and have sound programming skills for the purpose of prototyping in at-least one of the languagesC, C++, Python, VB, etc. Many next-generation prototypes developed by Technology domain team evolved to commercial grade products and have won many awards globally. What you work: As a technical member, you will contribute in regression and testing the state-of-the-art optical network planning system. Closely work with other teams and partners to carry out development, regression and user acceptance testing. Focus to continuously improve system performance with quality deliverables. Mandatory skills: Experience in DWDM planning tool development. Experience in Python, with knowledge of Django Framework. Familiarity with Django ORM (Object Relational Mapper). Familiar with various design and architectural patterns. Sound knowledge of Databases – MySQL, Postgres is a must. Hands on Linux operating system. Preference to candidates with exposure to ARM, Intel x86, etc. Architecture Desired skills: Linear Algebra, Probability, or any two Engineering Mathematics subjects, plus mandatory Computer networks. Additionally, if CS/ITData Structures and Algorithms, or any two core subjects. Additionally, if ECEStochastic Processes, Communication systems, or any two core subjects. Should be a team player. Should be curious to lear new things. Preferred Qualifications: E xperience: 1-3 years’ experience from Telecommunication, Opto-electronics or Optical Networking background. Education: Tech/BE/M.Tech/PhD (CSE/ECE/EEE/IS) or any other equivalent degree. Candidate should be good at coding skills in Python Diversity and Inclusion Statement : Tejas Networks is an equal opportunity employer. We celebrate diversity and are committed to creating all inclusive environment for all employees. We welcome applicants of all backgrounds regardless of race color, religion, gender, sexual orientation, age or veteran status. Our goal is to build a workforce that reflects the diverse communities we serve and to ensure every employee feels valued and respected.

Hiring for Linux Device Driver Developer. Mandatory skill set- C Linux device Driver Kernel module User space X86 multi core processor

Develop and optimize C/C++ applications for high-performance systems using OOP principles, multi-threading, and networking (TCP/UDP). Work on x86 and ARM-based systems, including microcontroller and processor-based designs (NXP, ARM architecture). Implement driver development for Ethernet, PCI, and communication protocols such as SPI, I2C, UART, Ethernet, RS422, and RS485. Configure and maintain bootloaders and ensure seamless interaction between kernel and user-space components. Develop software for ASIC prototyping in FPGAs using ARM core-based designs and AXI bus programming. Perform unit testing, integration testing, and software maintenance, ensuring adherence to quality standards. Collaborate with cross-functional teams to integrate software with hardware systems. Document technical processes and findings and present results to internal teams and stakeholders. Skills : - x86 ,ARM-based systems, microcontroller , processor-based designs, Ethernet, PCI, communication protocols, ASIC prototyping in FPGAs, ARM core-based designs and AXI bus, bootloaders, kernel/user-space interactions, and open-source tools

Essential Duties and Responsibilities: Responsible for defining, implementing, executing, and documenting embedded software for Baxter s peritoneal dialysis device portfolio. The activities will encompass all facets and phases of software development & test and life cycle management, meeting all regulatory and quality standards to realize complex, innovative, reliable systems that improve the quality of life for people around the world. Collaborate with other engineering and functional organizations to understand and define product use cases and convert these use cases into software requirements and design implementations. Own and lead all activities of software sub-system development and life-cycle management including sub-system development plans, SW requirements development, code development and optimization, unit and integration testing, SW risk and reliability analysis, root cause analysis. Transform software requirements into software architectures and verify that all software projects adhere to architecture standards. Lead concept selection efforts and design alternatives. Devise simulator solutions for the product portfolio. Drive research on emerging software architecture techniques and standards. Champion technical and industry trends related to software design and development Ensure all interface requirements are documented. Provide leadership to teams of engineers in multiple sites. Define the test automation strategy and implementation. Coordinate the software test activities with all other engineering disciplines, including external development partners. Qualifications Graduate or Post Graduate in Computer Science or related Engineering and 10 - 15 years of experience, including technical leadership. Prior experience in Renal device domain is a plus. A demonstrated track record in embedded software development, preferably medical devices or other highly regulated products such as military hardware. A proven track record of effectiveness in a fast paced environment. Experience in algorithms, code optimization, encryption, multiple language support C, C++, Assembly ARM processor development. Ability to work in a Linux development environment ARM / AVR processor development FPGA programming skills Intel embedded X86 development a plus Experience in embedded RTOS development Experience with USB, Ethernet, RS232 communications protocols Experience with sensor sampling Ability to develop boot loader code for microcontrollers Working level knowledge with standards such as IEC 62304, IEC 62366, IEC 60601, ISO 13485 and ISO14971 would be a plus.

Founded in 2023,by Industry veterans HQ in California,US We are revolutionizing sustainable AI compute through intuitive software with composable silicon RTL Design Engineer :- • Job Description o As a member of Design(RTL) team, you will be responsible for the microarchitecture and design of IPs/Controllers for SoC/SiP designs. o Perform architectural/design trade-offs for required product features, performance and system constraints. o Responsible for defining and documenting design specifications. o Develop and deliver a fully verified RTL to achieve the design targets and quality sign-off requirements. o Design and Implement logic functions that enable efficient test and debug. o Provide Debug support for design verification and post-silicon activities. • Skill and Experience Requirements: o Minimum 7 + years industry experience with Masters degree (preferred) or Bachelors degree in Electrical or Computer Engineering. o Hand-on experience with micro-architecture and RTL development (System Verilog) for x86/ARM CPU Processors or high-speed custom ASICs/Accelerators with focus on any one: Cache controller, IO interfaces (PCIe, CXL, Ethernet), UCIe, Memory controllers, Display, Video encoding/transcoding. o Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis and sign-off quality flows. o Self-starter with strong interpersonal and communication skills . o Excellent team player. .

Founded in 2023,by Industry veterans HQ in California,US We are revolutionizing sustainable AI compute through intuitive software with composable silicon Staff Design Verification Engineer Job Description In this role you will be responsible Chip Architects to validate the concepts of CPU and SOC level micro-architectures. You will work on a selected part of the CPU Design Verification to ensure that it functions to the standards of being launch ready for the end Product. Role And Responsibilities Partner with Architects and RTL Design team to grasp high-level system requirements and specifications. Formulate comprehensive test and coverage plans to match the Architecture and micro-architecture. Define and implement a verification methodology that supports scalability and portability across various environments spanning including post-silicon. Develop the verification environment and reusable bus functional models, stimulus, checkers, assertions, trackers, and coverage metrics. Create verification plans and develop testbenches tailored to assigned IP/Subsystem or functional domain. Execute verification plans, including tasks such as design bring-up, setting up the DV environment, running regressions for feature validation, and debugging test failures. Support post-Si bring-up and debug activities. Track and communicate progress in the DV process by using key metrics like bug tracking and coverage reports. Requirements Bachelors or Masters degree in Electrical or Computer Engineering/Science Strong Architecture domain knowledge in x86/ARM CPU, or Memory, Coherency, Virtualization or Performance areas. Must have strong expertise with SV/UVM methodology and/or C/C++ based verification with 7yrs+ hands-on experience in IP/sub-system and/or SoC level verification Hands on experience and expertise with industry standard verification tools for simulation and debug (Questa/VCS, Visualizer) Experience using random stimulus along with functional coverage and assertion based verification methodologies a must. Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation. Preferred Qualifications: Experience in development of UVM based verification environments from scratch. Hands on expertise and protocol knowledge in any of: APB/AXI/CHI, JTAG/I3C/SPI, , DDR5/LPDDR5/HBM, PCIE/CXL/UCIE/Ethernet compliance testing

At F5, we strive to bring a better digital world to life. Our teams empower organizations across the globe to create, secure, and run applications that enhance how we experience our evolving digital world. We are passionate about cybersecurity, from protecting consumers from fraud to enabling companies to focus on innovation. Everything we do centers around people. That means we obsess over how to make the lives of our customers, and their customers, better. And it means we prioritize a diverse F5 community where each individual can thrive. Our Employees Are valued and empowered, collaborative and team oriented, innovative in their approach and passionate about their work. They are reliable, trustworthy and open with a high level of integrity. They value diversity, are inclusive and are committed to a global mindset. About the Product Using high-performance DNS services, Global Traffic Manager (GTM) scales and secures your DNS infrastructure during high query volumes and DDoS attacks. It delivers a complete, real-time DNSSEC solution that protects against hijacking attacks. GTM improves the performance and availability of your applications by intelligently directing users to the closest or best-performing physical, virtual, or cloud environment. In addition, enables mitigation of complex threats from malware and viruses by blocking access to malicious IP domains. Position Summary Our team is at the cutting-edge of DNS technology. We are focused on providing customers with solutions to improve access to applications by securing and accelerating Domain Name resolution in hybrid cloud environments. Our team collaborates with other F5 Modular BIG-IP development teams to produce unique opportunities for cross-team development projects. This position is for a Software Engineer III with experience designing and developing application data management software in containerized and orchestrated environments. The engineer will collaborate with software architects and other technical leads to design software and interfaces for our next generation Modular BIG-IP. We are looking for talented software engineers with a track record of accomplishment in the design, implementation and maintenance of major software features. Appropriate candidates should also have a knack for delving into complex deployment configurations and delivering rapid solutions to challenging problems. Responsibilities Develop enterprise grade solutions for the F5 DNS products in containerized and orchestrated environments. Aggressively grow your skillset and expertise to meet the emerging needs of our customers using our new Modular BIG-IP technology Develop and maintain a strong CICD pipeline to efficiently diagnose and resolve critical issues prior to software releases. Work as part of a Scrum team while recommending and maintaining technical design methodologies, processes, and standards Qualifications 3+ year of professional experience in multi-platform network software development, in a commercial production environment. Bachelor degree in computer/engineering related field or equivalent work experience Proven programming skills/abilities in C, C++, and Go Experience with deploying infrastructure and services in one or more cloud environments such as AWS, VMware vSphere, Azure, Google cloud, Practical knowledge of Data Structures, Computer Algorithms and Design Patterns. Development experience in areas such as sockets, multithreading, and data structure optimization. Familiarity with TCP/IP networking a strong plus. Experienced with at least one scripting language such as Python, Perl, Understanding of regexes Development experience using Agile Scrum methodology and Git version control Background in Unix based operating systems specifically, x86/Linux Strong problem-solving and analytical skills Proven ability to deliver products with highest quality and on time Strong written and verbal communications skills Ability to interact and communicate effectively with users of our products. The About The Role is intended to be a general representation of the responsibilities and requirements of the job. However, the description may not be all-inclusive, and responsibilities and requirements are subject to change. Please note that F5 only contacts candidates through F5 email address (ending with @f5.com) or auto email notification from Workday (ending with f5.com or @myworkday.com ) . Equal Employment Opportunity It is the policy of F5 to provide equal employment opportunities to all employees and employment applicants without regard to unlawful considerations of race, religion, color, national origin, sex, sexual orientation, gender identity or expression, age, sensory, physical, or mental disability, marital status, veteran or military status, genetic information, or any other classification protected by applicable local, state, or federal laws. This policy applies to all aspects of employment, including, but not limited to, hiring, job assignment, compensation, promotion, benefits, training, discipline, and termination. F5 offers a variety of reasonable accommodations for candidates . Requesting an accommodation is completely voluntary. F5 will assess the need for accommodations in the application process separately from those that may be needed to perform the job. Request by contacting accommodations@f5.com.

At F5, we strive to bring a better digital world to life. Our teams empower organizations across the globe to create, secure, and run applications that enhance how we experience our evolving digital world. We are passionate about cybersecurity, from protecting consumers from fraud to enabling companies to focus on innovation. Everything we do centers around people. That means we obsess over how to make the lives of our customers, and their customers, better. And it means we prioritize a diverse F5 community where each individual can thrive. Our Employees Are valued and empowered, collaborative and team oriented, innovative in their approach and passionate about their work. They are reliable, trustworthy and open with a high level of integrity. They value diversity, are inclusive and are committed to a global mindset. About the Product Using high-performance DNS services, Global Traffic Manager (GTM) scales and secures your DNS infrastructure during high query volumes and DDoS attacks. It delivers a complete, real-time DNSSEC solution that protects against hijacking attacks. GTM improves the performance and availability of your applications by intelligently directing users to the closest or best-performing physical, virtual, or cloud environment. In addition, enables mitigation of complex threats from malware and viruses by blocking access to malicious IP domains. Position Summary Our team is at the cutting-edge of DNS technology. We are focused on providing customers with solutions to improve access to applications by securing and accelerating Domain Name resolution in hybrid cloud environments. Our team collaborates with other F5 Modular BIG-IP development teams to produce unique opportunities for cross-team development projects. This position is for a Senior Software Engineer with strong experience designing and developing application data management software in containerized and orchestrated environments. The engineer will collaborate with software architects and other technical leads to design software and interfaces for our next generation Modular BIG-IP. We are looking for talented software engineers with a track record of accomplishment in the design, implementation and maintenance of major software features. Appropriate candidates should also have a knack for delving into complex deployment configurations and delivering rapid solutions to challenging problems. Responsibilities Develop enterprise grade solutions for the F5 DNS products in containerized and orchestrated environments. Aggressively grow your skillset and expertise to meet the emerging needs of our customers using our new Modular BIG-IP technology Define, collect and interpret product and system requirements to design, implement and maintain software solutions to meet our customer needs. Develop and maintain a strong CICD pipeline to efficiently diagnose and resolve critical issues prior to software releases. Work as part of a Scrum team while recommending and maintaining technical design methodologies, processes, and standards Provide technical mentorship to lower level engineers Qualifications 6+ year of professional experience in multi-platform network software development, in a commercial production environment. Bachelor degree in computer/engineering related field or equivalent work experience Proven programming skills/abilities in C, C++, and Go Strong xxperience with deploying infrastructure and services in one or more cloud environments such as AWS, VMware vSphere, Azure, Google cloud, Strong development experience in areas such as sockets, multithreading, and data structure optimization. Familiarity with TCP/IP networking a strong plus. Experienced with at least one scripting language such as Python, Perl, Understanding of regexes Development experience using Agile Scrum methodology and Git version control Background in Unix based operating systems specifically, x86/Linux Strong problem-solving and analytical skills paired with strong mentorship experience Proven ability to deliver products with highest quality and on time Strong written and verbal communications skills Ability to interact and communicate effectively with users of our products The About The Role is intended to be a general representation of the responsibilities and requirements of the job. However, the description may not be all-inclusive, and responsibilities and requirements are subject to change. Please note that F5 only contacts candidates through F5 email address (ending with @f5.com) or auto email notification from Workday (ending with f5.com or @myworkday.com ) . Equal Employment Opportunity It is the policy of F5 to provide equal employment opportunities to all employees and employment applicants without regard to unlawful considerations of race, religion, color, national origin, sex, sexual orientation, gender identity or expression, age, sensory, physical, or mental disability, marital status, veteran or military status, genetic information, or any other classification protected by applicable local, state, or federal laws. This policy applies to all aspects of employment, including, but not limited to, hiring, job assignment, compensation, promotion, benefits, training, discipline, and termination. F5 offers a variety of reasonable accommodations for candidates . Requesting an accommodation is completely voluntary. F5 will assess the need for accommodations in the application process separately from those that may be needed to perform the job. Request by contacting accommodations@f5.com.

At F5, we strive to bring a better digital world to life. Our teams empower organizations across the globe to create, secure, and run applications that enhance how we experience our evolving digital world. We are passionate about cybersecurity, from protecting consumers from fraud to enabling companies to focus on innovation. Everything we do centers around people. That means we obsess over how to make the lives of our customers, and their customers, better. And it means we prioritize a diverse F5 community where each individual can thrive. About The Role : F5 Networks – Hyderabad, India Our Employees Are valued and empowered, collaborative and team oriented, innovative in their approach and passionate about their work. They are reliable, trustworthy and open with a high level of integrity. They value diversity, are inclusive and are committed to a global mindset. About the Product Using high-performance DNS services, Global Traffic Manager (GTM) scales and secures your DNS infrastructure during high query volumes and DDoS attacks. It delivers a complete, real-time DNSSEC solution that protects against hijacking attacks. GTM improves the performance and availability of your applications by intelligently directing users to the closest or best-performing physical, virtual, or cloud environment. In addition, enables mitigation of complex threats from malware and viruses by blocking access to malicious IP domains. Position Summary Our team is at the cutting-edge of DNS technology. We are focused on providing customers with solutions to improve access to applications by securing and accelerating Domain Name resolution in hybrid cloud environments. Our team collaborates with other F5 Modular BIG-IP development teams to produce unique opportunities for cross-team development projects. This position is for a Software Engineer III with experience designing and developing application data management software in containerized and orchestrated environments. The engineer will collaborate with software architects and other technical leads to design software and interfaces for our next generation Modular BIG-IP. We are looking for talented software engineers with a track record of accomplishment in the design, implementation and maintenance of major software features. Appropriate candidates should also have a knack for delving into complex deployment configurations and delivering rapid solutions to challenging problems. Responsibilities Develop enterprise grade solutions for the F5 DNS products in containerized and orchestrated environments. Aggressively grow your skillset and expertise to meet the emerging needs of our customers using our new Modular BIG-IP technology Develop and maintain a strong CICD pipeline to efficiently diagnose and resolve critical issues prior to software releases. Work as part of a Scrum team while recommending and maintaining technical design methodologies, processes, and standards Qualifications 3+ year of professional experience in multi-platform network software development, in a commercial production environment. Bachelor degree in computer/engineering related field or equivalent work experience Proven programming skills/abilities in C, C++, and Go Experience with deploying infrastructure and services in one or more cloud environments such as AWS, VMware vSphere, Azure, Google cloud, Practical knowledge of Data Structures, Computer Algorithms and Design Patterns. Development experience in areas such as sockets, multithreading, and data structure optimization. Familiarity with TCP/IP networking a strong plus. Experienced with at least one scripting language such as Python, Perl, Understanding of regexes Development experience using Agile Scrum methodology and Git version control Background in Unix based operating systems specifically, x86/Linux Strong problem-solving and analytical skills Proven ability to deliver products with highest quality and on time Strong written and verbal communications skills Ability to interact and communicate effectively with users of our products Physical Demands and Work Environment Daily computer use in an office environment. Occasional need to install computer equipment in racks and replace existing equipment. Equipment includes servers, routers, power supplies, and network appliances. Benefits: We provide competitive salaries, a world class benefits package, including 100% of the premium for employee medical, dental and vision insurance, highly subsidized premiums for dependent coverage, 401K match, employees stock purchase plan, 18 days paid time off within the 1st year and 9 paid holidays, life insurance, short & long term disability insurance, tuition reimbursement, and much more. The About The Role is intended to be a general representation of the responsibilities and requirements of the job. However, the description may not be all-inclusive, and responsibilities and requirements are subject to change. Please note that F5 only contacts candidates through F5 email address (ending with @f5.com) or auto email notification from Workday (ending with f5.com or @myworkday.com ) . Equal Employment Opportunity It is the policy of F5 to provide equal employment opportunities to all employees and employment applicants without regard to unlawful considerations of race, religion, color, national origin, sex, sexual orientation, gender identity or expression, age, sensory, physical, or mental disability, marital status, veteran or military status, genetic information, or any other classification protected by applicable local, state, or federal laws. This policy applies to all aspects of employment, including, but not limited to, hiring, job assignment, compensation, promotion, benefits, training, discipline, and termination. F5 offers a variety of reasonable accommodations for candidates . Requesting an accommodation is completely voluntary. F5 will assess the need for accommodations in the application process separately from those that may be needed to perform the job. Request by contacting accommodations@f5.com.

Bengaluru, India C Embedded Automotive Industry 23/04/2025 Project description This is a great opportunity to work as a part of a highly regarded team to deliver leading-edge solutions. We are looking for an experienced engineer for an exciting role to augment our Client's core Linux-embedded team to work on the latest platforms and software. The person will interact closely with key technical experts to ensure the best possible performance and results on the SoC platforms. Responsibilities Design, develop, and maintain x86 BIOS/UEFI firmware, ensuring robust and efficient solutions aligned with project specifications. Collaborate with hardware and software teams to support x86 CPU/APU architectures, optimizing performance through expert-level C programming. Work on UEFI bootloaders and applications, focusing on UEFI-based storage protocols such as AHCI, SATA, and NVMe. Perform platform hardware analysis and interpret processor specifications to support coreboot mainboard porting and integration. Integrate and customize BIOS code bases (AMI, Insyde, or Phoenix BIOS) to meet customer and platform requirements. Debug and resolve firmware-related issues, leveraging deep knowledge of UEFI framework concepts and storage protocols. Contribute to the development of Android UEFI-based bootloaders for x86 platforms, if applicable. Maintain code quality through rigorous testing, documentation, and adherence to best coding practices. Provide technical guidance and mentorship to junior developers, supporting knowledge sharing and team growth. Collaborate with cross-functional teams to ensure smooth firmware delivery, addressing technical challenges proactively. Skills Must have 5-15 years of experience in the x86 BIOS/UEFI development Experience with x86 CPU/APU architectures and associated compilation tools Expert in C language Familiar with at least one BIOS code base (AMI, Insyde, or Phoenix BIOS) Experience working on UEFI bootloader or UEFI applications mainly involved in UEFI-based storage protocols AHCI, SATA, and NVMe. Will be good if have any experience in Android UEFI-based Bootloader for x86. Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required. Good understanding of UEFI framework concepts and Storage protocols. Nice to have Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of industry-standard protocols like SATA, NVMe, AHCI, PCIe, SPI, eSPI etc. Good understanding of specifications like ACPI, SMM. Good understanding of x86-64 architecture from BIOS developer's perspective. Good understanding of UEFI BIOS Boot flow. Bachelor's degree in computer science engineering from a reputed college Master's degree from a reputed university is a big plus Other Languages EnglishB2 Upper Intermediate Seniority Senior

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

As a member of the Support organization, your focus is to deliver post-sales support and solutions to the Oracle customer base while serving as an advocate for customer needs. This involves resolving post-sales non-technical customer inquiries via phone and electronic means, as well as, technical questions regarding the use of and troubleshooting for our Electronic Support Services. A primary point of contact for customers, you are responsible for facilitating customer relationships with Support and providing advice and assistance to internal Oracle employees on diverse customer situations and escalated issues. Specific Knowledge and Experience: - Provide post-sales, hardware support remotely to Oracle X86 hardware platforms. - Good understanding of X86 system architectures and RAID technology. - Service processor knowledge and log collection for platform hardware troubleshooting - Hands-on and remote troubleshooting experience on Oracle X86 servers (Exdata, ODA, X8, X7 etc.) or other similar platforms. - system level troubleshooting skills and system administration skills under Linux, Windows or Solaris Operating Systems. - Added advantage to have knowledge of Cloud Infrastructure and support - Escalate calls to the appropriate level, in a timely manner - Have great analytical and problem solving skills - Good customer interaction and organizational skills, able to maintain a high level of customer satisfaction - Excellent verbal and written English Language communication skills - Good team player working in global environment with self motivating personality. - Effective time management skills and work prioritization capabilities. - Hands-on troubleshooting experience of GPU systems would be an added advantage - Any professional certifications like (i.e.MCSE, RHCE, Cloud etc.). - Employee is expected to work in designated Oracle office during their assigned shift. - 24*7 Support environment, ready to work in shifts Responsibilities As a Sr. Support Engineer, you will be the technical interface to customers, Original Equipment Manufacturers (OEMs) and Value-Added Resellers (VARs) for resolution of problems related to the installation, recommended maintenance and use of Oracle products. Have an understanding of all Oracle products in their competencies and in-depth knowledge of several products and/or platforms. Also, you should be highly experienced in multiple platforms and be able to complete assigned duties with minimal direction from management. In this position, you will routinely act independently while researching and developing solutions to customer issues.

About The Role :: Job Title: Senior Engineer Home Loan Savings, VP Location:Pune, India Role Description Our Home Loan Savings teams at Deutsche Bank - Private Bank (TDI) develop and maintain applications for home loan savings business of Private Customers (BHW). Changes are implemented on time to market challenges as well as on development of the application landscape by using Google Cloud technology. In addition to the SAP-based home loan savings and mortgage lending core systems the application portfolio also includes the business partner data systems, the connection to payment transactions, as well as the interface to the frontends and the data preparation and delivery for the banks dispositive systems. We are acting as a pilot for the migration to the Google Cloud with our applications and are preparing for the transition to an agile collaboration model. We are now building a team in India to work closely with the existing team in Germany, leveraging virtual collaboration techniques and the diversity of our team to achieve our goals of continuous delivery, process improvement, and internalization of technical expertise. As an engineer, you are responsible for the design and implementation of technical solutions within the BHW system landscape. You are an expert in COBOL on x86. You work closely with colleagues from the business analysis, IT architecture and IT operation departments in both agile and waterfall ways, contributing to the success of the growing domain Home Loan Savings. What we'll offer you As part of our flexible scheme, here are just some of the benefits that youll enjoy Best in class leave policy Gender neutral parental leaves 100% reimbursement under childcare assistance benefit (gender neutral) Sponsorship for Industry relevant certifications and education Employee Assistance Program for you and your family members Comprehensive Hospitalization Insurance for you and your dependents Accident and Term life Insurance Complementary Health screening for 35 yrs. and above Your key responsibilities Together with the solution architects you drive the architecture of our platform and the development process and are responsible for software design in your area. Your primary focus will be on software design, development and unit-testing activities including peer code reviews. You provide high-quality solutions that meet functional as well as non-functional requirements. You support the team of project managers, solution architects and business analysts at all stages of the software life cycle (feasibility studies, effort estimates, technical design, development, testing and documentation) You stay up to date (especially Google Cloud Technology), supported by internal and external training, continuously develop and proactively share your knowledge with your colleagues You support the operation of our existing IT landscape through 3rd Level Support Your skills and experience Expertise and minimum 12 years of experience in Cobol development, especially on an x86 platform with Micro-Focus in combination with Oracle, SQL, and PL/SQL Very good knowledge of architecture and integration patterns, code conventions and other best practices Experience working on UNIX Shell scripting. Basic development knowledge in Oracle including writing basic to complex queries. Very good knowledge of architecture and integration patterns, code conventions and other best practices Experience with Agile/SCRUM environment including agile tooling together with Experience and knowledge of investment business and its operations. Experience managing Agile Projects along with technical skills and should be willing to perform dual role. Pro-active team player with good communication and English language skills. How we'll support you Training and development to help you excel in your career Coaching and support from experts in your team A culture of continuous learning to aid progression A range of flexible benefits that you can tailor to suit your needs

- Lead the architecture, design and development of Power Management for a highly virtualized, multi-threaded, many-core and multi-socket SMP (symmetric multi-processor) . - Develop the features, present the proposed architecture in the High level design discussions to hardware and software teams - Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, firmware, software teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Estimate the overall effort to develop the feature - Estimate the silicon area required for the feature Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing Server SoC power management features. * Experience with hardware to model correlation * At least 1 generation of silicon bring up experience * In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) * Proficiency of RTL design with Verilog or VHDL * Knowledge of at least one object oriented or functional programming language and scripting language. Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 12 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Nice to haves - Knowledge of instruction dispatch and Arithmetic unit. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Knowledge of verification principles and coverage. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Maintain Debian packages for IBM-Z (s390x) compilers and related toolchain components. Work with internal development to resolve bugs/issues relating to Debian packaging, dependency, and integration. Contribute to the Debian distribution community through package related bug triaging, package uploads and mailing list participation. Collaborate with upstream communities to track new releases, apply patches, and back-port fixes as needed. Ensure packages meet Debian policy, quality, and security standards. Maintain change-logs, documentation, and reproducible build practices. Required education Bachelor's Degree Required technical and professional expertise 2+ years of working experience in maintaining Linux Distribution packages (preferably Debian Distro packages). Strong in C/C++ and system programming and strong debugging skills Strong knowledge of Distro packaging tools (egdpkg, debhelper, lintian, pbuilder, sbuild, etc.).. Working experience with build systems (e.g., Make, CMake etc.).. Strong knowledge of Linux systems and shell scripting (shell, bash etc.).. Understanding of upstream/downstream coordination in open source projects. Preferred technical and professional experience Experience with debugging packaging issues/bugs on IBM-Z (s390x) or on other architectures (e.g., x86, arm64) using gdb or other debugging tools. Contributions to upstream compiler or toolchain projects (e.g. GCC, LLVM, etc.). Knowledge of compilation process and compiler internals. Debian Maintainer (DM) or Debian Developer (DD) status is an added plus. Soft Skills Excellent written and verbal communication skills. Ability to work independently and in a distributed, asynchronous team. Strong organizational skills and attention to detail. Comfortable working in open-source and collaborative environments.

About The Role We are seeking a highly skilled Post-Silicon Validation Engineer to join our CPU design and validation team. The ideal candidate will be responsible for validating and verifying the functionality, performance, and reliability of CPU hardware after silicon fabrication. This role involves close collaboration with pre-silicon, firmware, software, and manufacturing teams to identify and debug silicon issues, improve test coverage, and ensure the CPU meets design specifications and quality standards. Key Responsibilities Develop and execute comprehensive post-silicon validation plans and test cases for CPU hardware. Perform functional, performance, power, and reliability testing on silicon prototypes. Collaborate with design, verification, firmware, and software teams to debug silicon issues using tools such as logic analyzers, oscilloscopes, JTAG, and embedded trace. Analyze test failures, generate detailed bug reports, and drive issues to closure. Develop automation scripts and tools to enhance test coverage and efficiency. Validate CPU features including cores, caches, memory subsystems, interconnects, and power management. Support bring-up and production ramp of silicon with manufacturing and yield teams. Provide feedback to pre-silicon teams to improve design and verification quality. Document test plans, methodologies, and validation results. Stay current with CPU architecture, industry standards, and validation methodologies. Primary Skills Strong understanding of CPU microarchitecture and components (cores, caches, memory controllers, interconnects). Experience with post-silicon validation methodologies and tools. Proficiency in hardware debugging tools (logic analyzers, oscilloscopes, JTAG). Strong scripting skills in Python, Perl, TCL, or similar languages. Familiarity with embedded software/firmware and low-level software debugging. Knowledge of performance and power analysis techniques. Excellent problem-solving skills and attention to detail. Strong written and verbal communication skills. Secondary Skills Ability to analyze complex hardware issues and collaborate across multiple teams. Experience working in cross-functional environments. Exposure to system-level validation and integration. Understanding of silicon bring-up and production ramp processes. Preferred Qualifications Bachelors or Masters degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. Experience with CPU or SoC post-silicon validation. Exposure to CPU pre-silicon verification methodologies. Familiarity with CPU instruction set architectures (ISA) such as x86, ARM, RISC-V. Knowledge of manufacturing test and yield improvement. Experience working in Agile or Scrum development environments. About The Role - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

About The Role This role involves the development and application of engineering practice and knowledge in the following technologiesStandards and protocols, application software and embedded software for wireless and satellite networks, fixed networks and enterprise networks; connected devices (IOT and device engineering), connected applications (5G/ edge, B2X apps); and Telco Cloud, Automation and Edge Compute platforms. This role also involves the integration of network systems and their operations, related to the above technologies. Key Responsibilities: Integrate and customize Yocto-based Linux distributions for embedded platforms. Develop and maintain Linux device drivers for Audio , Display , and other peripherals on x86 architecture . Work on Board Support Packages (BSPs) , bootloader (U-Boot) , and kernel bring-up . Collaborate with hardware and firmware teams to ensure seamless system integration. Debug and optimize system performance, boot time, and memory usage. Maintain build systems, layers, and recipes in Yocto for various hardware platforms. Technical Skills Required: Strong programming skills in C for embedded systems. Experience with Linux kernel development , device tree , and driver frameworks . Proficiency in Yocto Project , BitBake , and meta-layer management . Hands-on with x86 architecture , ALSA , I2S , HDMI , and DRM/KMS for audio and display. Familiarity with bootloaders , secure boot , and kernel configuration . Debugging using GDB , JTAG , oscilloscopes , and logic analyzers . Preferred Qualifications: Bachelors or Masters degree in Computer Science, Electronics, or related field. Experience in automotive , IoT , or consumer electronics domains. Knowledge of ARM architecture and cross-compilation toolchains is a plus. Strong problem-solving and communication skills.

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.