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5.0 - 12.0 years

0 Lacs

karnataka

On-site

You are looking for an IC Package Design Engineer with experience in Flip Chip package design. As an IC Package Design Engineer, your responsibilities will include: - Having experience with Cadence APD IC Package Design, specifically with Flip Chip package design. - Demonstrating a good understanding of package/substrate design and package assembly rules related to flip chip designs. - Being exposed to different package technologies such as MCM, flip chip / wire bond, 3D, 2.5D, etc., which would be an added advantage. - Showcasing expertise in High-Speed Complex Package and PCB designs with HDI, Blind and Buried Via technologies. - Having hands-on expertise with PCB designs involving High-Sp...

Posted 2 days ago

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3.0 - 5.0 years

0 Lacs

sanand, gujarat

On-site

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities And Tasks Bring up equipment in an efficient manner and minimum downtime Operate and maintain equipment Apply problem solving technique by available tools and resources to solve problem Perform routine equipment health check / conversion as defined Performs electrical or mechanical troubleshooting to determine problems in non-functioning electro-mechanical equipment used in the...

Posted 1 week ago

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5.0 - 10.0 years

8 - 18 Lacs

bengaluru

Hybrid

Job Description: Role: Cadence APD Package Design Experience: 5+ Years Location: Bangalore IC Package Design Engineer Experience with Cadence APD IC Package Design experience with Cadence APD Good understanding of package/substrate design and package assembly rules related to flip chip designs. Exposure to different package technologies such as MCM, flip chip / wire bond, 3D, 2.5D etc., added advantage Expertise in High-Speed Complex Package and PCB designs with HDI, Blind and Buried Via technologies. Hands-on expertise with PCB designs involving High Speed Parallel Bus interfaces including DDR, GDDR and HSIO interfaces including PCIe, SERDES. Good Exposure to Stackup design, DFM, DFA rules ...

Posted 1 week ago

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