61 Vmm Jobs - Page 3

Looking for Siemens EDA ambassadors Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based on? Implementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join the team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation! We make real what matters. This is your role. Questa verification IP"™s help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We don"™t need superheroes, just super minds. We are seeking Electronics Engineers (B.Tech/M.Tech) or professionals from related fields, graduated from reputed institutes, who possess strong expertise in verification engineering and bring 2-4 years of hands-on experience to the table. You've sound knowledge of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. We are phenomenal teammates, resilient and sincere, with a passion for learning new things and building our knowledge base in new areas! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare. Transform the everyday #LI-EDA #LI-Hybrid #DVT

Looking for Siemens EDA ambassadors Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based on? Implementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join the team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation! We make real what matters. This is your role. Questa verification IP"™s help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We don"™t need superheroes, just super minds. We are seeking Electronics Engineers (B.Tech/M.Tech) or professionals from related fields, graduated from reputed institutes, who possess strong expertise in verification engineering and bring 1-4 years of hands-on experience to the table. You've sound knowledge of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. We are phenomenal teammates, resilient and sincere, with a passion for learning new things and building our knowledge base in new areas! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare. Transform the everyday! #LI-EDA #LI-Hybrid #DVT

"> Search Jobs Find Jobs For Where Search Jobs R&D Engineering, Sr Staff Engineer (VIP verification) Bengaluru, Karnataka, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 8839 Date posted 02/24/2025 Share this job Email LinkedIn X Facebook Experience : 7yrs to 12 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective. Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

He /She should have experience in Dimension Calibration Lab. Handling equipment like ULM, FCDM, DCT, VMM etc. Must have experience handling NABL audit independently & ISO/IEC 17025:2017. Experience minimum 5 years.

Role & responsibilities Develop Implement and continuously improve incoming inspections procedure and standards Supervise and lead the Incoming Inspection team Plan & Prioritize inspection activities based on production schedule and supplier deliveries Review supplier documentation (e.g. certificates of analysis material test reports) and ensue compliance with required specifications Perform or oversee dimensional, visual, functional and mechanical testing on incoming goods Identify non-conformances and coordinate with procurement, supplier quality and Engineering to resolve issues Maintain and update records of inspection and Non- conformance (NCR's) and corrective action Train and develop team members and inspection techniques, equipment usage and updated standards Collaborate with suppliers to address quality issues and drive continuous improvement initiative Prepare and present regular reports on incoming quality performance, trends and improvements actions to management. Ensure inspection equipment is properly maintained, calibrated and fit for use. Support audits( internal and external) by providing documentation and participating as required. Drive root cause analysis and implement corrective and preventive actions (CAPA) for material quality issues.

"> Search Jobs Find Jobs For Where Search Jobs R&D Engineering, Staff Engineer - IP Verification Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 7271 Date posted 02/24/2025 Share this job Email LinkedIn X Facebook Experience : 5yrs to 10 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

"> Search Jobs Find Jobs For Where Search Jobs R&D Engineering, Staff Engineer (VIP verification) Noida, Uttar Pradesh, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 8828 Date posted 02/24/2025 Share this job Email LinkedIn X Facebook Experience : 5yrs to 12 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective. Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Senior Staff Product Engineer, R&D-7683 Aschheim, Germany Engineering Principal Analog Design Engineer Mississauga, Canada Engineering Verdi Internship Hsinchu, Taiwan Interns/Temp

An experienced and passionate ASIC Digital Verification Engineer with a deep understanding of RTL-based IP cores and complex protocols. You have over 12 years of experience in functional verification and are adept at making architectural decisions for test bench designs. You are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM), and you have a proven track record of implementing coverage-driven methodologies. You bring a wealth of knowledge in protocols such as DDR, PCIe, AMBA, and more. Your technical expertise is matched by your strong communication skills, ability to work independently, and your innovative problem-solving capabilities. Your experience may also include familiarity with functional safety standards such as ISO26262 and FMEDA. What You ll Be Doing: Making architectural decisions on test bench design. Writing verification plans and specifications. Implementing test bench infrastructure and writing test cases. Implementing a coverage-driven methodology. Leading technical aspects of verification projects. Collaborating with international teams of architects, designers, and verification engineers. The Impact You Will Have: Enhancing the robustness and reliability of IP cores used in critical applications. Driving innovation in verification methodologies and tools. Ensuring high-quality deliverables through rigorous verification processes. Improving productivity, performance, and throughput of verification solutions. Contributing to the success of Synopsys customers in industries such as AI, automotive, and server farms. Mentoring and guiding junior engineers in the verification domain. What You ll Need: Knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, MIPI. Hands-on experience with UVM/VMM/OVM, test planning, and coverage closure. Proficiency in SystemVerilog and UVM, object-oriented coding, and verification. Experience with scripting languages like C/C++, TCL, Perl, Python. Experience with functional safety standards such as ISO26262 and FMEDA (preferred). Who You Are: Independent and precise in your work. Innovative and proactive in problem-solving. Excellent communicator and team player. Detail-oriented with a strong analytical mindset. Eager to learn and grow within a technical role

Defining and developing ASIC RTL design and verification at both chip and block levels. Writing and modifying test cases, checkers, and scoreboards in a system Verilog-based test environment. Collaborating with cross-functional teams to ensure seamless integration of analog and digital components. Conducting AMS verification, particularly for high-speed SerDes designs supporting multi-protocols. Utilizing Synopsys analog mixed-signal design tools for efficient design and verification processes. Programming and scripting using TCL, Perl, and Python to automate and streamline workflows. The Impact You Will Have: Enhancing the performance and reliability of our high-performance silicon chips. Contributing to the development of innovative technologies that drive the Era of Pervasive Intelligence. Improving the efficiency and effectiveness of our design and verification processes. Ensuring the seamless integration of analog and digital components in our products. Supporting the creation of cutting-edge solutions for self-driving cars, learning machines, and more. Driving continuous technological innovation within Synopsys and the broader industry. What You ll Need: Looking for 2+yrs experience with BTech / MTech in VLSI / Electronics/ Microelectronics Knowledge or hands-on expertise/analysis of Analog and digital CMOS circuit designs Knowledge on electrical circuit networks and analysis Knowledge or hands-on Verilog/System Verilog languages and supported methodologies like VMM, UVM Must be able write/modify testcases, checkers, scoreboards in a system Verilog based test environment AMS verification experience in high speed Serdes designs supporting multi-protocols is an advantage. Experience with the Synopsys Analog mixed-signal design tool set is an advantage. Modelling languages Verilog-a/ams can be an advantage Programming/scripting know-how e. g. tcl, perl, python Experience with Linux Good communication skills, ability to take ownership Self-organized to ensure that project timescales are met Who You Are: Excellent communicator with strong interpersonal skills. Proactive and able to take ownership of projects. Self-organized and capable of managing time effectively. Collaborative team player who thrives in a dynamic environment. Detail-oriented and committed to delivering high-quality results.

You are a seasoned verification engineer with a passion for cutting-edge technology With a BSEE in Electrical Engineering and over 5 years of relevant experience, or an MSEE with over 4 years, you bring a wealth of knowledge in developing System Verilog based test environments, implementing test plans, and extracting verification metrics You possess strong HVL coding skills and hands-on experience with industry-standard simulators such as VCS, NC, or MTI, and waveform-based debugging tools Your familiarity with verification methodologies like VMM, OVM, or UVM is solid, and you have a deep understanding of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB Your experience with Scatter Gather DMA and exposure to serial protocols like SPI/I2C/I2S/UART are highly valued Additionally, you are proficient in scripting languages such as Perl, TCL, or Python, and have knowledge of HDLs like Verilog Your exposure to VC Formal and IP design and verification processes, including VIP development, is an added advantage You exhibit excellent written and oral communication skills, demonstrate strong analytical and problem-solving abilities, and show high levels of initiative This role is not open for college fresh grads and requires prior industry experience What You ll Be Doing: Specify, design/architect, and implement state-of-the-art verification environments for the Synopsys family of synthesizable cores. Perform verification tasks for IP cores, ensuring they meet the highest standards of quality. Collaborate closely with RTL designers and be part of a global team of expert verification engineers. Work on next-generation AMBA protocols and serial protocols for commercial, enterprise, and automotive applications. Engage in test planning, test environment coding at both unit and system levels, test case coding and debugging, and FC coding and analysis. Manage regression and meet quality metric goals. The Impact You Will Have: Ensure the reliability and performance of Synopsys IP cores, contributing to the success of our cutting-edge products. Drive innovations in verification methodologies, enhancing the efficiency and effectiveness of our processes. Collaborate with a global team to deliver high-quality solutions that meet the needs of our customers. Support the development of next-generation technologies that will shape the future of various industries. Contribute to the continuous improvement of verification practices and standards within the organization. Play a key role in the successful delivery of IP cores for commercial, enterprise, and automotive applications. What You ll Need: BSEE in Electrical Engineering with 5+ years of relevant experience or MSEE with 4+ years of relevant experience. Experience in developing System Verilog based test environments and implementing test plans. Strong HVL coding skills and hands-on experience with industry-standard simulators and waveform-based debugging tools. Familiarity with verification methodologies such as VMM, OVM, or UVM. Knowledge of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB. Who You Are: Excellent written and oral communication skills. Strong analytical and problem-solving abilities. High levels of initiative and the ability to work independently. Collaborative mindset with the ability to work effectively in a global team environment. Detail-oriented with a focus on quality and continuous improvement

V erification plan development and its review Verification environment development Debug of simulations, including those of real signals modeled using SV for analog. RTL, GLS, Co-simulations, FW simulation & coverage closure Deliver high quality RTL and other simulation models to customer. Participate in technical reviews and contribute actively. Participate in customer support with bring-up of IP in customer simulation environment. Participate in review of SERDES / PHY / Controller IP specification to validate compliance to protocol of interest. Follow and improve development process ensuring high quality output. Skill Set: B.Tech/M.Tech with 5+ years of relevant experience. Hands on experience in creating detailed Verification Environment from Functional Specifications Knowledge of protocols like 25G/50G/100G Ethernet, PON, other networking protocols Test planning, Coverage and Assertion planning. Hands on experience with System Verilog, mythologies like VMM/UVM, simulation and debug tools. Experience with Version Control tools like Perforce/SVN. Knowledge of Perl/Shell scripts In addition, the candidate should have good communication skills, be a team player with good problem solving and interpersonal skills.