61 Vmm Jobs - Page 2

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life s work , to amplify human creativity and intelligence. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! We are now looking for passionate, highly motivated and creative individuals to be part of our automotive verification team. As a verification owner, you will work on projects that will define the next generation of automotive chips and systems. You will get firsthand exposure to high performance CPU and Memory sub-systems, NOC based Interconnect Fabric, High speed IOs and many other leading technologies deployed in our Tegra chips. What you will be doing: You will be responsible for creation of "state of the art" UVM based verification test benches and methodologies to verify complex IPs and Sub-systems. You will also get to work on System level verification using C/C++. During the course of a project you would end up driving the following aspects of verification for your unit: Architect the testbenches and craft verification environment using UVM methodology Define test plans, tests and verification infrastructure for modules, clusters and system Build efficient and reusable bus functional models, monitors, checkers and scoreboards Implement functional coverage and own verification closure Work with architects, designers, FPGA and post-silicon teams to ensure that your unit is robust What we need to see: You should be BTech/MTech with 5+ years of experience in verification closure of complex Unit, Sub-system or SOC level verification. If you have experience in at least a few of the following domains, we will have an excellent match for our needs: CPU verification, Memory controller verification, Interconnect verification High Speed IO verification (UFS/PCIE/XUSB) 10G/1G Ethernet MAC and Switch Bus protocols (AXI/APB) System functions like Safety, Security, Virtualization and sensor processing Experience in the latest verification methodologies like UVM/VMM Exposure to industry standard verification tools for simulation and debug is a requirement Exposure to Formal verification would be excellent Good debugging and analytical skills. Good interpersonal skills, ability to work as an excellent teammate with e xcellent communication skills to collaborate with cross-cultural teams and work in a matrix organization With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If youre creative and independent, with a genuine real passion for technology, we want to hear from you. #LI-Hybrid

Job Description Must have: Must Have Required Expertise: Should be able to build test plan, tests, coverage assertions from Specification. Architect and build testbench and testbench components. Good in UVM,SV,C SVA. Familiar with industry protocols, such as AXI, APB, AHB, PCIe, SoC. Very good in debugging. Worked with industry standard EDA tools Synopsys, Cadance simulators and debugging tools. Good to have skills: Experience with scripting and automation. Demonstrated leadership and collaboration abilities, including mentoring, cross-functional communication, UPF-simulations, GLS and a proactive approach to automation. Exposure to SOC verification, Formal verification methodologies.

MTS SILICON DESIGN ENGINEER THE ROLE: The verification team at AMD is looking for a Member of Technical Staff to lead and contribute on the verification of Network on Chip IPs and Subsystems. The individual will help architect, develop and use simulation and/or formal based verification environments, at block and subystem level, to prove the functional correctness of Network-On-Chip (NOC) IPs, subsystems and SOC designs. THE PERSON: You have a passion for modern, complex digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Lead and Plan verification of complex digital design blocks by fully understanding the architecture and design specifications Interact with architects and design engineers to create a comprehensive verification testplan Design and architect testbenches in System Verilog and UVM to complete verification of the design in an efficient manner Create and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools Debug tests with design engineers to deliver functionally correct design blocks Identify and write coverage measures for stimulus quality improvements Perform coverage analysis to identify verification holes and achieve closure on coverage metrics PREFERRED EXPERIENCE: Experienced with development of UVM, OVM, VMM and/or System Verilog, Verilog test benches and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test block level/full chip SOCs and FPGAs. Strong understanding of state of the art of verification techniques, including assertion and coverage-driven verification. Strong understanding of different phases of ASIC and/or full custom chip development is required. Experience in block level NOC (Net work on Chip) verification is a plus. Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high performance FPGAs, SOCs and/or VLSI designs is a plus. Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus. Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management is a plus. Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (VC-Formal, Magellan) is a plus. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering

Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based onImplementation means trying, testing, and improving outcomes until a final solution emerges . Knowledge means exchange discussions with colleagues from all over the world. Join our team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation. We make real what matters. This is your role. Questa verification IPs help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will get along with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We dont need superheroes, just super minds. You're an Electronics Engineer ( B.Tech / M.Tech ) or related field from a reputed institute You've got phenomenal knowledge of verification engineering and have between 2 - 8 years of working experience as well. You've sound knowhow of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe , Flash, DIMM etc. You are a great teammate, resilient and sincere, Enjoy learning new things and build knowledge base in new area. Weve got quite a lot to offer. How about you This role is based in" Noida " but " youll get the chance to work with teams impacting entire cities, countries- and the shape of things to come. The pace of innovation in electronics is constantly accelerating. To enable our customers to deliver life-changing innovations to the world faster and to become market leaders, we are committed to delivering the worlds most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services. We, at Siemens EDA enable companies to develop better electronic products faster and more efficiently. Our innovative products and solutions help engineers conquer design challenges in the increasingly sophisticated worlds of board and chip design We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate

Looking for Siemens EDA ambassadors Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based onImplementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join the team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation! We make real what matters. This is your role. Questa verification IPs help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We dont need superheroes, just super minds. We are seeking Electronics Engineers (B.Tech/M.Tech) or professionals from related fields, graduated from reputed institutes, who possess strong expertise in verification engineering and bring 4-7 years of hands-on experience to the table. You've sound knowledge of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. We are phenomenal teammates, resilient and sincere, with a passion for learning new things and building our knowledge base in new areas! A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare. Transform the everyday! #LI-EDA #LI-Hybrid #DVT

Job Description : - Expertise in the verification of IP or SOC cores. - Must have proven experience in developing HVL (System Verilog/UVM) based test environments, developing and implementing test plans, implementing and extracting verification metrics such as functional coverage and Code coverage. - Experience in CXL / DDR / MIPI / PCIe Protocol - Understanding of BIST would be an added advantage. - Familiarity with HDL's such as Verilog and scripting languages such as shell/Perl/Python etc.is highly desirable - Good communication skills, debug and problem solving skills. - Be a technical contributor in the Verification Tasks - System Verilog/Verilog coding of test benches, Test cases, performing verification tasks such as coverage, debug, regressions using the latest methodologies such as UVM. - Work closely with team members to deliver quality products. - Be able to study the coverage metrics and improve them with definition of additional test cases in directed environment, at least for small/ medium complexity features of the protocol/ product specs - Works in a project and team oriented environment - Preferred GCC / USC or candidates with valid H1B

Metrology Engineer (Injection Moulding) - Oragadam Exp: 5+ yrs Immediate joiner preferable Skill required: CMM,VMM,Gauges,7QC tools, testing quipments,Lab quality,DFT,CPCK,COPQ,CAPA,MFI CV - lifeturnmgmt6@gmail.com /7358656750

- Expertise in the verification of IP or SOC cores. - Must have proven experience in developing HVL (System Verilog/UVM) based test environments, developing and implementing test plans, implementing and extracting verification metrics such as functional coverage and Code coverage. - Experience in CXL / DDR / MIPI / PCIe Protocol - Understanding of BIST would be an added advantage. - Familiarity with HDL's such as Verilog and scripting languages such as shell/Perl/Python etc.is highly desirable - Good communication skills, debug and problem solving skills. - Be a technical contributor in the Verification Tasks - System Verilog/Verilog coding of test benches, Test cases, performing verification tasks such as coverage, debug, regressions using the latest methodologies such as UVM. - Work closely with team members to deliver quality products. - Be able to study the coverage metrics and improve them with definition of additional test cases in directed environment, at least for small/ medium complexity features of the protocol/ product specs - Works in a project and team oriented environment - Preferred GCC / USC or candidates with valid H1B

Looking for a dynamic professional to manage dealer networks, promote Tespa’s metrology products (CMMs, VMMs, Height Gauges), drive sales, conduct training, and lead regional growth. 3–5 yrs in channel sales/BD preferred. Travel required.

Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based onImplementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join our team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation. We make real what matters. This is your role! Questa verification IP’s help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and improve these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will cooperate with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We don’t need superheroes, just super minds We seek a graduate with an Electronics Engineer (B.Tech/ M.Tech) or related field from a reputed institute Phenomenal knowledge of verification engineering and have between 2 - 8 years of working experience as well. We value sound knowhow of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. Knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. You are a phenomenal teammate, resilient and candid, Enjoy learning new things and build knowledge base in new area. We’ve got quite a lot to offer. How about you This role is based in Noida but you’ll get the chance to work with teams impacting entire cities, countries – and the shape of things to come. The pace of innovation in electronics is constantly accelerating. To enable our customers to deliver life-changing innovations to the world faster and to become market leaders, we are committed to delivering the world’s most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services. We, at Siemens EDA enable companies to develop better electronic products faster and more efficiently. Our innovative products and solutions help engineers conquer design challenges in the increasingly sophisticated worlds of board and chip design We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. #LI-EDA #LI-Hybrid

"> Search Jobs Find Jobs For Where Search Jobs ASIC Digital Design, Architect Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 11886 Remote Eligible No Date Posted 11/06/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A highly motivated and experienced ASIC Digital Design Architect with a passion for cutting-edge technology and innovation. You thrive in a collaborative environment and have a proven track record of delivering high-quality results in the field of digital design and verification. You possess deep expertise in interface protocols such as Ethernet, PCIe, and CXL, and have a strong understanding of both analog and digital mixed-signal design. Your ability to debug, diagnose, and support complex systems makes you an invaluable asset to any team. You are a problem solver who enjoys tackling challenging technical issues and delivering solutions that exceed expectations. You have a strong foundation in functional verification methodologies, including UVM and System Verilog, and are adept at scripting and automation using tools like Perl and Python. Your excellent communication skills enable you to effectively collaborate with cross-functional teams and support customers in achieving their goals. What You ll Be Doing: - Acting as a technical expert in one or more interface protocols (e.g., Ethernet, PCIe) to support development, verification, silicon validation, and customer support. - Reviewing SERDES/PHY/Controller IP specifications to ensure compliance with relevant protocols. - Developing and reviewing verification plans and environments, with a preference for UVM-based methodologies. - Performing RTL, GLS, and co-simulations, ensuring functional and code coverage closure. - Delivering high-quality RTL and simulation models to customers, along with verification components for integration into their environments. - Supporting customers with IP bring-up in simulation environments and debugging silicon issues post-production. - Demonstrating Testchip+FPGA system demos for customers and at industry conferences. The Impact You Will Have: - Ensuring the successful development and verification of Synopsys multi-protocol 112G PHY IP, a critical component for high-end networking and computing applications. - Driving innovation in the design and validation of industry-leading IP solutions that support multiple electrical standards, including PCIe 6.0, 400G/800G Ethernet, and more. - Enhancing customer satisfaction by delivering high-quality IP and providing exceptional support during integration and silicon bring-up. - Contributing to the advancement of cutting-edge technologies in the Era of Smart Everything, enabling smarter and more connected devices. - Strengthening Synopsys position as a leader in chip design and verification through your technical expertise and innovative solutions. - Representing Synopsys at industry conferences, showcasing the company s capabilities and building strong relationships with customers and partners. What You ll Need: - A B.Tech/M.Tech degree with 15+ years of relevant experience in ASIC design and verification. - Expertise in interface protocols such as Ethernet, PCIe, CXL, JESD, and CPRI. - Proficiency in functional verification methodologies, including VMM, OVM/UVM, and System Verilog. - Experience with System Verilog Assertions, as well as code and functional coverage implementation and review. - Fundamental knowledge of analog and digital mixed-signal design. - Strong scripting and automation skills using Perl and Python. - Excellent debugging and diagnostic skills to identify and resolve complex technical issues. Who You Are: - A collaborative team player with strong communication and interpersonal skills. - A detail-oriented professional with a commitment to delivering high-quality results. - A proactive problem solver who thrives in a fast-paced, dynamic environment. - A lifelong learner who stays up-to-date with the latest industry trends and technologies. - A customer-focused individual who is dedicated to providing exceptional support and building lasting relationships. The Team You ll Be A Part Of: You will join a highly skilled and collaborative team of engineers focused on developing and verifying Synopsys multi-protocol 112G PHY IP. This team leverages leading-edge design, analysis, simulation, and measurement techniques to deliver industry-leading solutions for high-end networking and computing applications. Together, you will drive innovation and shape the future of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI the next era of computing. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life s work, to amplify human imagination and intelligence. Make the choice to join us today. NVIDIA is an equal opportunity employer. We are now looking for a DFT Verification Engineer. Design-for-Test (DFT) Engineering at NVIDIA works on groundbreaking innovations every day involving crafting creative solutions for DFT architecture, implementation, verification and post-silicon validation on some of the industrys most complex semiconductor chips. We use the best industry tools and go beyond with internal methodologies to address some of NVIDIAs unique challenges. We are looking for you to implement the best verification methodologies for DFT IP at unit and system levels. You will bring in expertise in SystemVerilog, UVM, FPGA and Emulation application in DFT domain. What youll be doing: As a member of our team, You will build "state of the art" verification test benches and methodologies to verify DFT features in complex IPs/Sub-systems/SOCs. Develop and own verification environment using UVM or equivalent. Your responsibility will include to build reusable bus functional models, monitors, checkers and scoreboards. Own functional coverage driven verification closure and own design verification sign-offs at multiple levels. Collaborate closely with multi-functional teams like chip architecture, ASIC design, functional verification, and post silicon teams. Will be part of innovation to strive to improve the quality of DFT methods What we need to see: BSEE with 3+ or MSEE with 2+ years of experience in IP verification or related domains Expertise in System Verilog and verification methodologies like UVM/VMM. Expertise in prototyping, verification and debug tools (Emulation, FPGA, VCS, Debussy, Formality, PrimeTime etc). Good exposure to ASIC design methodologies: RTL design, clocking, timing and low-power architectures. Strong programming/scripting skills in C++, Perl, Python or Tcl Excellent written and oral communication skills Excitement to work on rare challenges Strong analytical and problem solving skills Ways to stand out from the crowd: Strong experience or interest in both DFT and RTL Verification domains Knowledge in Formal verification methodologies and tools for IP and SoC level verification Hands-on experience in post silicon debug on ATE and/or system labs. #LI-Hybrid

NVIDIA is seeking an elite Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. At NVIDIA, our employees are passionate about parallel and visual computing. Were united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. Expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design. You will be collaborating with architects, designers, and pre and post silicon verification teams to accomplish your tasks. #LI-Hybrid What we need to see: B. Tech. / M. Tech or equivalent experience 2+ years of relevant experience Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog Expertise in comprehensive verification of IP or interconnect protocols (e. g. PCI Express, USB, SATA) Experience in developing and working in functional coverage based constrained random verification environments Background in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug Ways to stand out from the crowd: Excellent knowledge of PCIE protocol - Gen3 and above Good understanding of the system level architecture of PCIE/CXL-based designs Perl, Python or similar scripting and SW programming language experience Good debugging and analytical skills Good interpersonal skills dream to work as a great teammate #LI-Hybrid

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of memory subsystem units for the world s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: You will be responsible for verifying the ASIC design, architecture and micro-architecture of memory sub-systems/units using advanced verification methodologies. Understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. Coming up come up with test plans, tests and verification infrastructure for complex IPs/sub-systems. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. Work on advanced verification methodologies like SV/UVM. Perform functional coverage driven verification closure. Working with architects, designers, and pre and post silicon verification teams to accomplish your tasks. What we need to see: B. Tech. / M. Tech. , or equivalent experience. 5+ years of relevant experience. Experience in verification of complex IPs/units and sub-systems. Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies. Expertise in Verilog. Knowledge in SystemVerilog or similar HVL / UVM or VMM. Ways to stand out from the crowd: Experience in memory subsystem or network interconnect IP verification. Good debugging and analytical skills with sound scripting knowledge. Good communication and excellent team player. With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. #LI-Hybrid

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. At NVIDIA, our employees are passionate about parallel and visual computing. Were united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. Expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design. You will be collaborating with architects, designers, and pre and post silicon verification teams to accomplish your tasks. What we need to see: B. Tech. / M. Tech or equivalent experience 5+ years of relevant experience Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog Expertise in comprehensive verification of IP or interconnect protocols (e. g. PCI Express, USB, SATA) Experience in developing and working in functional coverage based constrained random verification environments Background in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug Ways to stand out from the crowd: Excellent knowledge of PCIE protocol - Gen3 and above Good understanding of the system level architecture of PCIE/CXL-based designs Perl, Python or similar scripting and SW programming language experience Good debugging and analytical skills Good interpersonal skills & dream to work as a great teammate #LI-Hybrid

Position description: Tracking Updations Driver Interactions POD Followups Shortage/ Damage/ excess reporting`s Dash Boards Exception reporting`s Primary Responsibilities: Tracking, Coordination Role: Logistics Executive Industry Type: Courier / Logistics Department: Procurement & Supply Chain Employment Type: Full Time, Permanent Role Category: SCM & Logistics

What You ll Need: Looking for 2+yrs experience with BTech / MTech in VLSI / Electronics/Microelectronics Knowledge or hands-onexpertise/analysis of Analog and digital CMOS circuit designs Knowledge on electrical circuit networks and analysis Knowledge or hands-on Verilog/System Verilog languages and supported methodologies like VMM, UVM Must be able write/modify testcases, checkers, scoreboards in a system Verilog based test environment AMS verification experience in high speed Serdes designs supportingmulti-protocols is an advantage. Experience with the Synopsys Analog mixed-signal design tool set is an advantage. Modelling languages Verilog-a/ams can be an advantage Programming/scripting know-how e. g. tcl, perl, python Experience with Linux Good communication skills, ability to take ownership Self-organized to ensure that project timescales are met

What You ll Need: BSEE in Electrical Engineering with 10+ years of relevant experience or MSEE with 8+ years of relevant experience. Experience in developing System Verilog based test environments and implementing test plans. Strong HVL coding skills and hands-on experience with industry-standard simulators and waveform-based debugging tools. Familiarity with verification methodologies such as VMM, OVM, or UVM. Knowledge of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a seasoned verification engineer with a passion for cutting-edge technology With a BSEE in Electrical Engineering and over 5 years of relevant experience, or an MSEE with over 4 years, you bring a wealth of knowledge in developing System Verilog based test environments, implementing test plans, and extracting verification metrics You possess strong HVL coding skills and hands-on experience with industry-standard simulators such as VCS, NC, or MTI, and waveform-based debugging tools Your familiarity with verification methodologies like VMM, OVM, or UVM is solid, and you have a deep understanding of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB Your experience with Scatter Gather DMA and exposure to serial protocols like SPI/I2C/I2S/UART are highly valued Additionally, you are proficient in scripting languages such as Perl, TCL, or Python, and have knowledge of HDLs like Verilog Your exposure to VC Formal and IP design and verification processes, including VIP development, is an added advantage You exhibit excellent written and oral communication skills, demonstrate strong analytical and problem-solving abilities, and show high levels of initiative This role is not open for college fresh grads and requires prior industry experience, What Youll Be Doing: Specify, design/architect, and implement state-of-the-art verification environments for the Synopsys family of synthesizable cores, Perform verification tasks for IP cores, ensuring they meet the highest standards of quality, Collaborate closely with RTL designers and be part of a global team of expert verification engineers, Work on next-generation AMBA protocols and serial protocols for commercial, enterprise, and automotive applications, Engage in test planning, test environment coding at both unit and system levels, test case coding and debugging, and FC coding and analysis, Manage regression and meet quality metric goals, The Impact You Will Have: Ensure the reliability and performance of Synopsys IP cores, contributing to the success of our cutting-edge products, Drive innovations in verification methodologies, enhancing the efficiency and effectiveness of our processes, Collaborate with a global team to deliver high-quality solutions that meet the needs of our customers, Support the development of next-generation technologies that will shape the future of various industries, Contribute to the continuous improvement of verification practices and standards within the organization, Play a key role in the successful delivery of IP cores for commercial, enterprise, and automotive applications, What Youll Need: BSEE in Electrical Engineering with 5+ years of relevant experience or MSEE with 4+ years of relevant experience, Experience in developing System Verilog based test environments and implementing test plans, Strong HVL coding skills and hands-on experience with industry-standard simulators and waveform-based debugging tools, Familiarity with verification methodologies such as VMM, OVM, or UVM, Knowledge of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB, Who You Are: Excellent written and oral communication skills, Strong analytical and problem-solving abilities, High levels of initiative and the ability to work independently, Collaborative mindset with the ability to work effectively in a global team environment, Detail-oriented with a focus on quality and continuous improvement, The Team Youll Be A Part Of: You will be part of the R&D in Solutions Group at our Bangalore Design Center, India This dynamic team focuses on IP verification and works on technically challenging IP cores using the latest verification methodologies and flows You will collaborate with RTL designers and verification engineers across multiple sites, contributing to the development of next-generation technologies, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job duties include: Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features. Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology Build pseudo-random tests to verify and get to full Functional coverage Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps Think differently and out-of-the-box to stress the DUT and verify it in an efficient way. Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. Drive improvements in Verification in terms of quality and efficiency. Requirements: Bachelors degree in Electrical Engineering or related degree and 8+ years related experience or Masters degree in Electrical Engineering or related degree and 6+ years related experience 6+ Years of experience writing and debugging complex test benches Must have deep understand of all aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage. Must have proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM Should have exceptionally good command over fundamental OOP principles. A good understanding of a complex protocol like PCIe or other multi-layered protocol Capability to work independently and deliver. Knowledge of PCI Express protocol is desired Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job duties include: Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features. Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology Build pseudo-random tests to verify and get to full Functional coverage Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps Think differently and out-of-the-box to stress the DUT and verify it in an efficient way. Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture. Drive improvements in Verification in terms of quality and efficiency. Requirements: Bachelors degree in Electrical Engineering or related degree and 8+ years related experience or Masters degree in Electrical Engineering or related degree and 6+ years related experience 6+ Years of experience writing and debugging complex test benches Must have deep understand of all aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage. Must have proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM Should have exceptionally good command over fundamental OOP principles. A good understanding of a complex protocol like PCIe or other multi-layered protocol Capability to work independently and deliver. Knowledge of PCI Express protocol is desired .

Lathe / CNC / VMC OPERATORS Diploma / ITI / 10+2 freshers - 16 k/m 1 - 2 yrs experienced -18 k/m BE / Diploma for Quality control - 23 K/M Rotational shift ( 8 hours duty) Free food OT extra Sunday Holiday Required Candidate profile Diploma / ITI in Mechanical or Automobile Fresher or experinced in CNC turner and VMC operators (20) BE / Diploma for Quality control (2) Immeidate joiners preferred Call 73585 36378 / 99406 13437 Perks and benefits OT extra , Free Food

Meet quality standards and specifications. IATF Documentation and Audits (Internal/External), New Product Development, New Vendor Developments, PPAP Documents, Kaizen, 5S, 4M. Knowledge of Sheet Metal Stamping, power press Tool Making and Validation. Required Candidate profile b.tech/ diploma in production minimum 4-5 years experience should be ready to travel

Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation! We make real what matters. This is your role. Questa verification IPs help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We dont need superheroes, just super minds. We are seeking Electronics Engineers (B.Tech/M.Tech) or professionals from related fields, graduated from reputed institutes, who possess strong expertise in verification engineering and bring 4-7 years of hands-on experience to the table. You've sound knowledge of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. We are phenomenal teammates, resilient and sincere, with a passion for learning new things and building our knowledge base in new areas!

Looking for Siemens EDA ambassadors Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design. Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based on? Implementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join the team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation! We make real what matters. This is your role. Questa verification IPs help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We dont need superheroes, just super minds. We are seeking Electronics Engineers (B.Tech/M.Tech) or professionals from related fields, graduated from reputed institutes, who possess strong expertise in verification engineering and bring 3-7 years of hands-on experience to the table. You've sound knowledge of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. We are phenomenal teammates, resilient and sincere, with a passion for learning new things and building our knowledge base in new areas! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare. Transform the everyday! #LI-EDA #LI-Hybrid #DVT