536 Vlsi Jobs - Page 6

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: GPU Functional Verification Engineer In the role of GPU Functional Verification Engineer, your project responsibilities will include the following, Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Strategize, brainstorm, and propose a DV environment, develop test bench, own test plan, debug all RTL artefacts, and achieve all signoff matrices Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality Collaborate with worldwide architecture, design, and systems teams to achieve all project goals Currently, we are looking for candidates who can match one or more of the profiles listed below, Strong knowledge of UVM based System Verilog TB Knowledge of GPU pipeline design is a plus, not mandatory Proficiency with formal tools- working knowledge of Property based FV is a plus, not mandatory Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver The pre-Si verification team in Bangalore is currently heavily involved in the following UVM/SV based constrained random test bench for functional verification Subsystem level TB for complete GPU workload analysis and compliance Emulation platforms to analyze performance and pipeline bottlenecks Formal tools- both for reduced time to bug & property based FV sign-off Power Aware & Gate level simulations to deliver a high-quality GPU implementation Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience 2 to 20 years Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking VLSI Digital Design Engineers to lead IP development for the latest WiFi standards. Our WLAN PHY team, comprised of highly passionate and seasoned domain experts, prides itself on years of experience in taking WLAN PHY designs from concept to silicon independently. WLAN PHY team is responsible for delivering the end-to-end Tx/Rx DSP chains- all the way from antenna samples post ADC to raw bits for upper layers and on the reverse path from raw bits to DAC. The team specializes in working with challenges of practical high-speed wireless communication systems and finding innovative solutions to counter them. The team works extensively on typical signal processing functions like filters, matrix transformations (e.g.QR, Cholesky decomposition), channel estimation, equalization (MMSE, MRC, ML), decoders/encoders (e.g.LDPC, Viterbi) , demodulators, FFT etc. on a day-to-day basis, and contributes to the development/ enhancement/ evaluation of signal processing algorithms to cater to new requirements. We are looking for someone as passionate as us and takes pride in their work. WiFi's ubiquity in modern times is undeniable, and the IEEE 802.11 Working Group is continually developing new standards to satisfy the growing demand for high throughput and low-latency real-time applications, such as VR and AR. Qualcomm is at the forefront of the WiFi revolution, aiming to become the global leader in WiFi chip solutions. The WLAN PHY team in Bangalore is instrumental in realizing this vision. Requirements: Looking for a candidate with 1 to 3 years of hands-on experience in micro-architecting and developing complex IPs. Expertise in digital design, VLSI concepts, and experience in creating power/area-efficient IPs across multiple clock domains are essential. Proficiency in RTL coding and familiarity with RTL QA flows such as PLDRC, CDC, and CLP (optional) is expected. Candidates should be capable of proposing design alternatives to meet area/power/performance specifications and presenting these options for review. Experience in leading, guiding, or managing junior team members is advantageous. Repeated success in taking IP designs from requirements to silicon is required. While not mandatory, having developed IPs for wireless technologies (WLAN, LTE, NR, BT, UWB, etc.) or past HLS experience would be beneficial. Skills: Must have: Proficient in Verilog RTL coding, uArch, CDC check, PLDRC, Timing constraints, Python/Perl. Experience in design/debugging complex data-path/control-path IPs. Good communication, analytical & leadership skills. Good to have: System Verilog, Visio, Knowledge of signal processing concepts/algorithms and Wi-Fi standards (802.11a/b/g/n/ac/ax), experience with HLS. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary Join Qualcomms Wireless IP team to design and develop cutting-edge RTL for next-generation cellular and Wi-Fi modem IPs used in mobile, wearable, and IoT platforms. You will work on high-performance, low-power digital designs across the full VLSI development cycle"”from architecture and micro-architecture to RTL implementation and SoC integration. This role offers the opportunity to collaborate with global teams and contribute to market-leading wireless solutions. Key Responsibilities Design and implement RTL for wireless modem IPs and SoC subsystems using Verilog/SystemVerilog. Develop micro-architecture specifications and deliver high-quality, synthesizable RTL. Integrate complex subsystems into SoC environments and support design convergence. Collaborate with system architects, verification, SoC, software, DFT, and physical design teams. Apply low-power design techniques including clock gating, power gating, and multi-voltage domains. Analyze and optimize for performance, area, and power. Ensure protocol compliance and performance of interconnects, buses (AXI, AHB, APB), and bridges. Conduct CDC and lint checks using tools like Spyglass and resolve waivers. Participate in post-silicon debug and bring-up activities. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Preferred Skills & Experience 2"“15 years of experience in digital front-end ASIC/RTL design. Strong expertise in Verilog/SystemVerilog RTL coding and micro-architecture development. Familiarity with wireless protocols such as IEEE 802.11 (a/b/g/n/ac/ax/be), LTE, or 5G NR is highly desirable. Solid understanding of bus protocols (AXI, AHB, APB) and bridge logic. Experience with wireless modem IPs or similar high-performance digital blocks is a plus. Familiarity with low-power design methodologies and CDC handling. Hands-on experience with tools like Spyglass, 0-in, Design Compiler, PrimeTime, and simulation environments. Exposure to post-silicon debug and SoC integration challenges. Strong documentation and communication skills. Self-motivated with a collaborative mindset and ability to work with minimal supervision. Minimum Qualifications Bachelors or Masters degree in Electronics, VLSI, Communications, or related field. Proven experience in RTL design and SoC development. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Additional 7-14 yrs experience in Physical Design and timing signoff for high speed cores. Should have good exposure to high frequency design convergence for physical design with PPA targets and PDN methodology. Masters/Bachelors Degree in Electrical/Electronics science engineering with at least 7+ years of experience in IC design. Experience in leading block level or chip level Physical Design, STA and PDN activities. Work independently in the areas of RTL to GDSII implementation. Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Knowledge of low power flow (power gating, multi-Vt flow, power supply management etc.) Circuit level comprehension of time critical paths in the design Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.) Tcl/Perl scripting Willing to handle technical deliveries with a small team of engineers. Strong problem-solving skills. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Responsibilities Front-End implementation of MSIP (Temp/Voltage/Security Sensors, Controllers) designs RTL development and its validation for linting, clock-domain crossing, conformal low power and DFT rules. Work with functional verification team on test-plan development and debug. Develop timing constraints, deliver synthesized netlist to physical design team, and provide constraints support for PD STA. UPF writing, power aware equivalence checks and low power checks. DFT insertion and ATPG analysis for optimal SAF, TDF coverage. Provide support to SoC integration and chip level pre/post-silicon debug. Skills & Experience MTech/BTech in EE/CS with hardware engineering experience of 5+ years. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: QCT is currently seeking digital verification engineers for the mixed-signal ASICs that support QCTs mobile platforms for next generation 5G RFIC/PMIC/Codec technologies. Successful candidates will be working on the following - Block/Subsystem/SoC level digital IP verification using constrained-random coverage methodologies at both RTL and Gate Level. The skills involved includes SV/UVM/UVM_REG/Randomization/Coverage/SVA. Preferred Qualifications -Experience in writing Test Plans independently -Experience with debugging RTL & Gate level simulations -Experience with Functional Coverage &Code Coverage -Experience with Scripting in perl, python, tcl -Experience in planning Verification architecture, review testbench/ testplans with juniors, identify coverage gaps, propose alternate methods for coverage - Should have been involved in leading a chip DV effort - Silicon Debug Experience a plus. - Experience with Mixed Signal Designs involving DSP a plus - Modeling Experience with Matlab, Octave a plus Minimum Qualifications RequiredBachelor's, Electronics or EE PreferredMaster's, VLSI, Electronics or EE. 5+ years ASIC design, verification, or related work experience Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. We are hiring across mutliple roles in the below domain: 1. Physical Design 2.RTL Design 3. Design Verification 4. STA/ Synthesis 5. DFT 6. FPGA Emulation 7. Validation Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Strong System Verilog and UVM expertise ,DDR protocol knowledge ,GLS experience ,Testbench development, Test planning and execution , debugging & scripting skills

We are seeking highly motivated DFT engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation, and delivery of DFT patterns for IBM’s chip design team. As a member of DFT team you will be required but not restricted to pattern generation, simulation, validation, characterization, delivery to TAE, IBM’s Hardware Bring-up and Silicon Debug. You will play a key role in silicon bring-up, workload execution and validation. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Proficiency inC and Pythonfor validation and automation Hands on experiencec in Writing/ maintaining test programs and automation scripts using C and Python Experience in chip bring-up /debug Experience in chip-level throttling issuesincluding power, thermal, and frequency-related behavior Knowledge on Analyzing trace data/logs and on-chip debug outputs for failure root cause Should be able to InterpretVerilog RTLto support functional and performance debug Collaborate with RTL, firmware, validation, and DFT teams for end-to-end issue resolution Strong understanding ofchip boot flowsandbring-up sequences Familiarity withassembly-level debuggingon RISC/V, ARM, or other architectures Ability to read and debugVerilog RTL code In depth understanding of chip internals, including resets, clocking, and register programming Preferred technical and professional experience Experience inpost-silicon validation, emulation or pre-silicon environments Exposure to firmware-hardware interactions Knowledge of debug infrastructure and on-chip monitoring tools Familiarity with version control tools like Git

You are currently looking to hire a Program / Project Manager with experience in the Semiconductor domain. The ideal candidate should have 5-7 years of experience in the industry and will be responsible for managing multiple VLSI projects from start to finish. This role requires planning resources, tracking progress, and ensuring timely delivery of projects. The candidate will also be expected to handle client communication, project reporting, identify risks, and drive issue resolution. Collaboration with cross-functional teams such as RTL, DV, PD, DFT, etc., is a key aspect of this position. The successful candidate must have a minimum of 5 years of experience in the VLSI/semiconductor industry. Strong project or program management skills are essential, along with excellent communication and coordination abilities. A technical background (B.Tech/MTech) is required, and an MBA would be considered a plus. This position offers a competitive budget of 15 lpa and is based in HYD. The preferred notice period for applicants is immediate or 15 days. Please note that this opportunity is specifically for Product Clients, and Face-to-Face interviews will be conducted. If you meet the requirements mentioned above and are interested in this position, please contact anand.arumugam@modernchipsolutions.com to express your interest.,

We are looking for passionate and skilled VLSI Engineers to join our design team. The candidate will be responsible for developing, simulating, verifying, and optimizing digital integrated circuits at the RTL or physical level.

Hiring now Criteria - B.Tech below 2022 and M.Tech below 2024 Location - Bangalore Preferred Engineers who have completed their Training in #VLSI domains for below requirements #PD #AL #RTL #DFT Share profiles to kartikchandu@juntrantech.com Health insurance Provident fund

Sr. Staff RTL Design Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 10862 Remote Eligible No Date Posted 13/07/2025 Job Titles: Senior Staff ASIC RTL Design Engineer - Bangalore location We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and highly skilled digital design engineer with a strong background in ASIC RTL design. You thrive on technical challenges, enjoy collaborating with global teams, and are motivated by seeing your designs come to life in real-world products. With over8 years of hands-on experience in architecting, implementing, and verifying complex digital systems, you are adept at translating functional specifications into efficient, robust RTL. Your experience spans data path and control path designs, and you are comfortable working with industry-standard protocols such as Ethernet, DDR, PCIe, USB, and AMBA.You possess deep expertise in synthesizable Verilog/SystemVerilog, design flows, and EDA tools. You are equally at home mentoring junior engineers as you are diving deep into code or debugging complex issues. Your ability to balance area, latency, and throughput trade-offs sets you apart, and your attention to detail ensures high-quality, reliable IP cores. You communicate effectively with both technical and non-technical stakeholders and are comfortable engaging with customers to clarify requirements and ensure successful delivery.You value diversity, inclusion, and continuous learning, and you bring a collaborative spirit to every project. If you re ready to lead, innovate, and make a tangible impact in the world of high-performance silicon design, Synopsys is the place for you. What You ll Be Doing: Architecting, designing, and implementing state-of-the-art RTL for high-performance synthesizable IP cores within the DesignWare family. Translating complex functional and standard specifications into detailed architecture and micro-architecture documents for medium to high complexity blocks. Owning the entire digital design lifecycle, including RTL coding, synthesis, CDC analysis, debugging, and test development. Collaborating with global, multi-site teams of expert engineers to drive technical excellence and innovation. Interacting with customers to understand and refine specification requirements and providing technical guidance as needed. Mentoring and technically leading junior designers, fostering growth and sharing best practices within the team. Participating in design reviews, quality process improvements, and ensuring adherence to industry-leading verification and design methodologies. The Impact You Will Have: Delivering robust, high-quality IP cores that power next-generation commercial, enterprise, and automotive applications worldwide. Driving innovation in digital ASIC design, enabling faster, more efficient, and reliable silicon solutions for Synopsys customers. Contributing to the advancement of industry standards and protocols through technical leadership and deep domain expertise. Enhancing team performance through mentorship, knowledge sharing, and technical guidance. Strengthening Synopsys reputation as a leader in chip design by consistently delivering on complex customer requirements. Accelerating product development cycles by streamlining design processes and championing best-in-class methodologies. What You ll Need: Bachelor s or Master s degree in EE, EC, or VLSI with8+ years of relevant industry experience in digital ASIC RTL design. Expertise in data path and algorithmic block design (e.g., Reed Solomon FEC, BCH codes, MAC SEC engines) and architecture trade-offs. Proficiency in synthesizable Verilog/SystemVerilog RTL coding, simulation, and EDA tools. Hands-on experience with design flows including Lint, CDC, synthesis, static timing analysis, and formal checking. Strong knowledge of industry-standard protocols (Ethernet, DDR, PCIe, USB, MIPI-UFS/Unipro, SD-MMC, AMBA AXI/AMBA2). Experience with high-speed design (>600MHz), P&R aware synthesis, and tools like Fusion Compiler is a significant plus. Familiarity with revision control systems (e.g., Perforce) and scripting languages (Perl/Shell). Prior experience as a technical lead or mentor within a design team is highly desirable. Who You Are: A collaborative team player who thrives in a global, distributed environment. An effective communicator, adept at conveying complex technical ideas to diverse stakeholders. A proactive problem-solver with strong analytical skills and high initiative. Detail-oriented, quality-focused, and committed to delivering excellence. Passionate about mentoring and enabling the growth of others. Dedicated to diversity, inclusion, and fostering an open, respectful workplace. The Team You ll Be A Part Of: You ll be an integral member of the DesignWare IP Design R&D team at Synopsys Bangalore, collaborating with some of the brightest minds in the industry. The team is focused on developing cutting-edge synthesizable IP cores that are deployed in a wide range of commercial, enterprise, and automotive applications. Working in a multi-site, global environment, you ll have opportunities to engage with cross-functional teams, contribute to technical excellence, and drive innovation in digital design. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Since June 2021, frog is part of Capgemini Invent . frog partners with customer-centric enterprises to drive sustainable growth, by building and orchestrating experiences at scale, while harnessing the power of data and technology. Were inventing the future of customer experiences by delivering market-defining business models, products, services, brand engagements and communications. Joining frog means youll be joining the pond, a global network of studios, each with a thriving in-person and vibrant virtual culture. frogs are curious, collaborative, and courageous, united by our passion for improving the human experience across our areas of expertise, while each bringing our unique and diverse skills and experiences to the table. We draw on our global reach and local knowledge to solve complex problems and create innovative, sustainable solutions that touch hearts and move markets. frogs prize humour, positivity, and community just as highly as performance and outcomes. Our culture is open, flexible, inclusive, and engaging. Working at frog means being empowered to meet the moment, and Make Your Mark on every project, in your studio, your community and the world at large. Equal Opportunities at frog Frog and Capgemini Invent are Equal Opportunity Employers encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status, or any other characteristic protected by law.

Title : Principal Engineer - Analog and Mixed-Signal Circuit Design About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: The Reference Design team, Bangalore, is looking for a talented and motivated candidate to work in the broad area of Analog and Mixed-Signal circuit design The candidate should have strong background in: CMOS Analog design fundamentals. Example circuit blocks include OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Hands on experience with Cadence Virtuoso Schematic and Layout editors Candidate is also expected to have a good understanding of MOS device operation Your Job : Design the various analog/mixed-signal circuits to meet target specifications. Layout of the designed circuits and understand the impact of parasitics on the circuit specifications Measure the design on hardware and analyze the results Analyze the impact of device characteristics on circuit-level performance Understand the critical circuit specifications which are important for achieving system-level performance Help in automation and other efficiency projects Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications : Requires PhD with Specialization in Electronics (VLSI, Microelectronics and related fields) from a reputed university, with good academic records Must be self-motivated and excellent team player Must have good technical verbal and written communication skills and ability to work with cross functional global teams Be able to collaborate with program and technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desired Patents and publications will be a good advantage. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. Strong ability to learn and explore new technologies, opportunities, and continuous improvement. Ability to interact effectively with both external and internal customers at all levels and from various cultural backgrounds. #NCGProgramIND GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

Title : Principal Engineer - Analog and Mixed-Signal Circuit Design About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: The Reference Design team, Bangalore, is looking for a talented and motivated candidate to work in the broad area of Analog and Mixed-Signal circuit design The candidate should have strong background in: CMOS Analog design fundamentals. Example circuit blocks include OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Hands on experience with Cadence Virtuoso Schematic and Layout editors Candidate is also expected to have a good understanding of MOS device operation Your Job : Design the various analog/mixed-signal circuits to meet target specifications. Layout of the designed circuits and understand the impact of parasitics on the circuit specifications Measure the design on hardware and analyze the results Analyze the impact of device characteristics on circuit-level performance Understand the critical circuit specifications which are important for achieving system-level performance Help in automation and other efficiency projects Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications : Requires PhD with Specialization in Electronics (VLSI, Microelectronics and related fields) from a reputed university, with good academic records Must be self-motivated and excellent team player Must have good technical verbal and written communication skills and ability to work with cross functional global teams Be able to collaborate with program and technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desired Patents and publications will be a good advantage. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. Strong ability to learn and explore new technologies, opportunities, and continuous improvement. Ability to interact effectively with both external and internal customers at all levels and from various cultural backgrounds. #NCGProgramIND

Amazon Lab126 is an inventive research and development company that designs and engineers high-profile devices like the Kindle family of products. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc. Since then, we have worked to produce best-selling e-readers and tablets, as well as new inventions like Echo line of products, Fire TV and Fire phone. What will you help us create As a Senior Electrical Validation Engineer, you will be part of Validation team that is exploring new hardware designs to improve our devices. In this role, you will create, define and develop electrical validation environment and test suites. You will also be responsible for the development of methodologies, execution of validation plans, debug of failures and follow up to closure. You will work closely with multi-disciplinary groups including Board Design, System Architects, IP developers, and Software Engineering, to verify and deliver complex, high volume SoCs that enable development of world-class hardware devices. In this role, you will: Perform electrical compliance test specifications / compliance test suite for various interfaces and conduct lab measurements Work on high-speed serial I/O interfaces like (LP)DDR4/5, USB, CSI/DSI, HDMI, PCIe interfaces etc. Perform documentation and communicate data across large number of tests and measurement results Drive initiatives to improve process, procedures, and quality of High Speed Characterization at SOC & Product level. Work on schematic and PCB physical design tools to interpret the design and locate physical probe points. Bachelor s degree or higher in EE, ECE, or CS with atleast 10+ years of Industry experience High speed serial interface analog building blocks, protocol, specifications and test methods Proficiency in handling High Bandwidth oscilloscopes, BERT, logic analyzers and understanding of probing techniques Understanding of Power & signal integrity concepts such as differential impedance, jitter, insertion loss, return loss, termination, etc. PCB layout best practices Good understanding of High-Speed Analog/Digital Circuits, VLSI, semiconductor physics MS/ME in Computer Science, Electrical Engineering, or related field Writing Python/TCL/PERL code to automate test procedures Good software architecture principles and development practices Scripting experience in any programming language (C++, Python, PERL, MATLAB) to develop automation scripts is a plus. Experience in Analog IP Characterization (SerDes, PLL, DDR) is desirable. Familiarity with Transmitter and Receiver design blocks. Understanding of equalization techniques (CTLE/DFE).

Develop knowledge on protocols and products based on industry leading protocols such as I3C, DDR, SD, AXI, AHB Gain knowledge on ASIC flow and learn various tools used in the ASIC flow Work with a team of highly experienced applications engineers to provide comprehensive consulting on our IP products Participate in providing feedback on product documentation and collateral Develop presentation and team working skills What you'll Need: Currently pursuing a masters degree in Electrical/Electronic/Computer Engineering with exposure to VLSI, Verilog, coding skills, FPGAs A self-motivated and excellent communicator will be ideal candidate for this role

You are hiring for a Program / Project Manager role with experience in the Semiconductor domain. This position requires 5-7 years of experience and offers a budget of 15 lpa. The location for this role is in Hyderabad, and the ideal candidates should have an immediate or 15 days notice period. As a Program / Project Manager in this role, your key responsibilities will include managing multiple VLSI (Semiconductor) projects from start to finish. You will be responsible for planning resources, tracking progress, and ensuring timely delivery of projects. Additionally, you will handle client communication, project reporting, identify risks, and drive issue resolution. Collaboration with cross-functional teams such as RTL, DV, PD, DFT, etc., will also be a part of your responsibilities. To be successful in this role, you should have at least 5 years of experience in the VLSI/semiconductor industry. Strong project or program management skills are essential, along with good communication and coordination abilities. A technical background (B.Tech/MTech) is required, and an MBA would be considered a plus. If you meet these requirements and are interested in this opportunity, please reach out to anand.arumugam@modernchipsolutions.com.,

The position at Manipal Institute of Technology (MIT) is offering a full-time on-site PhD Position in Udupi, Karnataka, India. As a PhD candidate, you will be responsible for conducting research, publishing papers, attending seminars, collaborating with faculty members, and teaching undergraduate students. The ideal candidate should have a background in B.Tech/M.Tech in ECE, VLSI, EE, Semiconductors, Nanotechnology. This is a great opportunity to be part of a dynamic academic environment and contribute to the field of engineering and technology.,

Indore Institute of Science and Technology (IIST) is one of the top engineering colleges in Indore, established in 2003. The institute holds NAAC A+ Accreditation, approval from AICTE, New Delhi, recognition by UGC under section 2(f), and affiliation to RGPV Bhopal. Offering Bachelor of Technology degrees in various specializations like CS, IT, AIML, DS, EC, ECS, Civil, RAI, and Mechanical Engineering, alongside Master's Degrees in CSE, AIML, and DS, IIST is committed to enhancing the employability quotient of its students through holistic development. Currently, IIST is seeking candidates for faculty positions in the Electronics and Communication Engineering (ECE) Department for the academic year 2025-26. Fresh PG/PhD graduates are also encouraged to apply for this opportunity. Key Benefits: - Competitive salary and benefits package. - Opportunities for professional development and growth. - A vibrant campus community with diverse activities and events. Responsibilities: - Deliver high-quality lectures and tutorials to ensure effective teaching and learning. - Supervise research projects for undergraduate and postgraduate students, nurturing innovative thinking. - Implement creative teaching methodologies to enhance the learning experience. - Conduct impactful research and publish in reputable journals. - Promote patents, Entrepreneurship Development Cell (EDC), and startup initiatives. - Collaborate with industries and facilitate value-added student programs. - Mentor students for their academic and career advancement. Qualifications and Experience: Assistant Professor: - Masters Degree in Robotics, Embedded System, Drone Technology, or Electronics and Communication Engineering with a First Class at all levels. - 0-1 years of teaching, research, or industry experience (Freshers can also apply). - Excellent communication skills and a dedication to academic excellence. Industry Trainer: - Bachelors/Masters Degree in Robotics, Embedded System, Drone Technology, Electronics and Communication Engineering, or related field. - Minimum 3 years of relevant industry experience. - Expertise in specialized domains like VLSI, IoT, AI, Robotics, or Drone Technology. - Proven ability to conduct hands-on training and workshops. - Strong communication, presentation, networking, and collaboration skills within the industry. Subject/Area of Expertise: - VLSI Design and Embedded Systems. - Robotics and Automation. - Drone Technology. - Internet of Things (IoT). - Artificial Intelligence and its Applications. Contact: 9826288439 Email: hr@indoreinstitute.com, dgoffice@indoreinstitute.com How to Apply: Interested and Eligible candidates are requested to send their applications with a scanned copy of all relevant certificates and a passport size photograph to the provided email address.,

GlobalFoundries is seeking experienced professionals to develop and deliver computational patterning (Optical proximity Correction (OPC)) solutions for new mature technology derivative programs ranging from 0.18um down to 22nm Technode. The core responsibilities of this team involve ownership of FeatureRich CMOS Product Line OPC recipe and verification recipe, driving OPC improvement to support Fab patterning module for overall patterning manufacturing process enhancement. This role is required to collaborate with design rule, lithography, etch, modeling, and infrastructure engineers in cross-functional team environments to determine optimal computational solutions. Title : Sr Engineer - FRCMOS OPC About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: GlobalFoundries is seeking experienced professionals to develop and deliver computational patterning (Optical proximity Correction (OPC)) solutions for new mature technology derivative programs ranging from 0.18um down to 22nm Technode. The core responsibilities of this team involve ownership of Feature Rich CMOS Product Line OPC recipe and verification recipe, driving OPC improvement to support Fab patterning module for overall patterning manufacturing process enhancement. This role is required to collaborate with design rule, lithography, etch, modeling, and infrastructure engineers in cross-functional team environments to determine optimal computational solutions. Your Job: Develop OPC Tech file and verification solution for new mature technology derivative programs ranging from 0.18um down to 22nm Technode. Ensure the Tech file solution complies to the Best-Known Method (BKM) and its robustness in terms of convergence, PV band, MRC, Verification to support various geometry environment though intensive testing prior to release for mask write. Perform root cause analysis of printing and yield limiting hotspots using proven tools Provide improvement and fixed for hotspot found during early dry runs/ production tapeout review Support various OPC related/simulation requests from Fab team/Process integration/PDK team. Improve auto-pass rate for production tapeout. Collaborate with vendors for OPC software improvements and upgrades. Qualify new software version on existing OPC Tech file prior to production use. Participate and collaborate on Global OPC internal projects to meet Global OPC team goals for 3R (Request, Realize and Release) process standardization and efficiency/effectiveness improvement through KPIs. Works on small projects or on sets of tasks of large projects and assignments. Perform all tasks/projects in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Comply to GF company policy and organization requirement Required Qualifications: Education: MS/MTech is preferred Specialization on Microelectronics/VLSI or related fields Show mastery of many aspects within one technical discipline, with group-wide recognition as a senior member of a technical team. Good written, presentation, communication skills and open to interact with all levels. Good analytical and project management skills. Ability to work independently and collaboratively with minimum supervision. Ability to prioritize and manage multiple project timelines in a fast-paced environment. Good ownership and accountability, self-motivated, flexible and disciplined Preferred Qualifications: Experience in Semiconductor wafer fabrication process, Lithography, Process Integration, computer modeling, OPC and Design Rules. Experience in UNIX/Linux, shell programming, scripting languages (Python, PERL, Tcl/Tk, lua, Matlab etc.). #NCGProgramIND GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in India will have to be fully vaccinated prior to their targeted start date. For new hires, the appointment is contingent upon the provision of a copy of their COVID-19 vaccination document, subject to any written request for medical or religious accommodation. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Required technical and professional expertise -2+ years of relevant experience - At least 1 generation of processor L2 cache or LLC design delivery leadership. - Expertise in cache coherence protocols for symmetric multiprocessors (SMP), covering both chip SMP and multi-socket SMP. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. - Experience in logical and physical design of caches including directories (tags, set associative memories), data SRAM, design for low latency, multiple parallel finite state machine design, deadlock-free designs.

GlobalFoundries is seeking experienced professionals to develop and deliver computational patterning (Optical proximity Correction (OPC)) solutions for new mature technology derivative programs ranging from 0.18um down to 22nm Technode. The core responsibilities of this team involve ownership of FeatureRich CMOS Product Line OPC recipe and verification recipe, driving OPC improvement to support Fab patterning module for overall patterning manufacturing process enhancement. This role is required to collaborate with design rule, lithography, etch, modeling, and infrastructure engineers in cross-functional team environments to determine optimal computational solutions. Title : Sr Engineer - FRCMOS OPC About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: GlobalFoundries is seeking experienced professionals to develop and deliver computational patterning (Optical proximity Correction (OPC)) solutions for new mature technology derivative programs ranging from 0.18um down to 22nm Technode. The core responsibilities of this team involve ownership of Feature Rich CMOS Product Line OPC recipe and verification recipe, driving OPC improvement to support Fab patterning module for overall patterning manufacturing process enhancement. This role is required to collaborate with design rule, lithography, etch, modeling, and infrastructure engineers in cross-functional team environments to determine optimal computational solutions. Your Job: Develop OPC Tech file and verification solution for new mature technology derivative programs ranging from 0.18um down to 22nm Technode. Ensure the Tech file solution complies to the Best-Known Method (BKM) and its robustness in terms of convergence, PV band, MRC, Verification to support various geometry environment though intensive testing prior to release for mask write. Perform root cause analysis of printing and yield limiting hotspots using proven tools Provide improvement and fixed for hotspot found during early dry runs/ production tapeout review Support various OPC related/simulation requests from Fab team/Process integration/PDK team. Improve auto-pass rate for production tapeout. Collaborate with vendors for OPC software improvements and upgrades. Qualify new software version on existing OPC Tech file prior to production use. Participate and collaborate on Global OPC internal projects to meet Global OPC team goals for 3R (Request, Realize and Release) process standardization and efficiency/effectiveness improvement through KPIs. Works on small projects or on sets of tasks of large projects and assignments. Perform all tasks/projects in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Comply to GF company policy and organization requirement Required Qualifications: Education: MS/MTech is preferred Specialization on Microelectronics/VLSI or related fields Show mastery of many aspects within one technical discipline, with group-wide recognition as a senior member of a technical team. Good written, presentation, communication skills and open to interact with all levels. Good analytical and project management skills. Ability to work independently and collaboratively with minimum supervision. Ability to prioritize and manage multiple project timelines in a fast-paced environment. Good ownership and accountability, self-motivated, flexible and disciplined Preferred Qualifications: Experience in Semiconductor wafer fabrication process, Lithography, Process Integration, computer modeling, OPC and Design Rules. Experience in UNIX/Linux, shell programming, scripting languages (Python, PERL, Tcl/Tk, lua, Matlab etc.). #NCGProgramIND GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in India will have to be fully vaccinated prior to their targeted start date. For new hires, the appointment is contingent upon the provision of a copy of their COVID-19 vaccination document, subject to any written request for medical or religious accommodation.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: Semiconductor Integration. Experience: 3-5 Years.