536 Vlsi Jobs - Page 2

Overview: The role is for an Active Directory Engineer in Core Infra IAM operations within Identity & Access Technology Services, responsible for the operation of the Active Directory environment and related technologies. Responsible for the delivery of tiered admin solution and other global solutions for both on premise and cloud identity solutions. The successful candidate must possess relevant experience of operating enterprise scale identity platforms. Role / Principal Accountabilities: The Core Infra IAM function is responsible for operating of all aspects of core infrastructure components relating to Identity and Access Management. The candidate must be highly self-motivated team player with good oral and written skills and confidence to present to management. The candidate should also have a good sense of discipline for change control procedures. A flexible work ethic is required with the ability to form part of a multi-platform global function Skills & Experience Required: Demonstrate an ability to work well as part of a global team, and on their own when required. Strong oral and written communication Enthusiastic, eager and personable. Ability to cope well under pressure. Essential: Subject-matter expert knowledge of Active Directory related technologies (i.e., Group Policy, DHCP, DNS, Active Directory enterprise design principles etc.) Subject-matter expert knowledge of Active Directory OU structures and delegation models and understanding of impact when moving objects within OU structures. Subject-matter expert knowledge of Windows Server technologies Experience in using and developing automation and scripting (PowerShell) to drive efficiencies. Desirable: Enterprise-scale technical experience designing and deploying tiered administrative / Enterprise Access Models.

You will be responsible for working with the VisualSim architect software package to develop a complete test bed for an application in the fields of VLSI, aerospace, or automotive. Your role will involve researching and proving assertions on existing technology challenges, analyzing models, and comparing results with similar papers published online. Additionally, you will be required to write an industry paper based on your findings and publish it. To be successful in this position, you must have completed coursework in computer architecture, VLSI design, processor internals, and related studies. It is also essential to have prior experience in evaluating semiconductor or embedded system architecture through school projects or internship work.,

Role & responsibilities Lead and manage the Electronic product design and R&D teams. Involve in design of VFD integration, motor controls, and embedded electronics. Ensure compliance with ISO, BIS, IEC, and other industry standards. Coordinate with production, quality, and supply chain to ensure manufacturability and cost optimization. Manage the complete product lifecycle from concept to prototype to production launch. Collaborate with sales/marketing to understand market needs and convert them into design requirements. Implement advanced design tools (CAD/CAE/CFD) for simulation and optimization. Drive innovation in energy efficiency, smart controls (IoT), and sustainability. Prepare and monitor department budgets, timelines, and resource allocation. Mentor and build a high-performing design team. Required Qualifications & Skills: Education: B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering. Experience: 18 - 25+ years in design, with at least 5 - 8 years in a senior leadership role. Strong knowledge of motor technology, VFD, and control systems. Expertise in CAD, FEA, CFD, and product development tools. Excellent leadership, communication, and project management skills. Dhivakar D BVR People Consulting dhivakar@bvrpc.com

MTS GFX Verification Role: We are currently seeking a highly skilled verification engineer for GFX Verification team. Responsibilities: In this role, he/she would be responsible for verification of GPU Verification by meeting the demands of the constantly evolving project schedule. The successful candidate will be a member of the GFX team. He/she will demonstrate passion towards design, design verification, be a teammate, a problem solver with independence, creativity, and interpersonal skills. Working with all partners such as lead architects and block design teams to understand features to be implemented and verified. Developing robust test plan for both synthetic testing and real workload trace Debug verification test failures, working with the design team to accurate defects. Make sure AMD next generation GFXIP can meet performance/power/function expectation. Requirements: Must have Min 8 years of experienced in ASIC verification. Must be proficient in Verilog and System Verilog language Must be good at C/C++ programming and working in Linux and Windows environments. Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation/emulation tools and do test plan, test creation and triage, coverage, and assertion etc. Be proficient of script language like Perl, Python. Must demonstrate strong analytical thinking and problem-solving skills with an excellent attention to detail. Must have good English hearing, speaking, reading, and writing capabilities. Must have good teamwork and interpersonal skills. Graphics pipeline experience is preferred. Good knowledge of computer architecture is preferred. Must be a self-starter, and able to independently drive tasks to completion. Good teamwork and communications skills are required. Academic credentials: B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering / Computer Engineering with Digital Systems/VLSI as major with 8+ Years of Exp Location: Bangalore, India #LI-NS1

We are seeking a highly skilled DFT Engineer to be part of our growing VLSI/ASIC design team. Contact.-7982405927

Job Description: As a Technical Developer at Five Feed Learning Solutions Pvt. Ltd., you will be responsible for various aspects of FPGA and RTL design. You should possess good communication skills and analytical problem-solving capabilities. Your role will involve hands-on experience in FPGA/RTL Design using Verilog HDL, Tanner, Vivado ISE/Xilinx ISE, Modelsim, and Synplify Synopsys. A strong knowledge of VLSI Circuit designs and parameter synthesis is essential. Knowledge of TCAD, HSPICE, and PSPICE will be advantageous. Your responsibilities will include RTL design, verification, FPGA partitioning and implementation, as well as lab-based bring up of the SoC on FPGAs. Recent FPGA experience, including implementation, synthesis using Synplify, and timing closure with Vivado/ISE, is required. You should be able to architect, implement, and verify modules for FPGA interconnect. Proficiency in Verilog, Perl, and Make is expected. You should have expertise in both simulation-based verification and lab-based debug skills on FPGAs. Qualifications: - Graduation in B.E, B.Tech - Post Graduation in M.E., M.Tech VLSI Perks & Benefits: - Salary: Rs 2.5 Lacs - 4 Lacs p.a - Key Skills: Custom Coding, Technical Support, VLSI, Modelsim, Verilog, FPGAs, Perl, Synplify, Vivado/ISE, Xilinx ISE - Industry: Education / Training - Number of Positions: 2 Recruiter Profile: Recruiter Name: Not specified Email Address: hiringteam.3@fflspl.com Contact Company: Five Feed Learning Solutions Pvt. Ltd. Reference ID: FFLSPL/Feb-2025/189-92,

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. The position available is for a Principal Engineer/Manager, CAD tools & Methodology based in Noida. The ideal candidate will lead a 20+ CAD team in Noida, delivering tools/flows/methodologies to enable Qualcomm to build its most complex SoCs in cutting-edge process nodes. Responsibilities include managing all CAD functions in Noida, driving tools, flows, methodologies globally, leading the local EDA vendor eco-system, and serving as the interface to Qualcomm execution teams in Noida. Qualifications for this role include at least 15 years of experience in the development of tools/flows/methodologies in RTL, DV, synthesis, PnR, or Signoff. The candidate should have a proven record of driving new innovative tool/flow/methodology solutions and have experience managing a medium-sized team. A preferred educational background is a Masters in VLSI or Computer Science, with a minimum requirement of a Bachelors in Electronics/Electrical Engineering/Computer Science. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If accommodations are needed during the application/hiring process, individuals can reach out to disability-accommodations@qualcomm.com or call Qualcomm's toll-free number. The company expects its employees to abide by all applicable policies and procedures, including security and confidentiality requirements. Please note that Qualcomm's Careers Site is only for individuals seeking a job at Qualcomm, and unsolicited submissions from staffing and recruiting agencies will not be accepted. For more information about this role, interested individuals can contact Qualcomm Careers directly.,

You will be joining Wipro Limited, a leading technology services and consulting company with a focus on developing innovative solutions to meet the complex digital transformation needs of clients. With a comprehensive portfolio of capabilities in consulting, design, engineering, and operations, we assist clients in achieving their most ambitious goals and establishing sustainable, future-ready businesses. Our global presence spans over 65 countries, with a workforce of more than 230,000 employees and business partners dedicated to supporting our customers, colleagues, and communities in navigating an ever-evolving world. As a candidate for this role, you must possess mandatory skills in VLSI HVL Verification with a minimum experience of 5-8 years. At Wipro, we are in the process of building a modern organization that is committed to digital transformation. We seek individuals who are motivated by the concept of reinvention - be it of themselves, their careers, or their skills. We encourage continuous evolution within our business and industry, as we believe adaptation is key to our success. Join us at Wipro, a place driven by purpose and a culture that empowers you to shape your own reinvention journey. Embrace this opportunity to realize your ambitions in a dynamic and inclusive environment. We welcome applications from individuals with disabilities.,

Power Management IC Design (PMIC) More Details Power Management IC Design (PMIC) AISEMICON The Analog Design Engineer will lead the design of Power Management IC products. We are looking for a person who possesses technical expertise in DC-DC converters (Buck/Boost). Experience of Power Management IC design / knowledge of Power converters architecture is must requirement for this role. Responsibilities Development of Power Management Products with emphasis on switching converters Buck, Boost and LDO design. Knowledge of Power converter architectures Buck, Boost etc. Thorough knowledge of Analog design- OpAmp, Comparators, Bandgap References, Oscillators etc. Responsible to architecture and analysis for control loops Responsible for analog design, IC floor plan, integration and layout supervision through all stages of IC development Qualifications: Masters/PhD in Electronics/VLSI Understanding of process technologies and device behavior which are important for high voltage, high power operation and reliability issues. 5-7 years of experience. Strong written and verbal communication skills. Proactive, collaborative, and creative approach to innovation, technical development and consensus facilitation to influence optimal project results. Strong team player. Ability to function independently, be self-driven Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. Apply for this position Allowed Type(s): .pdf By using this form you agree with the storage and handling of your data by this website. *

Amazon Lab126 is an inventive research and development company that designs and engineers high-profile devices like the Kindle family of products. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc. Since then, we have worked to produce best-selling e-readers and tablets, as well as new inventions like Echo line of products, Fire TV and Fire phone. What will you help us create As a Signal Integrity Engineer, you will be part of Validation team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for Signal Integrity aspects, compliance, and interoperability of package substrate, PCB, Cable solutions and system-level SI for interfaces like PCIe, DDR, Clocks etc. You will also be responsible for contributing to package and platform design guideline development. You will work closely with multi-disciplinary groups including Board Design, System Architects, IP developers, and Design Engineering, to verify and deliver complex, high volume SoCs that enable development of world-class hardware devices. In this role, you will be: Responsible for defining the design guidelines for internal and external design teams and delivering reference simulation docs for customers Performing modeling of package substrate/PCB channels elements in 3D/2D EM simulation tools. Working with silicon designers, platform designers, package designers, electrical validation teams, etc. to support interconnect and interface performance requirements. Reviewing and evaluating package and board design and providing review feedback. Responsible for providing power delivery solutions across platform, package and SOC level Definition of worst-case currents and voltage drop scenarios, MIM/decoupling allocation, grid choices and analysis, droop control, SOC ESD compliance, On-die droop detectors, usage of on-die delivery solutions like VR, LDO, and Power gates. Bachelors in Electrical or Computer Engineering/Computer Science 6+ years in working on validation of ASIC/SoC products High speed serial interface analog building blocks, protocol, specifications and test methods Familiarity with Simulation tools (ADS, HFSS, PowerSI, PowerDC, Hyperlynx) to execute SI-PI simulations is required. Experience with performing measurement, and correlating measurements to simulations. Experience with modeling and simulation of high-speed interface interconnects/channel. Excellent analytical and problem solving skills Masters in Electrical or Computer Engineering/Computer Science Understanding of Power & signal integrity concepts such as differential impedance, jitter, insertion loss, return loss, termination, etc. Scripting experience in any programming language (C++, Python, PERL, MATLAB) to develop automation scripts is a plus. Experience in Analog IP Characterization (SerDes, PLL, DDR) is desirable. Good understanding of High-Speed Analog/Digital Circuits, VLSI, semiconductor physics

Where Senior Analog Mixed-Signal Design Engineer Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12261 Remote Eligible No Date Posted 23/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced analog design engineer who thrives on tackling complex technical challenges and is eager to make a tangible impact on next-generation technology. You have an in-depth understanding of mixed-signal and analog circuit design, particularly in high-speed SERDES development. Your background in electrical, electronics, or VLSI engineering has equipped you with a strong foundation in CMOS device physics and nanometer technologies, and you are adept at applying this knowledge to develop innovative solutions. You enjoy collaborating with cross-functional teams, sharing your insights, and learning from peers across geographical boundaries. Your commitment to excellence drives you to ensure your designs not only meet but exceed standards for performance, power, and area optimization. You value clear communication and take pride in documenting your work, presenting your findings, and contributing to a culture of continuous improvement. Whether you are working independently or as part of a global team, you demonstrate initiative, adaptability, and a proactive approach to problem-solving. Your curiosity keeps you at the forefront of industry trends, and you are excited to work in an environment that encourages growth, mentorship, and technical leadership. Above all, you are motivated by the prospect of seeing your designs come to life in products that power the world s most advanced technologies. What You ll Be Doing: Designing and developing full-custom analog circuit macros, including analog front-end transceivers, voltage/current-mode drivers, delay-locked loops, phase-locked loops, regulators, equalizers (CTLE, FFE, DFE), impedance calibrators, serializers, deserializers, voltage-controlled oscillators, phase interpolators, bandgap references, and clock data recovery circuits for high-speed PHY IP in advanced CMOS technologies. Ensuring analog sub-block performance adheres to SerDes standards and architectural specifications, with a focus on achieving optimal power, area, and performance targets. Proposing and implementing design and verification strategies using advanced simulation tools to ensure high-quality, robust designs. Overseeing and collaborating on physical layout to minimize the effects of parasitics, device stress, and process variation. Presenting simulation data and design reviews to peers, customers, and cross-functional teams, and incorporating feedback. Documenting design features, test plans, and consulting on electrical characterization for SerDes IP products. Collaborating with diverse teams across different locations, contributing to a culture of technical excellence and innovation. The Impact You Will Have: Accelerate the development of high-performance silicon chips that power tomorrow s technologies enabling faster, more efficient data transfer in critical applications. Help Synopsys maintain its leadership in delivering industry-leading SERDES IP for a wide range of protocols (PCIe, Ethernet, SATA, USB, and more). Drive innovation in mixed-signal analog design, directly influencing the capabilities of next-generation SoCs and system solutions. Contribute to reducing customer project schedules by enabling robust, verified IP blocks that integrate seamlessly into customer designs. Enhance the quality, reliability, and performance of Synopsys IP offerings, strengthening our reputation and customer trust. Mentor and uplift peers, sharing knowledge and best practices to foster a high-performing, inclusive engineering culture. What You ll Need: Bachelor s (BE) with 3+ years or Master s (MTech) with 2+ years of relevant experience in mixed-signal/analog custom circuit design, with a degree in Electrical/Electronics/VLSI Engineering or closely related field. Strong expertise in CMOS circuit design fundamentals, device physics, and analog transistor-level circuit design in nanometer technologies. Hands-on experience with multi-Gbps high-speed design and familiarity with electrical specifications of protocols such as PCIe, Ethernet, SATA, and USB. Proficiency in EDA tools for SPICE simulation, static timing analysis (STA), and parasitic extraction, along with a solid understanding of sub-micron design methodologies. Experience in high-speed datapath full-custom design using digital/CMOS logic cells, including clock path optimization and timing verification. Familiarity with ESD/latch-up verification, mixed-signal analog design challenges, and understanding of crosstalk and coupling impacts on timing. Who You Are: Collaborative and open-minded, thriving in a diverse, global team environment. Analytical and detail-oriented, with a strong commitment to quality and continuous improvement. Effective communicator able to clearly document, present, and discuss complex technical concepts with clarity and confidence. Proactive problem-solver who takes initiative and adapts quickly to new challenges and evolving project requirements. Eager to learn, share knowledge, and mentor others within the team. Passionate about technology and motivated to contribute to industry-defining innovations. The Team You ll Be A Part Of: You will join our high-performing Analog Design SERDES team, a diverse group of engineers dedicated to developing cutting-edge high-speed analog circuits for SERDES IP. The team is known for its collaborative spirit, technical depth, and commitment to pushing the boundaries of what s possible in mixed-signal design. You ll work alongside experienced professionals both locally in Noida and across Synopsys global sites, sharing knowledge and driving innovation together. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Where ASIC Digital Design, Staff Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12333 Remote Eligible No Date Posted 22/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and accomplished digital design engineer with an unyielding drive for excellence. You thrive in technically challenging environments, where your deep understanding of RTL design and system architecture allows you to craft innovative solutions for complex problems. With a solid foundation in electrical engineering or VLSI, you have accumulated over five years of hands-on experience in designing and implementing ASIC solutions, particularly focusing on high-performance protocols such as DDR, PCIe, USB, or HBM. Your expertise extends beyond individual contribution you are equally comfortable leading and mentoring small teams, fostering an environment of collaboration and shared learning. You are adept at translating functional specifications into detailed micro-architecture and design documents, always ensuring clarity and precision. Your technical toolkit includes mastery of Verilog/SystemVerilog, and you are well-versed in industry-standard flows encompassing linting, CDC analysis, synthesis, and static timing. You re not just a technical expert; you are a proactive communicator, an enthusiastic collaborator, and a natural problem solver who takes initiative and ownership of deliverables. Your ability to adapt to a global, multi-site team environment is matched only by your commitment to continuous learning and professional growth. If you re ready to take on a pivotal role in shaping next-generation silicon IP, Synopsys is where your aspirations and impact can soar. What You ll Be Doing: Architecting, designing, and implementing state-of-the-art RTL for the next-generation high-performance DDR PHY and related IP cores. Translating standard and functional specifications into detailed architecture, micro-architecture, and design documentation for medium- to high-complexity features. Contributing as an individual designer handling RTL coding, lint/CDC analysis, synthesis, debug, and test plan development. Collaborating with global teams across multiple sites, ensuring cohesive project execution and knowledge sharing. Leading or mentoring small teams of designers, providing technical guidance and fostering professional development. Engaging in continuous process improvement, proposing and implementing enhancements to design flows and methodologies. Troubleshooting and resolving design and verification issues, ensuring robust and high-quality deliverables. The Impact You Will Have: Directly contributing to the design and delivery of high-performance IP cores that power industry-leading semiconductor solutions worldwide. Elevating Synopsys reputation for technical excellence and innovation in the IP design space. Accelerating the adoption of advanced protocols and interfaces in cutting-edge technologies. Enabling customers to achieve faster time-to-market and superior silicon performance. Mentoring and uplifting team members, fostering a culture of knowledge sharing and technical growth. Driving continuous improvement in design methodologies, enhancing efficiency and product quality. Supporting Synopsys mission to remain at the forefront of the Era of Pervasive Intelligence through breakthrough silicon solutions. What You ll Need: Bachelor s or Master s degree in Electrical Engineering, Electronics, VLSI, or related discipline. 5+ years of relevant industry experience in ASIC digital design, with a focus on protocols like DDR, PCIe, USB, or HBM. In-depth experience with RTL coding in Verilog/SystemVerilog and simulation tools for ASIC design. Strong command of design flows, including lint, CDC, synthesis, static timing analysis, and formal verification. Hands-on expertise in architecting and implementing control path-oriented designs (e.g., asynchronous FIFOs, DMA, SPRAM/DPRAM interfaces). Familiarity with scripting languages such as Perl or Shell an advantage. Demonstrated ability to technically lead or mentor small teams of engineers. Who You Are: A collaborative team player who thrives in a multi-site, multicultural environment. An effective communicator, able to translate complex technical concepts for diverse audiences. A proactive problem-solver with strong analytical and troubleshooting skills. Self-motivated, showing high initiative and ownership of responsibilities. Adaptable and eager to learn, always seeking opportunities for personal and professional growth. Committed to fostering a positive, inclusive, and innovative team culture. The Team You ll Be A Part Of: You will join the R&D Solutions Group at our Bengaluru Design Center, a dynamic and diverse team dedicated to the design and development of industry-leading DesignWare IP cores. As a Technical Individual Contributor, you will collaborate with global experts in a multi-site environment, contributing to technically challenging projects that push the boundaries of silicon design. The team values innovation, continuous learning, and the sharing of knowledge, offering ample opportunities for growth and leadership. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Where Analog Circuit Design Specialist Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12346 Remote Eligible No Date Posted 22/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. Our Silicon Design & Verification business leads the industry in enabling customers to design and verify advanced silicon chips faster and with more reliability. We develop the next-generation processes and models that optimize chips for power, cost, and performance, shaving months off project schedules for our global clientele. We believe in fostering an inclusive and diverse environment where every voice is valued and innovation thrives. You Are: You are a passionate and experienced Analog/Mixed-Signal (A&MS) Circuit Design Engineer with a track record of excellence in high-speed physical interface development. With a deep foundation in CMOS circuit design, device physics, and nanometer technologies, you thrive on solving complex challenges at the intersection of analog and digital domains. You are energized by working on industry-leading projects and are adept at architecting, designing, and validating advanced circuits such as transmitters, receivers, clocking circuits, equalizers, serializers, de-serializers, and analog front ends. Your expertise allows you to optimize for performance, area, and power, and you are comfortable with layout considerations and parasitic optimizations. You value diversity and inclusion, recognizing the strength that comes from varied perspectives and backgrounds. You are ready to contribute to a culture of innovation, respect, and excellence helping Synopsys remain at the forefront of the smart everything revolution. What You ll Be Doing: Designing and developing high-speed analog and mixed-signal full-custom circuit macros, including transmitters, receivers, clocking circuits, equalizers, serializers, de-serializers, and analog front ends for PHY IPs in advanced CMOS technologies (planar and finFET). Analyzing and implementing various analog circuit techniques to optimize dynamic/static power, enhance performance, and reduce silicon area. Collaborating with global teams to define micro-architectures from specifications and create robust simulation environments for design verification. Performing transistor-level circuit design, simulation, and troubleshooting in nanometer processes, with a focus on reliability and manufacturability. Working closely with layout engineers to optimize parasitics, ensure design closure, and address layout-dependent effects. Participating in design reviews, providing technical guidance, and mentoring junior engineers within a high-performing, diverse team. Adopting and developing automation and scripting to streamline design and verification flows, leveraging languages such as Verilog-A and others as needed. The Impact You Will Have: Advance the state-of-the-art in high-speed PHY IP development, contributing directly to next-generation technology in AI, IoT, 5G, and automotive industries. Enable Synopsys customers to achieve faster time-to-market with optimized, reliable, and high-performance silicon solutions. Drive innovation in low-power and high-speed circuit design, helping customers meet stringent power and area targets. Enhance Synopsys reputation as a global leader in silicon design and verification through technical excellence and customer success. Mentor and elevate the skills of team members, fostering a collaborative and growth-oriented culture. Contribute to a diverse and inclusive workplace, ensuring a wide range of perspectives and ideas inform our solutions. What You ll Need: BE + 5 years or MTech + 4 years of relevant experience in Electrical/Electronics/VLSI Engineering or closely related field. Strong fundamentals in CMOS circuit design, device physics, and sub-micron/nanometer methodologies. Hands-on experience in analog transistor-level circuit design for high-speed applications (Multi-Gbps, PAM4 SERDES architectures). Proficiency in SPICE simulations, reliability analysis, and optimizing for layout parasitics. Ability to micro-architect circuits from specifications, set up verification environments, and debug complex analog/mixed-signal circuits. Basic proficiency with automation/scripting languages and familiarity with Verilog-A is a plus. Experience collaborating with cross-site, multicultural teams and strong documentation skills. Who You Are: Innovative thinker with a problem-solving mindset and a passion for continuous learning. Collaborative team player who values diversity, inclusion, and open communication. Detail-oriented, quality-focused, and committed to delivering results on time. Strong interpersonal and mentoring skills, able to guide and support less experienced team members. Adaptable and resilient, comfortable working in a fast-paced, dynamic environment. The Team You ll Be A Part Of: You will join a dynamic, high-performing team dedicated to the design and development of high-speed physical interfaces for advanced semiconductor products. Our team is composed of talented engineers with deep expertise in analog and mixed-signal design, working collaboratively across multiple sites worldwide. We value innovation, knowledge-sharing, and a culture of mutual respect, enabling every team member to grow and contribute to industry-leading solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

We are looking for passionate and skilled VLSI Engineers to join our design team. The candidate will be responsible for developing, simulating, verifying, and optimizing digital integrated circuits at the RTL or physical level.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: ASIC Design. Experience: 3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: ASIC Synthesis. Experience: 3-5 Years.

NVIDIA has been transforming computer graphics, PC Gaming, and accelerated computing for more than 25 years. It s a unique legacy of innovation that s motivated by great technology and amazing people. Today, we are tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what s never been done before takes vision, innovation, and the world s best talent. As an NVIDIAN, you ll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. The HWPM Team at NVIDIA is seeking an excellent ASIC Senior Verification Engineer to drive high-quality, robust verification of system-level IP across unit, subsystem, and SoC levels. This role is ideal for someone passionate about ground-breaking hardware, sophisticated verification methodologies, and crafting the future of computing. Come join the team and see how you can make a lasting impact on the world. What You ll Be Doing: Play a key role in the Hardware Performance Monitor (HWPM) team, helping define and develop system-level RTL and performance measurement methodologies for NVIDIA s industry-leading SoCs and GPUs. Develop comprehensive test plans, implement tests, and apply robust verification strategies to validate microarchitecture and design functionality. Design and implement reusable, scalable testbenches and testbench components using System Verilog and UVM. Collaborate with architects, RTL designers, and software engineers to drive feature completeness, performance visibility, and verification closure. What we need to see: M. Tech. (or equivalent) in VLSI or Electronics Engineering with 2+ years of relevant industry experience OR B. Tech with 4+ years of experience in a similar domain Proven experience in unit, sub-system or SoC Level Verification Hands-on expertise in building and maintaining testbench environments for both unit and system-level verification Proficiency in Python or industry-standard scripting languages for automation and test development Strong debugging and analytical skills Familiarity with industry-standard design and verification tools like VCS, Xcelium, etc. Solid understanding of RTL Design Principles and Verilog Experience with UVM (Universal Verification Methodology) is a strong plus Excellent communication & collaboration skills, with ability to work effectively across cross-functional teams Widely considered to be one of the technology world s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. Also, we have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our outstanding engineering teams are growing fast. If you are creative, curious, and motivated with a real passion for technology, we want to hear from you! #LI-Hybrid

NVIDIA has been redefining computer graphics, PC Gaming, and accelerated computing for more than 25 years. It s a unique legacy of innovation that s motivated by phenomenal technology and outstanding people. Today, we are tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what s never been done before takes vision, innovation, and the world s best talent. As an NVIDIAN, you ll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. The HWPM Team at NVIDIA is seeking an excellent ASIC Verification Engineer to drive high-quality, robust verification of system-level IP across unit, subsystem, and SoC levels. This role is ideal for someone passionate about ground-breaking hardware, sophisticated verification methodologies, and crafting the future of computing. Come join the team and see how you can make a lasting impact on the world. What You ll Be Doing: Play a key role in the Hardware Performance Monitor (HWPM) team, helping define and develop system-level RTL and performance measurement methodologies for NVIDIA s industry-leading SoCs and GPUs. Develop comprehensive test plans, implement tests, and apply robust verification strategies to validate microarchitecture and design functionality. Design and implement reusable, scalable testbenches and testbench components using System Verilog and UVM. Collaborate with architects, RTL designers, and software engineers to drive feature completeness, performance visibility, and verification closure. What we need to see: M. Tech. (or equivalent) in VLSI or Electronics Engineering OR B. Tech with 2+ years of experience in a similar domain Hands-on experience in unit and/or system level verification Ability to contribute to testbench development and maintenance, preferably using System Verilog and standard methodologies Proficiency in Python or industry-standard scripting languages for automation and test development Proven debugging fundamentals ability to read waveforms, analyze logs, and isolate issues effectively Familiarity with industry-standard tools such as VCS, Xcelium, Verdi, or similar simulation/debug environments Good understanding of RTL design concepts and experience working with Verilog or SystemVerilog Experience with UVM (Universal Verification Methodology) is a strong plus Clear communication skills and collaborative attitude, with ability to work alongside design, DV, and automation teams Widely considered to be one of the technology world s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. Also, e have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our outstanding engineering teams are growing fast. If you are creative, curious, and motivated with a real passion for technology, we want to hear from you! #LI-Hybrid

We are seeking a highly experienced Senior Physical Design Engineer with 8+ years of experience in block-level and full-chip physical implementation. The candidate should be proficient in physical design flows and methodologies for advanced technology nodes. Key Responsibilities: Drive physical implementation from RTL to GDSII (floorplanning, placement, CTS, routing) Perform timing analysis, congestion analysis, and physical verification (DRC/LVS) Optimize for performance, power, and area (PPA) Collaborate closely with RTL, STA, DFT, and package teams Own signoff checks (IR drop, EM, Antenna, Crosstalk, etc.) Support tape-out and silicon validation activities Requirements: 8+ years of experience in physical design implementation and signoff Strong hands-on experience with tools like ICC2, Innovus, Primetime, RedHawk, Calibre Solid understanding of timing closure, IR/EM analysis, and power optimization Experience with advanced nodes (7nm, 5nm, etc.) is a plus Good scripting skills (TCL, Perl, Python) for automation Strong communication and teamwork skills

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers.Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLLAdditional responsibilities:logic (RTL) design, timing closure, CDC analysis etc.Understand and Design Power efficient logic.Agile project planning and execution.RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Minimum 8+ years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core Experience with VLSI Design in VHDL / Verilog

We are seeking highly motivated individuals with a BS, MS, or PhD degree in Computer Science, Computer Engineering/ECE, ready to handle the challenging problems in future technologies and designs. We are also looking for candidates with Strong C/C++background to lead our leading-edge algorithmswithin our EDA solutions to increase our design team’s productivity and chip quality and performance. Our dynamic global team is looking to enlist enthusiastic professionals to join world-class hardware design teams responsible for developing the most challenging and complex systems in the world. We are seeking energetic, highly motivated individuals willing to go the extra mile with the aim of helping the overall IBM development team. Strong interpersonal skills are needed to coordinate deliverables and requirements from several areas within and outside of the organization.There are many opportunities to gain and utilize a deep understanding of future issues and provide input towards decisions affecting system development, logical and physical design as well as sophisticated methodology directions. Individuals who are chosen to become a part of our world class development teams will be helping advance IBM’s leadership in developing the highest performing computers and changing hardware solutions. Do you want to be an IBMerCome THINK with us! Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4+ years of IT experience Strong C/C++programming skills in a Unix/Linux environment is a must. VLSI knowledge, Knowledge in front end linting tools and checkers and RTL Checkers. Great scripting skills – Perl / Python/Shell Proven problem-solving skills and the ability to work in a team environment are a must Preferred technical and professional experience RTL Lint Checkers , Front end verification flow, VLSI knowledge, VHDL/Verilog, computer architecture

We are seeking highly motivated individuals with a BS, MS, or PhD degree in Computer Science, Computer Engineering/ECE, ready to handle the challenging problems in future technologies and designs. We are also looking for candidates with Strong C/C++background to lead our leading-edge algorithmswithin our EDA solutions to increase our design team’s productivity and chip quality and performance. Our dynamic global team is looking to enlist enthusiastic professionals to join world-class hardware design teams responsible for developing the most challenging and complex systems in the world. We are seeking energetic, highly motivated individuals willing to go the extra mile with the aim of helping the overall IBM development team. Strong interpersonal skills are needed to coordinate deliverables and requirements from several areas within and outside of the organization.There are many opportunities to gain and utilize a deep understanding of future issues and provide input towards decisions affecting system development, logical and physical design as well as sophisticated methodology directions. Individuals who are chosen to become a part of our world class development teams will be helping advance IBM’s leadership in developing the highest performing computers and changing hardware solutions. Do you want to be an IBMerCome THINK with us! Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4+ years of IT experience Strong C/C++programming skills in a Unix/Linux environment is a must. VLSI knowledge, Knowledge in front end simulation tool development isadditional plus. Great scripting skills – Perl / Python/Shell Proven problem-solving skills and the ability to work in a team environment are a must Preferred technical and professional experience Simulation tool development, Front end verification , VLSI knowledge, VHDL/Verilog, computer architecture

Design and development of processor L2 , L3, Non cacheable units and LLC (Last Level Cache) for high-performance IBM Systems. - Design and architect L2 cache and LLC as driven by capacity, latency, bandwidth, and RAS requirements. - Develop the features, present the proposed architecture in the High level design discussions - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. . Required education Master's Degree Preferred education High School Diploma/GED Required technical and professional expertise 8 to 15 years of relevant experience - At least 1 generation of processor L2 cache or LLC design delivery leadership. - Expertise in cache coherence protocols for symmetric multiprocessors (SMP), covering both chip SMP and multi-socket SMP. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. - Experience in logical and physical design of caches including directories (tags, set associative memories), data SRAM, design for low latency, multiple parallel finite state machine design,

As a Formal verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Develop skills in IBM Formal verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 – 10 years of relevant industry experience Proven experience in Formal/Functional Verification - Demonstrated execution experience of verification of logic blocks verification. Knowledge of formal methodology, Knowledge of HDLs (Verilog, VHDL, SV), Good programming skills in python, processor core u-arch skills Exposure in developing testbench environment, debugging and triaging fails. Good communication skills and be able to work effectively in a global team environment. Drive verification coverage closure, lead verification team. Drive complex scenarios, participate in High level design discussions. Track record in leading teams. Preferred technical and professional experience Writing test plans, building random / exhaustive formal verification environment, functional and coverage analysis and debug. Good understanding of the Server System

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL/Test Pervassive Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise -8+ years of relevant experience - At least 1 generation of processor core/cache or LLC design delivery leadership. - Expertise in cache coherence protocols for symmetric multiprocessors (SMP), covering both chip SMP and multi-socket SMP. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. - Experience in logical and physical design of caches including directories (tags, set associative memories), data SRAM, design for low latency, multiple parallel finite state machine design, deadlock-free designs.