Jobs
Interviews

536 Vlsi Jobs - Page 12

Setup a job Alert
JobPe aggregates results for easy application access, but you actually apply on the job portal directly.

7.0 - 12.0 years

6 - 10 Lacs

Hyderabad, Pune, Bengaluru

Work from Office

Qualification : Bachelors in Computer Science / Electronics / Electrical Engineering Key Responsibilities: Collaborate with ASIC design teams to ensure DFT rules and coverage are metGenerate high-quality ATPG patterns for SAF/TDF using on-chip test compression Work on MBIST verification and repair using tools like Mentor Run ATPG & MBIST verification using unit delay and min/max corner simulations Deliver manufacturing test patterns for ATE in collaboration with product/test teamsSupport post-silicon debug and issue resolution Develop diagnostic tools for ATPG, MBIST, and ATE bring-upEnhance and maintain scripting for DFT flows Preferred Experience & Skills:Hands-on experience with Full Chip DFT and Silicon Validation Strong understanding of DFT concepts, ATPG coverage, yield enhancement, and silicon debug Proficient in Memory test & failure analysis Tool knowledge: ATPG TestKompress MBIST MentorETVerify Simulation VCS (preferred), ModelSim Scripting in Perl, Shell is a plus Comfortable working in international teams with strong communication skills Ability to multitask and work on high-priority designs in parallel Quick learner, adaptable to new tools and methodologies Location : Bangalore | Hyderabad | Cochin | Pune

Posted 1 month ago

Apply

8.0 - 10.0 years

14 - 16 Lacs

Bengaluru

Work from Office

Job Title: Principal Engineer, Quality Global Process Owner (GPO) for Technology Review Board (TRB) Summary of Role We are looking for a Global Process Owner (GPO) for TRB to join our team as part of the global QMS (Quality Management System). The successful candidate will be responsible to strategize, develop, implement, monitor, and improve Technology Development & Process Transfer related business process across the organization. This position is based at our GlobalFoundries office at Bengaluru, India. Responsibilities include: Own and manage TRB (Technology Review Board) business processes across the company Work with the technical leads, stakeholders and subject matter experts (SMEs) to develop and continually improve the Technology Development and Process Transfer specification Ensure consistent execution of the process across all business functions and geographies, including development of training and coaching of the employees Utilize quality methods and best practices into the identified areas of improvement to enhance the overall quality/scope, speed/schedule, and cost of projects and ensure flawless execution Proactively work with peers, SMEs, stakeholders and push to identify and agree on continual improvement plans Learn, develop, and execute quality assurance plans and strategies to ensure consistent adherence to quality standards Maintain and monitor changes to various international quality specifications (eg. AIAG, IATF, VDA, etc.) Analyze data to identify trends and opportunities for improvement, and work with business functions to implement corrective actions. Develop and deliver training programs to build a culture of quality and continuous improvement across the organization. Collaborate with cross-functional teams to ensure alignment of quality assurance initiatives with overall business objectives, meet compliance requirements and drive towards process excellence Act as a subject matter expert and advisor on quality assurance matters to business functions and senior management Develop and implement the business process into next-generation software using Siemens TC Collaborate and communicate process changes to stakeholders and leadership Required qualifications: Master s degree in engineering or science; PhD from a top ranked university is a plus 8-10 years of work experience in or across Semiconductor Process Technology, R&D or Process Transfer Projects, Module Engineering, VLSI/IP Design, Design Enablement (PDK, Modeling, etc.), Yield Engineering, Device Engineering, Reliability or related domains Fast learner, strong analytical and problem-solving skills, with the ability to analyze data and identify trends and opportunities for improvement. Excellent communication and interpersonal skills, with the ability to build strong relationships with business functions and stakeholders. Self-starter with the ability to work independently and as part of a team Language Fluency - English (Written & Verbal) This position requires global time-zone coverage and hence you may have to start the work late in the day, from 10AM to 8PM IST Additional preferred qualifications: Hands on experience on problem solving/troubleshooting skills Working knowledge of ISO9001:2015/IATF16949 Certified IATF/ISO/VDA Auditor is a plus Work experience with multi-national and cross functional environments Possess the right attitude to get results with a Growth Mindset If you are a results-driven individual with a passion for process excellence, we encourage you to apply for this exciting opportunity to join our team as an Audits Global Process Owner. GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in India will have to be fully vaccinated prior to their targeted start date. For new hires, the appointment is contingent upon the provision of a copy of their COVID-19 vaccination document, subject to any written request for medical or religious accommodation. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

Posted 1 month ago

Apply

2.0 - 7.0 years

14 - 19 Lacs

Bengaluru

Work from Office

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Company: Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Minimum Qualifications: Bachelor's degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 2+ years of experience with ASIC design and verification 2+ years of experience with low-power ASIC optimization Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.* Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Preferred Qualifications: Master's or PhD degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 3+ years of experience with advanced CPU/GPU architecture/microarchitecture design development 5+ years of experience with VLSI design and verification 5+ years of experience with low-power ASIC design techniques Experience with industry tools such as PrimeTime PX and Power Artist Experience with Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development Experience with GPU driver and compiler development Skills: C/C++ Programming Language, Scripting (Python/Perl), Assembly, Verilog/SystemVerilog, Design Verification

Posted 1 month ago

Apply

2.0 - 7.0 years

11 - 16 Lacs

Bengaluru

Work from Office

Job Area: Engineering Services Group, Engineering Services Group > Layout Engineer General Summary: Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues. Minimum Qualifications: Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 2+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. OR Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. OR High School diploma or equivalent and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. 2+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap). Qualcomm is a company of inventors seeking to revolutionize the CPU market in an age of new possibilities. Are you interested in joining Qualcomm’s high performance CPU team as an SRAM Mask Layout DesignerYou will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. As a Mask Layout Designer, you will develop block or macro level layouts and floorplans for high performance custom memories according to project requirements, specifications, and design schematics. Minimum qualifications 5+ years of experience and a high school diploma or equivalent OR 5+ years experience and BS in Electrical Engineering OR 3+ years experience and MS in Electrical Engineering Direct experience with custom SRAM layout Experience in industry standard custom design tools and flows. Knowledge of leading-edge FinFET and/or nanosheet processes (5nm or newer). Experience in Layout design of library cells, datapaths, memories in deep sub-micron technologies. Knowledge of all aspects of Layout floorplanning and hierarchical assembly. Knowledge of Cadence Virtuoso and Calibre LVS/DRC. Preferred qualifications Good understanding of device parasitics and reliability considerations during layout. Good understanding of critical circuits and layout styles. Ability to write Skill code for layout automation. Knowledge of improving EMIR in layout. Good communication skills to work with different teams to accurately describe issues and follow them through for completion. Roles and Responsibilities Design layout for custom memories and other digital circuits based on provided schematics. Read and interpret design rule manuals to create optimal and correct layout. Own the entire layout process from initial floorplanning to memory construction to physical verification. Use industry standard verification tools to validate LVS, DRC, ERC etc. Interpret the results from the verification suite and perform layout fixes as needed. Provide layout fixes as directed by the circuit design engineers. Work independently and execute memory layout with little supervision. Provide realistic schedules for layout completion. Provide insight into strategic decisions regarding memory layout and

Posted 1 month ago

Apply

5.0 - 10.0 years

10 - 14 Lacs

Hyderabad

Work from Office

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Are you ready to combine the fast-paced energy of an innovative startup with the resources and stability of a global tech leaderThis opportunity blends both worlds into one. Edge Impulse has joined forces with the Industrial Embedded IoT division of Qualcomm, and we are growing our team because Edge AI is an important part of Qualcomm’s diversification roadmap. Edge Impulse streamlines the creation of AI and machine learning models for edge hardware, allowing devices to make decisions and offer insight where data is gathered. Powerful automations make it easier to build valuable datasets and develop advanced AI for edge devices from MCUs to CPUs to GPUs. The ease of use and versatility that Edge Impulse provides supports customers launching AI-empowered devices globally to solve the planet's biggest problems with novel high-tech solutions. Used by health and wearable organizations, industrial organizations, as well as top silicon vendors, Edge Impulse has become the trusted ML platform for enterprises and developers alike. As a Developer Relations Engineer at Edge Impulse, you will play a pivotal role in engaging, educating, and supporting the developer community. The primary focus is to drive awareness and adoption of Edge Impulse’s edge AI technology through a combination of technical content, community engagement, and hands-on development. This role bridges the engineering team and the broader developer community. Empower developers to build, optimize, and deploy edge AI models effectively with our platform. This role offers immense potential for growth, learning, and impact within a collaborative and inclusive team. Primary Responsibilities Responsibilities span multiple domains – from Community Engagement to Content Creation and Developer Advocacy – it takes creativity, resilience, and willingness to learn Grow and nurture the Edge Impulse developer user base through the creation and maintenance of external technical documentation content of the Edge Impulse platform and features Create and present workshops, videos, webinars, demos for engineering conferences and developer events to represent Edge Impulse to the wider developer community and grow user engagement. Preferred Skills and Experience A minimum of 5 years in Developer Relations, Developer Advocacy, or a similar role, with a focus on AI and IoT solutions A minimum of 5 years of relevant experience in technical writing Proven professional experience in public speaking to technical audiences Excellent communication and presentation skills to explain complex technical concepts to diverse audiences Clear track record with community engagement such as managing user forums, handling technical questions from other developers, and running developer-focused workshops Proficiency in languages commonly used in ML and edge AI (e.g., Python, C++) and familiarity with ML workflows and deployment. Experience with LLMs and VLMs is a plus Experience creating technical content, including blog posts, tutorials, videos, and documentation Demonstrated ability to build and nurture developer communities, both online and offline Some experience with video production and exposure to social media best practices, usage of various social channels, and presence on key channels Fluency in a second or third language is highly valued Academic Credentials Master’s degree in engineering, computer science, or other relevant field preferred Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc.

Posted 1 month ago

Apply

2.0 - 7.0 years

15 - 20 Lacs

Bengaluru

Work from Office

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Minimum Qualifications: Bachelor's degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 2+ years of experience with ASIC design and verification 2+ years of experience with low-power ASIC optimization Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.* Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Preferred Qualifications: Master's or PhD degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 3+ years of experience with advanced CPU/GPU architecture/microarchitecture design development 5+ years of experience with VLSI design and verification 5+ years of experience with low-power ASIC design techniques Experience with industry tools such as PrimeTime PX and Power Artist Experience with Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development Experience with GPU driver and compiler development Skills: C/C++ Programming Language, Scripting (Python/Perl), Assembly, Verilog/SystemVerilog, Design Verification

Posted 1 month ago

Apply

3.0 - 8.0 years

12 - 17 Lacs

Bengaluru

Work from Office

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. As a digital ASIC R&D Engineer, you will play a vital role in addressing challenges with Performance, Power, and Area (PPA) scaling tradeoffs to qualify technology entitlement of advance process nodes. You will be responsible for research and develop methods to improve efficiency of digital design, power and chip quality/yield. The job scope includes design automation, Design-Device/process Interaction Analysis, post-silicon yield debug and data mining. Required Skills Coding with Python, Perl, TCL and/or C Strong fundamental and working knowledge of SPICE, Parametric Testing Basic fundamental of Post Si Bring Up/Wafer Probing and System Level Testing Strong fundamentals in CMOS Device Physics, Process Engineering & Digital Design Working knowledge of digital VLSI implementation (netlist to GDS) with expertise in STA Expected Experience 1 –3 years of relevant industry experience

Posted 1 month ago

Apply

1.0 - 3.0 years

13 - 18 Lacs

Bengaluru

Work from Office

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking VLSI Digital Design Engineers to lead IP development for the latest WiFi standards. Our WLAN PHY team, comprised of highly passionate and seasoned domain experts, prides itself on years of experience in taking WLAN PHY designs from concept to silicon independently. WLAN PHY team is responsible for delivering the end-to-end Tx/Rx DSP chains – all the way from antenna samples post ADC to raw bits for upper layers and on the reverse path from raw bits to DAC. The team specializes in working with challenges of practical high-speed wireless communication systems and finding innovative solutions to counter them. The team works extensively on typical signal processing functions like filters, matrix transformations (e.g.QR, Cholesky decomposition), channel estimation, equalization (MMSE, MRC, ML), decoders/encoders (e.g.LDPC, Viterbi) , demodulators, FFT etc. on a day-to-day basis, and contributes to the development/ enhancement/ evaluation of signal processing algorithms to cater to new requirements. We are looking for someone as passionate as us and takes pride in their work. WiFi's ubiquity in modern times is undeniable, and the IEEE 802.11 Working Group is continually developing new standards to satisfy the growing demand for high throughput and low-latency real-time applications, such as VR and AR. Qualcomm is at the forefront of the WiFi revolution, aiming to become the global leader in WiFi chip solutions. The WLAN PHY team in Bangalore is instrumental in realizing this vision. : Looking for a candidate with 1 to 3 years of hands-on experience in micro-architecting and developing complex IPs. Expertise in digital design, VLSI concepts, and experience in creating power/area-efficient IPs across multiple clock domains are essential. Proficiency in RTL coding and familiarity with RTL QA flows such as PLDRC, CDC, and CLP (optional) is expected. Candidates should be capable of proposing design alternatives to meet area/power/performance specifications and presenting these options for review. Experience in leading, guiding, or managing junior team members is advantageous. Repeated success in taking IP designs from requirements to silicon is required. While not mandatory, having developed IPs for wireless technologies (WLAN, LTE, NR, BT, UWB, etc.) or past HLS experience would be beneficial. Skills: Must have: Proficient in Verilog RTL coding, uArch, CDC check, PLDRC, Timing constraints, Python/Perl. Experience in design/debugging complex data-path/control-path IPs. Good communication, analytical & leadership skills. Good to have: System Verilog, Visio, Knowledge of signal processing concepts/algorithms and Wi-Fi standards (802.11a/b/g/n/ac/ax), experience with HLS. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Posted 1 month ago

Apply

6.0 - 11.0 years

15 - 20 Lacs

Bengaluru

Work from Office

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Excellent Design verification domain expertise. Develop test strategy, TB architecture and test plan for new IP’s/new features Develop strategies for re-useable, scalable and enhance Sub system level verification environment Excellent C/System Verilog/Verilog skills to handle C based TB environment Strong skills in debug, post silicon debug-failure re-creation and root cause analysis Scripting proficiency - PERL, Python, for developing applicable automation AMBA, AXI bus protocols Power intent verification, GLS etc. Capable of communicating effectively with all stakeholders across the globe Capable of seeding a new team for new IPs, able to hire and expand the team in expertise and efficiency Capable of mentoring the team members for their career growth, maintaining diversity in the team, collaborating with other leads and managing multiple parallel projects Take initiatives to enable various ideas for improving efficiencies. Good to have Image Processing, DSI/DP/HDMI Protocols Good knowledge of new methodologies, flows and tools to be incorporated. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Posted 1 month ago

Apply

8.0 - 10.0 years

25 - 30 Lacs

Bengaluru

Work from Office

Job Title: Principal Engineer, Quality Global Process Owner (GPO) for Technology Review Board (TRB) Summary of Role We are looking for a Global Process Owner (GPO) for TRB to join our team as part of the global QMS (Quality Management System). The successful candidate will be responsible to strategize, develop, implement, monitor, and improve Technology Development & Process Transfer related business process across the organization. This position is based at our GlobalFoundries office at Bengaluru, India. Responsibilities include: Own and manage TRB (Technology Review Board) business processes across the company Work with the technical leads, stakeholders and subject matter experts (SMEs) to develop and continually improve the Technology Development and Process Transfer specification Ensure consistent execution of the process across all business functions and geographies, including development of training and coaching of the employees Utilize quality methods and best practices into the identified areas of improvement to enhance the overall quality/scope, speed/schedule, and cost of projects and ensure flawless execution Proactively work with peers, SMEs, stakeholders and push to identify and agree on continual improvement plans Learn, develop, and execute quality assurance plans and strategies to ensure consistent adherence to quality standards Maintain and monitor changes to various international quality specifications (eg. AIAG, IATF, VDA, etc.) Analyze data to identify trends and opportunities for improvement, and work with business functions to implement corrective actions. Develop and deliver training programs to build a culture of quality and continuous improvement across the organization. Collaborate with cross-functional teams to ensure alignment of quality assurance initiatives with overall business objectives, meet compliance requirements and drive towards process excellence Act as a subject matter expert and advisor on quality assurance matters to business functions and senior management Develop and implement the business process into next-generation software using Siemens TC Collaborate and communicate process changes to stakeholders and leadership Required qualifications: Master s degree in engineering or science; PhD from a top ranked university is a plus 8-10 years of work experience in or across Semiconductor Process Technology, R&D or Process Transfer Projects, Module Engineering, VLSI/IP Design, Design Enablement (PDK, Modeling, etc.), Yield Engineering, Device Engineering, Reliability or related domains Fast learner, strong analytical and problem-solving skills, with the ability to analyze data and identify trends and opportunities for improvement. Excellent communication and interpersonal skills, with the ability to build strong relationships with business functions and stakeholders. Self-starter with the ability to work independently and as part of a team Language Fluency - English (Written & Verbal) This position requires global time-zone coverage and hence you may have to start the work late in the day, from 10AM to 8PM IST Additional preferred qualifications: Hands on experience on problem solving/troubleshooting skills Working knowledge of ISO9001:2015/IATF16949 Certified IATF/ISO/VDA Auditor is a plus Work experience with multi-national and cross functional environments Possess the right attitude to get results with a Growth Mindset If you are a results-driven individual with a passion for process excellence, we encourage you to apply for this exciting opportunity to join our team as an Audits Global Process Owner. GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in India will have to be fully vaccinated prior to their targeted start date. For new hires, the appointment is contingent upon the provision of a copy of their COVID-19 vaccination document, subject to any written request for medical or religious accommodation.

Posted 1 month ago

Apply

8.0 - 12.0 years

15 - 30 Lacs

Bengaluru

Work from Office

We Are Hiring: Principal Engineers Chip Design (Back End / Front End / Analog IP/IC) Preferred Skills and Experience: Minimum 1+ years of experience in Project Management (Waterfall and Agile Hybrid methodology) Exposure to continuous improvement and cross-functional collaboration Educational Qualifications: Master's degree in VLSI Design from reputed institutes (IITs/NITs preferred) Bachelor's in Electronics and Communication or a related field 1. Job Title: Principal Engineer – Chip Design Back End Required Skills & Experience: Minimum 8+ years of strong experience in backend flows for MCU or low-power SoC designs Leadership experience with DFT, Physical Design, and Formal Verification teams Exposure to Frontend and Analog design processes Ability to collaborate effectively across functional teams Experience in product support during both pre- and post-production stages (including RMA support) 2. Job Title: Principal Engineer – Chip Design Front End Required Skills & Experience: Minimum 8+ years of experience in system architecture for ARM-based MCU product development Expertise in RTL design, RTL coding, and RTL integration Strong debugging and design capabilities Experience leading verification teams, including static and dynamic verification, test management (UPF, GLN, Test Modes) Familiarity with industry-standard EDA tools (e.g., Synopsys for LINT, CDC, SDC validation, and power analysis) Exposure to Backend and Analog design processes Cross-functional collaboration with PD, DFT, and STA teams for timing and power closure Experience in pre- and post-production product support and RMA handling 3. Job Title: Principal Engineer – Analog IP/IC Design Required Skills & Experience: Minimum 8+ years of experience in custom analog/mixed-signal IC design Proficiency in variation-aware design, verification planning, and analog layout parasitic extraction (LPE) Hands-on experience with analog/mixed-signal EDA tools (e.g., Cadence, Synopsys) Strong debugging and design validation skills Product support experience across development lifecycle, including RMA stage

Posted 1 month ago

Apply

12.0 - 15.0 years

9 - 17 Lacs

Bengaluru, Karnataka, India

On-site

In your new role you will: Responsible for SoC DFT Architecture definition / implementation / verification / silicon debug of SoC/Full Chip. Need to implement Scan insertion, LPCT, LBIST, Hybrid-TK, Compression Logic and DRC analysis of implemented Testability logic structures. Responsible for ATPG, DRC analysis, Test coverage debug , Memory BIST implementation and verification. Owner ship of JTAG/BSCAN/iJTAG, P1500 implementation and verification, Stuck-at / TDF / Bridging / Cell-aware / iddq fault models. Good debug skills in ZERO delay and SDF based scan/MBIST/JTAG simulations. Hands on experience in analysis and debug of above-mentioned test domains. Hands of experience in post silicon debug of scan/MBIST patterns/yield fall out You are best equipped for this task if you have: ASIC flow understanding. Experienced in LEC, CLP, power analysis flow is preferred The ability to work as an individual and as part of a team to deliver complex SoCs starting from the creation of the DFT spec, implementation, verification, and Post silicon debug. In addition, be self-motivated with the initiative to seek constant improvements in the DFT design methodologies . The candidate must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment. Scripting skills such as PERL/TCL/Python are preferred Degree & Discipline: BE/B.Tech Electrical/Electronic or ME/M Tech in VLSI design. Experience in Industry: 12+ years of in DFT implementation, verification and post silicon debug areas

Posted 1 month ago

Apply

20.0 - 25.0 years

15 - 30 Lacs

Greater Noida

Work from Office

Experience Required: Minimum 20 Years Educational Background: Engineering (Not pure sciences); One degree from an international university preferred Role Summary: We are seeking a visionary and experienced academic leader to serve as Dean School of Engineering & Sciences (SES). The ideal candidate will have extensive academic and administrative experience within a university ecosystem and a strong specialization in cutting-edge domains such as Robotics or VLSI (Very Large-Scale Integration). The Dean will be responsible for shaping academic policy, leading the faculty, enhancing research outputs, and elevating the schools national and global reputation. Key Responsibilities: Academic Leadership: o Drive the strategic vision of the School of Engineering & Sciences in line with the Universitys mission. o Ensure delivery of high-quality education and curriculum development in Robotics, VLSI, and related disciplines. Faculty Development & Governance: o Recruit, mentor, and retain high-quality faculty. o Foster a culture of teaching excellence, innovation, and continuous improvement. Research & Innovation: o Promote funded research projects, industry collaboration, and publication in high-impact journals. o Encourage interdisciplinary and international research initiatives. Industry Collaboration & Partnerships: o Build strong linkages with industry leaders and global institutions. o Guide students and faculty in internships, consultancies, MoUs, and technology transfer projects. Student Success: o Ensure superior academic outcomes and holistic development of students. o Support placement activities, career guidance, and entrepreneurial ventures. Compliance & Quality Assurance: o Ensure adherence to regulatory requirements (NAAC, NBA, AICTE, UGC). o Drive the accreditation and ranking initiatives. Ideal Candidate Profile: Minimum 20 years of relevant academic experience, including at least 5 years in a leadership capacity (Dean/HoD/Director). Must hold an Engineering degree background (B.Tech/B.E. and higher), with no pure science specialization. One degree from an international university is highly preferred. Strong expertise and academic output in Robotics, VLSI, Embedded Systems, or related disciplines. Demonstrated ability to lead large teams, manage academic operations, and drive institutional growth. Prior experience in autonomous/private/deemed universities is essential. Preferred candidates: South Indian or Maharashtrian background, with strong cultural alignment and academic depth. Key Competencies: Visionary leadership with strong decision-making abilities Academic and research excellence People management and conflict resolution Cross-functional collaboration and communication skills Strategic planning, budgeting, and execution Skills : - Dean School of Engineering Dean Engineering & Sciences Dean Robotics / VLSI Engineering School Dean Academic Head Engineering Dean University Engineering Department On-campus faculty job in Greater Noida20+ years academic experience Dean / Director level Academic leadership role University administration Senior leadership in higher educationEngineering background only (B.Tech / M.Tech / Ph.D) Robotics VLSI (Very Large-Scale Integration) Embedded Systems AICTE / UGC / NBA / NAAC compliance Interdisciplinary engineering Research leadership Funded research projects International academic partnerships Industry collaboration in education Technology transfer High-impact journal publications Global education exposure South Indian / Maharashtrian academic leaders Deemed university experience Culturally aligned academic professionals International university degree preferredVisionary academic leadership Strategic planning & execution People management Cross-functional coordination Decision-making in academia Student success & placement support

Posted 1 month ago

Apply

2.0 - 7.0 years

2 - 6 Lacs

Bengaluru

Work from Office

Job Title: Embedded & VLSI Recruiter Location: Marathahalli, Bangalore (Work From Office 5 Days a Week) Experience: Minimum 3 Years Job Type: Full-Time | On-Site | Immediate Joiners Interview Mode: Face-to-Face (F2F) Job Description: We are looking for a passionate and experienced Embedded & VLSI Recruiter to join our dynamic talent acquisition team. The ideal candidate will have a strong background in hiring for niche technologies in Embedded Systems and VLSI domains, especially through Contract-to-Hire (C2H) models for product-based clients. Roles and Responsibilities: Handle end-to-end recruitment for Embedded Systems and VLSI requirements Manage Contract-to-Hire (C2H) hiring with precision and compliance Source, screen, and shortlist profiles using portals, LinkedIn, referrals, and Boolean/X-Ray searches Interact and coordinate with hiring managers and technical teams for scheduling and feedback Build strong pipelines and talent pools for niche Embedded/VLSI skill sets Maintain and update candidate databases and ATS Ensure quick turnarounds and a high quality of hires Coordinate and manage F2F interviews at the client location Required Skills: Minimum 3 years of experience in technical recruitment Strong exposure to Embedded and VLSI domain hiring Contract hiring (C2H) experience is mandatory Experience working with product-based clients Good understanding of sourcing tools, LinkedIn, and Boolean search Excellent verbal and written communication skills Highly organized and deadline-driven Nice to Have: Familiarity with ATS tools like Ceipal , JobDiva , etc. Knowledge of basic technical terms in Embedded/VLSI space Ability to work in a high-paced, dynamic environment Interested candidates can share their resumes at durgabhavani.b@acesoftlabs.com Quick Connect on WhatsApp: 9701923036

Posted 1 month ago

Apply

5.0 - 8.0 years

8 - 12 Lacs

Bengaluru

Work from Office

Physical Deisgn Lea LocationBangalore / Hyderabad / Pune Experience - 8+ YoE In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Should have experienceon Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. Should have experience on programming in Tcl/Tk/Perl. Must have hands-on experience on Synopsys/Cadence tools. (Innovus, ICC2, Primetime, PT-PX, Calibre). Well versed with timing constraints, STA and timing closure. Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes. Should have experience on programming in Tcl/Tk/Perl Well versed with timing constraints, STA and timing closure. Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify and evaluate the VLSI components and hardware systems b. Determine architecture and logic design verification through software developed for component and system simulation c. Analyze designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions d. Conduct system evaluations and make appropriate recommendations to modify designs or repair equipment as needed e. Allocates modules for testing and verification and reviews data and project documentation f. Provides guidance on technical escalations and review regression testing data g. Prepares documentation containing information such as test case and product scripts for IP and publishes it to the client for feedback and review h. Ensures all project documentation is complete and uploaded as per technical specifications required by the client 2. Provide customer support & governance of VLSI components & hardware systems a. Identify and recommend system improvements to improve technical performance b. Inspect VLSI components & hardware systems to ensure compliance with all applicable regulations and safety standards c. Be the first point of contact to provide technical support to client and help debug specific, difficult in-service engineering problems d. Evaluate operational systems, prototypes and proposals and recommend repair or design modifications based on factors such as environment, service, cost, and system capabilities 3. Team Management a. Resourcing i. Forecast talent requirements as per the current and future business needs ii. Hire adequate and right resources for the team iii. Train direct reportees to make right recruitment and selection decisions b. Talent Management i. Ensure 100% compliance to Wipros standards of adequate onboarding and training for team members to enhance capability & effectiveness ii. Build an internal talent pool of HiPos and ensure their career progression within the organization iii. Promote diversity in leadership positions c. Performance Management i. Set goals for direct reportees, conduct timely performance reviews and appraisals, and give constructive feedback to direct reports. ii. Incase of performance issues, take necessary action with zero tolerance for will based performance issues iii. Ensure that organizational programs like Performance Nxt are well understood and that the team is taking the opportunities presented by such programs to their and their levels below d. Employee Satisfaction and Engagement i. Lead and drive engagement initiatives for the team ii. Track team satisfaction scores and identify initiatives to build engagement within the team iii. Proactively challenge the team with larger and enriching projects/ initiatives for the organization or team iv. Exercise employee recognition and appreciation Deliver No. Performance Parameter Measure 1. Verification Timeliness, Quality and coverage of verification, Compliance to UVM standards, Customer responsiveness 2. Project documentation and MIS 100% on time MIS & report generation Complete Project documentation (including scripts and test cases) 3. Team % trained on new skills, Team attrition %, Employee satisfaction score (ESAT) Mandatory Skills: VLSI Physical Place and Route. Experience5-8 Years.

Posted 1 month ago

Apply

3.0 - 8.0 years

3 - 14 Lacs

Bengaluru

Work from Office

Responsibilities: * Collaborate with cross-functional teams on ARM processor integration. * Design, verify & debug VLSI systems using SV, UVM & GLS. * Implement IP/Sub-System/SOC architecture with APB, AXI & AHB protocols. Health insurance Provident fund

Posted 1 month ago

Apply

2.0 - 3.0 years

20 - 25 Lacs

Bengaluru

Work from Office

Summary / Role Purpose As a Product Specialist II , you will be part of the team responsible for overall development and validation of Ansys EDA Products. This involves working with Software developers, Architects, Application Engineers, and Semiconductor Customers, from ideation all the way to final product release and deployment. Key focus areas will include all areas related to IP/SoC/3DIC Power Integrity, Signal Integrity, Reliability aspects like EM/ESD/Thermal, Advanced timing/jitter, Packaging - the top challenges for any chip design on advanced nodes like 7/5/3 nm. Key Duties and Responsibilities Be part of Product Engineering Team that Works with Global-Customers / IP-providers / Foundries to understand design challenges of cutting-edge SoCs & 3DICs on 7/5/3 nm and creates EDA product specifications. Works with Software developers to develop state-of-the-art EDA products solving Power-Noise-Reliability challenges across Chip-Package-System Works on Ansys-Seascape platform - Semiconductor Industry s First and Only True Big-Data design Platform! Performs in-depth validation to ensure Product meets accuracy and other requirements. Collaborates with Application Engineers to support Global Customers in solving their design challenges on leading edge SoCs. Minimum Education/Certification Requirements and Experience Bachelor s/Master s degree in Electronics Engineering/VLSI from Top Institutions (NITs/IITs and likes) Strong problem-solving skills Good programming skills Excellent verbal and written communication skills Preferred Qualifications and Skills Passion to learn and deploy new technologies. Ability for minimal travel 2-3 years of prior experience in either of a) ASIC Physical design, b) Power-Integrity / Signal-Integrity / Reliability Closure c) Custom circuit design and simulation At Ansys, we know that changing the world takes vision, skill, and each other. We fuel new ideas, build relationships, and help each other realize our greatest potential. We are ONE Ansys. We operate on three key components: our commitments to stakeholders, our values that guide how we work together, and our actions to deliver results. As ONE Ansys, we are powering innovation that drives human advancement Our Commitments: Amaze with innovative products and solutions Make our customers incredibly successful Act with integrity Ensure employees thrive and shareholders prosper Our Values: Adaptability: Be open, welcome what s next Courage: Be courageous, move forward passionately Generosity: Be generous, share, listen, serve Authenticity: Be you, make us stronger Our Actions: We commit to audacious goals We work seamlessly as a team We demonstrate mastery We deliver outstanding results

Posted 1 month ago

Apply

7.0 - 12.0 years

25 - 30 Lacs

Bengaluru

Work from Office

Job Description. Arm’s CE-Systems DFT team implements DFT for test chips and hard macros to prove out Arm soft IP power, performance, area, and functionality within the context of an SoC using the latest DFT and process technologies. The DFT team works closely with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE.. Responsibilities. Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation.. Required Skills And Experience. This role is for a Senior Principal DFT Engineer with 15+ years of experience in Design for Test. Experience coding Verilog RTL, TCL and/or Perl. Proficient in Unix/Linux environments. Core DFT skills considered for this position should include some of the following Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics. Bachelors or Master’s degree or equivalent experience in Electronic Engineering, Computer Engineering, or a related field. “Nice To Have” Skills and Experience. Familiarity with IEEE 1149, 1500, 1687, 1838. Synthesis & Static Timing Analysis. Familiarity with SoC style architectures including multi-clock domain and low power design practices.. Validated understanding of Siemens DFT tools. Familiarity with Arm IP like the following Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug. Experience with 2.5D and 3D test. Ability to work both collaboratively on a team and independently. Hard-working and excellent time management skills with an ability to multi-task. An upbeat demeanor to working on exciting projects on the cutting edge of technology. Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools. In Return. We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding!. Partner and customer focus. Teamwork and communication. Creativity and innovation. Team and personal development. Impact and influence. Deliver on your promises. Accommodations at Arm. At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.. Hybrid Working at Arm. Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.. Equal Opportunities at Arm. Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.. Show more Show less

Posted 1 month ago

Apply

2.0 - 3.0 years

4 - 5 Lacs

Bengaluru

Work from Office

Requisition #: 16978 Our Mission: Powering Innovation That Drives Human Advancement When visionary companies need to know how their world-changing ideas will perform, they close the gap between design and reality with Ansys simulation. For more than 50 years, Ansys software has enabled innovators across industries to push boundaries by using the predictive power of simulation. From sustainable transportation to advanced semiconductors, from satellite systems to life-saving medical devices, the next great leaps in human advancement will be powered by Ansys. Innovate With Ansys, Power Your Career. Summary / Role Purpose As a Product Specialist II , you will be part of the team responsible for overall development and validation of Ansys EDA Products. This involves working with Software developers, Architects, Application Engineers, and Semiconductor Customers, from ideation all the way to final product release and deployment. Key focus areas will include all areas related to IP/SoC/3DIC Power Integrity, Signal Integrity, Reliability aspects like EM/ESD/Thermal, Advanced timing/jitter, Packaging - the top challenges for any chip design on advanced nodes like 7/5/3 nm. Key Duties and Responsibilities Be part of Product Engineering Team that Works with Global-Customers / IP-providers / Foundries to understand design challenges of cutting-edge SoCs & 3DICs on 7/5/3 nm and creates EDA product specifications. Works with Software developers to develop state-of-the-art EDA products solving Power-Noise-Reliability challenges across Chip-Package-System Works on Ansys-Seascape platform - Semiconductor Industry s First and Only True Big-Data design Platform! Performs in-depth validation to ensure Product meets accuracy and other requirements. Collaborates with Application Engineers to support Global Customers in solving their design challenges on leading edge SoCs. Minimum Education/Certification Requirements and Experience Bachelor s/Master s degree in Electronics Engineering/VLSI from Top Institutions (NITs/IITs and likes) Strong problem-solving skills Good programming skills Excellent verbal and written communication skills Preferred Qualifications and Skills Passion to learn and deploy new technologies. Ability for minimal travel 2-3 years of prior experience in either of a) ASIC Physical design, b) Power-Integrity / Signal-Integrity / Reliability Closure c) Custom circuit design and simulation At Ansys, we know that changing the world takes vision, skill, and each other. We fuel new ideas, build relationships, and help each other realize our greatest potential. We are ONE Ansys. We operate on three key components: our commitments to stakeholders, our values that guide how we work together, and our actions to deliver results. As ONE Ansys, we are powering innovation that drives human advancement Our Commitments: Amaze with innovative products and solutions Make our customers incredibly successful Act with integrity Ensure employees thrive and shareholders prosper Our Values: Adaptability: Be open, welcome what s next Courage: Be courageous, move forward passionately Generosity: Be generous, share, listen, serve Authenticity: Be you, make us stronger Our Actions: We commit to audacious goals We work seamlessly as a team We demonstrate mastery We deliver outstanding results VALUES IN ACTION Ansys is committed to powering the people who power human advancement. We believe in creating and nurturing a workplace that supports and welcomes people of all backgrounds; encouraging them to bring their talents and experience to a workplace where they are valued and can thrive. Our culture is grounded in our four core values of adaptability, courage, generosity, and authenticity. Through our behaviors and actions, these values foster higher team performance and greater innovation for our customers. We re proud to offer programs, available to all employees, to further impact innovation and business outcomes, such as employee networks and learning communities that inform solutions for our globally minded customer base. WELCOME WHAT S NEXT IN YOUR CAREER AT ANSYS At Ansys, you will find yourself among the sharpest minds and most visionary leaders across the globe. Collectively, we strive to change the world with innovative technology and transformational solutions. With a prestigious reputation in working with well-known, world-class companies, standards at Ansys are high met by those willing to rise to the occasion and meet those challenges head on. Our team is passionate about pushing the limits of world-class simulation technology, empowering our customers to turn their design concepts into successful, innovative products faster and at a lower cost. Ready to feel inspired? Check out some of our recent customer stories, here and here . At Ansys, it s about the learning, the discovery, and the collaboration. It s about the what s next as much as the mission accomplished. And it s about the melding of disciplined intellect with strategic direction and results that have, can, and do impact real people in real ways. All this is forged within a working environment built on respect, autonomy, and ethics. CREATING A PLACE WE RE PROUD TO BE Ansys is an S&P 500 company and a member of the NASDAQ-100. We are proud to have been recognized for the following more recent awards, although our list goes on: Newsweek s Most Loved Workplace globally and in the U.S., Gold Stevie Award Winner, America s Most Responsible Companies, Fast Company World Changing Ideas, Great Place to Work Certified (China, Greece, France, India, Japan, Korea, Spain, Sweden, Taiwan, and U.K.). For more information, please visit us at www.ansys.com Ansys is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, and other protected characteristics. Ansys does not accept unsolicited referrals for vacancies, and any unsolicited referral will become the property of Ansys. Upon hire, no fee will be owed to the agency, person, or entity.

Posted 1 month ago

Apply

4.0 - 8.0 years

10 - 14 Lacs

Bengaluru

Work from Office

Minimum qualifications:. Bachelor’s degree in Electrical Engineering or Computer Engineering, or equivalent practical experience.. 15 years of experience in ASIC RTL design.. Experience with RTL design using Verilog/System Verilog and microarchitecture.. Experience with ARM-based SoCs, interconnects and ASIC methodology.. Preferred qualifications:. Master’s degree in Electrical Engineering or Computer Engineering.. Experience driving multi-generational roadmap for IP development.. Experience leading interconnect IP design team for low power SoCs.. About The Job. Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.. Responsibilities. Lead a team of people to deliver fabric interconnect design.. Develop and refine RTL design to aim power, performance, area, and timing goals.. Define details such as interface protocol, block diagram, data flow, pipelines, etc.. Oversee RTL development, debug functional/performance simulations.. Communicate and work with multi-disciplined and multi-site teams.. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .. Show more Show less

Posted 1 month ago

Apply

2.0 - 5.0 years

8 - 12 Lacs

Bengaluru

Work from Office

Minimum qualifications:. Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.. 5 years of experience in High Bandwidth Memory/Double Data Rate (HBM/DDR).. Experience in silicon bringup, functional validation, characterizing, and qualification.. Experience with board schematics, layout, and debug methodologies with using lab equipment.. Preferred qualifications:. Experience in hardware emulation with hardware/software integration.. Experience in coding (e.g., Python) for automation development.. Experience in Register-Transfer Level (RTL) design, verification or emulation.. Knowledge of SoC architecture including boot flows.. Knowledge of HBM/DDR standards.. About the jobIn this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.. In this role, you will be responsible for post-silicon validation of the Cloud Tensor Processing Unit (TPU) projects. You will create test plans and test content for exercising the various subsystems in the Artificial Intelligence/Machine Learning (AI/ML) System on a Chip (SoC), verify the content on pre-silicon platforms, execute the tests on post-silicon platforms, and triage and debug issues. You will work with engineers from architecture, design, design verification, and software/firmware teams. You will be validating the functional, power, performance, and electrical characteristics of the Cloud Tensor Processing Unit (TPU) silicon to help deliver high-quality designs for next generation data center accelerators.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.. We prioritize security, efficiency, and reliability across everything we do from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.. Responsibilities. Develop and execute tests for memory controller High Bandwidth Memory (HBM) post-silicon validation and on hardware emulators and assist in bring-up processes from prototyping through post-silicon validation.. Drive debugging and investigation efforts to root-cause, cross-functional issues. This includes pre-silicon prototyping platforms as well as post-silicon bringup and production.. Ensure validation provides necessary functional coverage for skilled design.. Help operate and maintain our hardware emulation platform for pre-silicon integration and validation.. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .. Show more Show less

Posted 1 month ago

Apply

1.0 - 3.0 years

6 - 9 Lacs

Bengaluru

Work from Office

Join our team and unlock your potential in the world of Semiconductor. We are looking for #TrainedFresher and. #internship in #analogLayout. Preferred Qualifications:. Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage. Hands-on knowledge of state-of-the-art analog design flows and knowledge of ADC, DACs is a plus. Good publication and patent record. Dedication and the ability to work within a very dynamic interdisciplinary environment. Ability to communicate as well as work efficiently in an international multi-disciplinary environment.. Exceptional spoken and written Proficiency in English. Strong analytical and problem-solving skills.. Percentage : min 70%,. internship completed engineers with hands on exp on layout will be preferred. #Intern and #trained candidates only considerable.. Explore exciting career opportunities at www.Digicommsemi.com. Show more Show less

Posted 1 month ago

Apply

0.0 years

0 Lacs

Puducherry, Chennai

Work from Office

SIGNIFICANCE OF THE ROLE: We are looking for ambitious publishing professionals to join a growing team supporting the peer review process. We seek highly motivated applicants who enjoy keeping up to date with the latest in medical research, are detail-oriented, have great customer service skills and enjoy working as part a team. As Reviewer Selection Editor you will be accountable for efficient peer review administration procedures using Scholar One ManuscriptsTM, using tools such as PubMed Central to research international experts suitable to act as peer reviewers for cutting edge medical research. Reporting to the Reviewer Selection Lead, the successful candidates will join a team of Reviewer Selection Editors. WHAT WE ARE LOOKING FOR: A postgraduate qualification in Computer Science, Electrical and Electronics. Knowledge and understanding of the process of journals peer review process. An interest and awareness in academic publishing, and an up to date knowledge of market trends. A strong command of English spelling and grammar. Knowledge and experience of process-driven workflows. Experience of working in a customer-facing role. • Ability to be detail-oriented, accurate, and a problem-solver. • Excellent organization skills and confidence in completing multiple tasks to deadlines. • Effective communication and interpersonal skills and a desire to provide to excellent customer service. • The ability to recognize process improvement opportunities. • Good persuasion and influencing skills, showing empathy for others viewpoints. • Have flexibility to adjust to change in works plans or assignments. • Familiarity with Microsoft Office software. WHAT YOU WILL BE DOING: • Managing the peer review process to agreed speed and quality targets for journals. • Using internal and external databases to research and select appropriate reviewers. • Staying up to date with internal and external guidelines on ethical publication practices. • Corresponding with reviewers regarding deadlines and standard queries. • Conducting data analysis, recognizing process improvement opportunities and making recommendations. • Maintaining accurate records and updating content management systems. • Daily liaison with our internationally-based editorial teams. • Managing external stakeholders’ expectations. • Providing excellent and empathic customer service. • Assisting on department projects as required. Some experience with online submission platforms like Scholar One ManuscriptsTM or Editorial ManagerTM would be advantageous, although full training is available. SELECTION CRITERIA: • Online assessment. • Technical discussion. • Final HR level discussion.

Posted 1 month ago

Apply

0.0 - 4.0 years

15 - 20 Lacs

Bengaluru

Work from Office

You will be involved in the post-silicon characterization and production testing of automotive System-on-Chip (SoC) products. These products are based on ARM or RISC-V microcontrollers, with a primary focus on digital IP and functional blocks. The role encompasses a broad range of tasks, including analyzing device performance, ensuring compliance with datasheet specifications, and developing production test programs for automotive microcontrollers. In your new role you will: Responsible for Post Silicon Characterization/Production Test of ARM or RISC-V based micro-controller Automotive SoC products, with main focus on Digital IP/Functional Blocks. Perform characterization to analyze device performance and compliance to datasheet specification. Develop Production Test program for Automotive microcontrollers. Conceptualize, design and implement hardware and automation software for characterization of Automotive SOCs. Work closely with chip design team to debug silicon issues. Demonstrate technical innovation in measurement automation on ATE(V93K preferable) and bench (LabVIEW) platforms. Your Profile You are best equipped for this task if you have: MTech/M.E/MS or B-Tech/B.E in any of the specializations related to the field of Electronics / Microelectronics / VLSI. Strong Electrical Circuits Fundamentals. Strong troubleshooting & problem solving ability. Good Firmware coding & scripting skill. Experience in using equipment like Oscilloscopes, Source Measure Units, Power Supplies, Functional Generators etc is a plus. Experience in automating characterization using an ATE or NI LabVIEWis a plus

Posted 1 month ago

Apply

12.0 - 15.0 years

14 - 19 Lacs

Bengaluru

Work from Office

Title: MTS Design Engineering - Memory Layout Design About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction: GlobalFoundries is looking for highly motivated Memory Design Engineer to work in the Memory IP group in the Global Organization, based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of custom memory design blocks like decoders, sense amplifiers, write drivers etc. Your Job: Circuit design, simulation, and characterization of full custom circuits Functional simulations and statistical analysis Sign off and release the memory IP s on dedicated IP validation test chips Support Silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Work closely and collaborate with IP design and layout teams Required Qualifications: Requires MTech in Electrical (VLSI, Microelectronics and related fields) from a reputed university with 12-15 years of relevant experience Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys ) tools for schematic design & simulations (Virtuoso, Spectre, HSPICE, etc.) Experience in NVM Memory (MTPM/OTP/MRAM/SRAM/eFlash) designs Experience in timing characterization, Verilog is desirable General analog mixed-signal design concepts is desirable Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desirable Hands on knowledge of state-of-the-art memory or analog design flows Programming experience applicable to design flow automation tasks Dedication and the capability to work within a very dynamic interdisciplinary environment Knowledge of 45/32/28nm and below technology nodes is an advantage. Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Posted 1 month ago

Apply
cta

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.

Job Application AI Bot

Job Application AI Bot

Apply to 20+ Portals in one click

Download Now

Download the Mobile App

Instantly access job listings, apply easily, and track applications.

Featured Companies