4.0 - 8.0 years

3 - 8 Lacs

hyderabad, bengaluru

Work from Office

Role & responsibilities Description: Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Excellent problem-solving skills in physical verification of custom layout. • BE or MTech in Electronic/VLSI Engineering • 4 + year experience in analog/custom layout design in advanced CMOS process. ##NOTE: **custom layout or analog layout with TSMC 3nm/5nm7nm & 5+ exp **** TSMC/ SAMSUNG/ INTEL (mandatory) Preferred candidate profile Immediate joiners can share CV to : aman.a@acesoftlabs.com **Connect/follow at linkedin : https://www.linkedin.com/in/aman-b056091b1/

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