1.0 - 4.0 years

4 - 8 Lacs

Hyderabad, Telangana, India

On-site

Overview: Works on the design and verification of integrated circuits (ICs), including ASICs and FPGAs, for high-performance applications. Key Responsibilities: RTL design using Verilog/VHDL. Functional verification and synthesis. Timing analysis and power optimization. Collaborate with layout and physical design teams. Tools & Technologies: Synopsys Design Compiler, Cadence Virtuoso Model Sim, Viva do, Quartus Verilog, VHDL Career Path: VLSI Lead Chip Design Architect Semiconductor R&D Manager

Posted 20 hours ago

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