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3.0 - 7.0 years

0 Lacs

pune, maharashtra

On-site

You will be responsible for analyzing SystemVerilog/Verilog code and technical specifications to understand VIP functionality and translate complex concepts into clear, concise documentation. Additionally, you will design, develop, and maintain comprehensive technical documents such as user manuals, integration guides, and API guides. Creating engaging visual content like process diagrams and architecture diagrams will also be part of your role. Key Responsibilities: - Analyze SystemVerilog/Verilog code and technical specifications - Translate complex concepts into clear, concise documentation - Design, develop, and maintain technical documents - Create engaging visual content such as diagra...

Posted 2 months ago

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