9 Verilogams Jobs

As an Analog Mixed-Signal (AMS) Verification Engineer based in Bengaluru, you will leverage your 5+ years of experience in verifying analog and mixed-signal IPs/SoCs. Your primary responsibility will be to drive the verification of complex AMS IPs and subsystems, such as PLLs, ADCs/DACs, SerDes, LDOs, and power management circuits, at both IP and SoC integration levels. You will collaborate closely with digital and analog design teams to ensure first-time-right silicon. Your key responsibilities will include owning and executing end-to-end AMS verification plans at block, subsystem, and SoC levels. You will develop Verilog-AMS and SystemVerilog RNM models for analog IPs to facilitate faster top-level verification. Additionally, you will build and enhance UVM-MS based mixed-signal verification environments, perform co-simulation of analog and digital domains, define and implement verification methodologies, conduct corner case and Monte Carlo verification, debug analog/digital interaction issues, and automate verification workflows. To succeed in this role, you should possess 5+ years of AMS verification experience in IP or SoC environments along with hands-on expertise in Verilog-AMS, SystemVerilog, and UVM-MS methodologies. Strong knowledge of SPICE-level simulation tools like Spectre, HSPICE, Eldo, FineSim, and experience with AMS co-simulation flows are essential. Proficiency in developing behavioral/real-number models for analog blocks, understanding analog circuit behavior, debugging skills, and automation with scripting languages like Python, TCL, Perl, or SKILL are required. Additionally, familiarity with functional coverage, assertions, and constrained-random verification is crucial. Preferred skills for this role include exposure to advanced nodes like 7nm, 5nm, FinFET, knowledge of power intent verification, familiarity with formal verification techniques for AMS, hands-on experience with mixed-signal emulation/prototyping, and prior involvement in tapeout and silicon validation. To be eligible for this position, you should hold a B.E./B.Tech/M.E./M.Tech degree in Electronics, Electrical, or VLSI Engineering.,

At Cadence, we are looking for a dedicated individual to join our team as a Training Engineer. In this role, you will collaborate with product engineers, customer support, and R&D to identify training needs. Your responsibilities will include developing training materials such as lectures, labs, exams, and demos in alignment with software updates while maintaining high quality standards. As a Training Engineer, you will be involved in creating online and classroom-based training modules, delivering courses in various settings, and producing educational videos to guide customers on tool usage and methodologies. You will also provide support to online training participants and address any queries related to the training content. The ideal candidate for this position is someone who enjoys content creation, learning new tools, and mentoring others. You should be capable of working independently towards set goals and possess a good understanding of analog/mixed-signal design, simulation, and verification processes. Experience in designing and analyzing analog and mixed-signal circuits is essential for this role. Additionally, proficiency in creating test benches for mixed-signal designs using Verilog-A and Verilog-AMS, and familiarity with analog/mixed-signal Cadence design tools like Virtuoso and Spectre are required. Knowledge of SystemVerilog modeling capabilities and exposure to UVM-MS would be advantageous. Candidates applying for this role should hold a Bachelor's or Master's degree in Electrical/Electronics Engineering and have at least 4-6 years of relevant work experience. Strong written and verbal communication skills in English are essential for effectively conveying technical information to diverse audiences. If you are passionate about technology and eager to contribute to meaningful work, we invite you to be part of our collaborative team at Cadence. Join us in our mission to tackle challenges that others cannot solve.,

The ideal candidate for this position should have 1-2 years of experience in AMS design verification. You will be responsible for developing Verilog/VerilogA/VerilogAMS models for signal and power management modules to support top-level verification. Experience in full chip DV would be an added advantage. You will contribute to the development of the Full-Chip AMS-DV plan and own significant pieces of this verification process. It is essential to have the ability to drive best practices in the field of AMS-DV. In this role, you will work independently to identify bugs and resolve them formally with cross-functional teams. An understanding of analog power IPs will be beneficial as it can help in the debugging of chip-level AMS bugs. Proficiency in using tools such as Cadence Virtuoso, Spectre & Spice simulation, Incisive, and AMS simulators is required. You will utilize RTL and Gates+SDF, including process variation in back-annotated timing simulations. This will involve verifying chip-level timing between analog and digital circuits, parasitic resistance and capacitance, and using Assura parasitic extraction tools. Experience in constrained-random stimulus and auto-checking verification environments, especially constrained-random analog stimulus, is desired. The successful candidate should be able to work efficiently in a fast-paced product development environment. You will manage bug tracking and RTL code coverage, collaborate with design and systems teams to address bugs as they arise, and review digital and analog designs to provide guidance on Design for Verification architecture and features during chip development.,

You are an experienced AMS Verification Engineer with over 8 years of expertise in AMS IC verification, possessing hands-on experience in VerilogAMS, SystemVerilog, and UVM. Your strong skills lie in VerilogAMS and Real Number Modeling, and you have a solid understanding of Cadence tools, VManager, and Tcl/Perl. Any knowledge or experience in Analog/RF would be considered a valuable advantage. The location for this position is in Bengaluru. If you believe you are a suitable candidate for this role, we encourage you to reach out by either sending a direct message or sharing your CV to aayushi.sharma@saracasolutions.com. Join us in shaping the future of semiconductors!,

As an Analog Mixed Signal IC Designer with 4-10 years of experience in Bangalore, you will be responsible for designing, implementing, and verifying analog/mixed-signal IC designs for various motion sensor products. Your role will involve mentoring junior engineers in all areas of product design and evaluating system-level trade-offs for next-generation sensor interfaces. Collaborating with the MEMS design team, you will identify IC architectures to meet performance requirements. Additionally, you will interface with digital design engineers to define and optimize sensor architectures and digital signal processing circuits. Providing guidance to layout engineers on physical design and reviewing layouts for optimal design will be part of your responsibilities. Ensuring timely tape-out of designs adhering to required specifications is crucial. You will evaluate and validate designs in the lab, identify any deviations from requirements, and implement corrective actions. Performing any other duties or tasks assigned from time to time is also expected. The ideal candidate should hold a minimum of a Bachelors/Masters in EE with at least 4 years of industry experience in analog or mixed-signal CMOS circuit design. You should have a thorough understanding of analog and mixed-signal systems, micro-architecture trade-offs, and the ability to develop micro-architectures and high-level Matlab system models. A proven track record in designing low-power, low-noise, precision CMOS analog circuits for high-volume manufacturing is essential. Strong skills in designing various analog/mixed-signal blocks such as MEMS sense amplifiers, Bandgap References, Regulators, Charge pumps, ADCs, Oscillator circuits, and PLLs are required. Experience as an IC lead on at least one project with demonstrated success is preferred. Knowledge of design for test approaches and the development of characterization and production test plans is beneficial. Proficiency in lab and test equipment skills for the debug, characterization, and validation of designs is expected. Being diligent, detail-oriented, and proactive in process and flow improvements are qualities that will contribute to your success in this role. Your responsibilities will also involve developing DACs, Headphone, Line, and Speaker drivers, Proprietary Low-Voltage Line Drivers, DC/DC Converters, and various supporting circuitry in advanced CMOS processes. You will participate in all aspects of the design, from concept to production silicon. Involvement in the specification, architectural development, transistor-level design, SPICE, Matlab, and Verilog modeling and simulation, layout supervision, post-layout simulation, chip-level verification, and lab validation is part of the job. Specifically, you will develop PLL and low-jitter filters and gain hands-on experience with Audio CODEC applications and circuits across different CMOS processes and geometry nodes.,

As an AMS Verification Engineer, you will be responsible for working on Analog Mixed-Signal (AMS) Verification for SoCs, subsystems, and IPs. Your role will involve hands-on experience with AMS simulation environments using tools such as Cadence, Synopsys, or Mentor. It is essential to have a solid understanding of analog and mixed-signal circuits, including comparators, op-amps, switched-cap circuits, ADCs/DACs, current mirrors, charge pumps, and regulators. Your expertise in Verilog, Verilog-A, Verilog-AMS, and Verilog-D for behavioral modeling will be crucial for block-level and chip-level AMS verification. This includes top-level testbench development, self-checking testbenches, and regression suites. Exposure to SystemVerilog (SV) and UVM from an AMS perspective will be considered a plus. Proficiency in scripting languages such as Python, Perl, TCL, or SKILL for automation is required. You should be fluent with Cadence Virtuoso-based analog design flow, encompassing schematic capture, simulator/netlist configuration, and SPICE simulation. Your ability to extract, analyze, and document simulation results and present findings in technical reviews is highly valued. Furthermore, familiarity with test plan development, AMS modeling, and verification methodologies is essential. You will also be involved in supporting post-silicon validation and correlating measurement data with simulations. As a valued team member, you should be team-oriented, proactive, and able to contribute effectively in a multi-site development environment.,

We are looking for 2 AMS (Analog Mixed Signal) verification engineers who possess more than 5 years of experience, have hands-on RNM modeling exposure, and are well-versed with Cadence AMS/DMS Flow. As an AMS Verification Engineer, you should have the following skills: - Strong RNM modeling skills. - Proficiency with Cadence AMS/DMS flow. - Experience with SystemVerilog and Verilog-AMS. - Knowledge of analog and mixed-signal design principles. - Experience with UVM (Universal Verification Methodology). - Ability to debug AMS modeling issues. - Experience with basic scripting/automation. - Good communication and documentation skills. Your responsibilities will include: - Developing and executing verification plans for AMS designs. - Creating and automating testbenches for AMS verification. - Building and maintaining SystemVerilog real number models. - Working with analog and digital design teams to ensure designs meet specifications. - Verifying AMS/DMS IP/chip functionality. If you meet the above requirements and are eager to contribute to a dynamic team, we would like to hear from you.,

As an AMS Verification Engineer, you will play a crucial role in ensuring the successful verification of Analog Mixed Signal designs. With a minimum of 5 years of experience in this field, you will be responsible for developing and executing verification plans, creating testbenches, and collaborating with design teams to guarantee that designs meet specifications. Your key skills will include strong RNM modeling proficiency, hands-on experience with Cadence AMS/DMS flow, familiarity with SystemVerilog and Verilog-AMS, and a solid understanding of analog and mixed-signal design principles. Additionally, you should have expertise in UVM, the ability to debug AMS modeling issues, and experience with basic scripting and automation. Your responsibilities will involve building and maintaining SystemVerilog real number models, verifying AMS/DMS IP/chip functionality, and ensuring effective communication and documentation throughout the verification process. By working closely with both analog and digital design teams, you will contribute to the successful verification of complex AMS designs. If you are a detail-oriented verification engineer with a passion for analog mixed-signal design and a strong background in AMS verification, this role offers an exciting opportunity to further your career in a dynamic and collaborative environment.,

Job Description: We are looking for a highly motivated Mixed-Signal Design Verification Engineer with 3+ years of experience in analog/mixed-signal verification. The ideal candidate should possess strong fundamentals in analog and digital design processes, along with hands-on experience in mixed-signal modeling and testbench setup. Responsibilities: Develop and maintain mixed-signal testbenches from scratch Write and manage Analog Mixed Signal models using VerilogAMS and real number modeling Debug mixed-signal simulations and analyze waveform results Utilize Synopsys tools (CustomSim/Primesim XA, Waveview) and Cadence Spectre environment Automate workflows using Unix shell scripting and Python Desired Skills: Strong knowledge of analog building blocks and top-level integration Expertise in mixed-signal simulation performance optimization Proficient in Unix/Linux environments Strong scripting and automation capabilities Excellent communication and problem-solving skills