2286 Verilog Jobs - Page 7

Waymo is an autonomous driving technology company with the mission to be the most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo One, a fully autonomous ride-hailing service, and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over one million rider-only trips, enabled by its experience autonomously driving tens of millions of miles on public roads and tens of billions in simulation across 13+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms. In this role, you'll report to a Hardware Engineering Manager. This position will require the ability to work some hours that align with the team in the Pacific Daylight Time (PDT) zone on an as needed basis. You Will Establish a good understanding of chip's architecture, intended functionality and IPs Collaborate with verification and emulation teams in the pre-silicon phase, and create post-silicon test plans Perform functional and performance validation to to make sure the chip meets expectations Develop and execute stress test and PVT corner characterization to ensure robustness Effectively debug failures encountered during testing Develop automation for test execution, data post-process and reporting You Have Bachelor's degree in Electrical Engineering or Computer Engineering 3+ years of hands-on experience in silicon validation and bring-up of complex ASIC Demonstrated experience in at least one of the following areas, with a proven ability to apply that knowledge to silicon validation: IC design, verification, emulation, sw/fw development Experience in design or validation of at least one of the following subsystems: DDR, high-speed SerDes, Ethernet, CPU, GPU, NoC Proficiency in at least one of the programming or scripting languages: C/C++, System Verilog, Python Proficiency in lab equipment and debug tools, such as oscilloscope, protocol analyzer, JTAG debugger, etc We Prefer Experience with peripheral interfaces and protocols, such as I2C, SPI, UART, JTAG Familiarity with automotive standards and test methodologies Experience in developing and utilizing automated test scripts and frameworks for validation efficiency. Exposure to pre-silicon verification methodologies and the ability to ability to correlate with post-silicon results Experience in electrical validation and compliance test for IO interfaces The expected base salary range for this full-time position is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range ₹3,200,000—₹3,870,000 INR

As part of the custom product business at our company, you will be contributing to the development of industry-leading custom IC system solutions across various product categories such as display and touch power products, camera PMICs, charger power products, power switches/muxes, Laser drivers, and high-speed communication interfaces. By integrating signal chain and power components, your work will play a key role in enabling our customers to enhance their next-gen products in the personal electronics domain. Joining our team presents a unique opportunity to be part of a world-class custom semiconductor team. Your responsibilities in this role will include verifying complex analog designs/systems and providing support for the validation of designs on silicon. You will be responsible for releasing meticulously analyzed and simulated IC designs in a timely manner, ensuring they deliver optimal performance, cost-effectiveness, high quality, and meet our customers" end system requirements. Additionally, you will define, specify, model, plan, and implement the AMS verification strategy for mixed-signal ICs, including creating detailed verification plans and test cases, evaluating system-level use-cases, and contributing to post-layout parasitic extraction and simulation activities. To excel in this role, you are expected to have a strong background in defining and developing verification infrastructure for mixed-signal semiconductor products, along with a good understanding of analog circuits and expertise in tools such as Cadence Virtuoso, Cadence Spectre/TISpice, and Verilog-AMS/SystemVerilog. Proficiency in scripting languages like Python and Perl, as well as the ability to collaborate effectively with cross-functional teams, are essential skills for success in this position. Additionally, problem-solving abilities, strong communication skills, and the capacity to manage tasks independently with minimal supervision are key attributes we are looking for. With a minimum of 7 years of experience in mixed-signal verification and proficiency in tools like Virtuoso, Verilog, Verilog AMS, and Cadence tools such as xrun/ncsim/Vmanager, you will be well-equipped to meet the demands of this role. This position offers you the opportunity to work in a global organization, lead design and verification projects, and contribute to continuous improvements in design verification strategies, tools, methods, and flows. If you are passionate about shaping the future of electronics and seek a collaborative, innovative work environment, we invite you to apply for this exciting opportunity at our company. At Texas Instruments, we are committed to creating a better world through affordable electronics, and we value diversity and inclusivity in our workforce. Join us in engineering your future and being a part of our mission to drive innovation in the semiconductor industry. Please note that Texas Instruments is an equal opportunity employer and fosters a diverse and inclusive work environment. If you meet the qualifications outlined above and are interested in this position, we encourage you to apply.,

The culture at MarvyLogic is defined by its people. We foster a culture of passion for technology solutions that have a direct impact on businesses. We prioritize the pursuit of individual passions among our employees. Working with us offers you the opportunity to gain a comprehensive understanding of various industries and cutting-edge technologies. This exposure enables us to develop solutions that are not only forward-thinking but also highly impactful. Being a part of MarvyLogic can facilitate your personal growth, leading you towards a more fulfilling life. You should possess a Graduate Degree in Electrical/Electronics Engineering with over 10 years of experience (a post Graduate degree would be an added advantage). The job location is in Bengaluru/Bangalore. As a candidate for this position, you are expected to have a minimum of 10 years of experience in ASIC RTL Design and demonstrate proficiency in Verilog/System Verilog. Your expertise should extend to working with multiple clock and power domains. You should have a strong background in integrating and validating high-speed PCIe IP cores, including controllers and PHY SerDes. Experience with PCIe protocol analyzers and debugging is essential, as well as familiarity with PCIe driver and application software for both Linux and Windows environments. Your responsibilities will include RTL design and implementation of interface logic between PCIe controllers and DMA engines for high-performance networking applications. You will be required to create block-level micro-architecture specifications detailing interfaces, timing behavior, design tradeoffs, and performance objectives. Additionally, you will need to review vendor IP integration guidelines and ensure compliance throughout the design process. Running integrity check tools such as Lint/CDC/DFT/LEC/UPF to meet coding and implementation standards will also be part of your role. You will play a crucial role in the design verification process by reviewing test plans, coverage reports, writing assertions, and implementing design modifications to enhance verification quality. Furthermore, you will be involved in the physical implementation process by providing synthesis constraints, timing exceptions, and making design updates to achieve area, power, and performance targets. Key Responsibilities: - Collaborate effectively with multi-site teams - Conduct reviews of FPGA netlist releases (block/chip) - Demonstrate experience in the full ASIC product life cycle, including requirements, design, implementation, testing, and post-silicon validation.,

The job is located in Bangalore and requires 3-5 years of experience for 2 available positions. The primary responsibility involves RTL Design, with a focus on practical experience in RTL development using VHDL and/or Verilog. This includes functional and structural RTL design, design partitioning, simulation, regression, and collaboration with design verification teams. The ideal candidate should be familiar with the latest RTL languages and tools such as Modelsim, VCS, Design Compile, Prime Time, Linting tools, CDC tools, UPF, code coverage, System Verilog Assertion, among others. Desirable experience includes strong processor architecture knowledge, microarchitecture implementation, microprocessor integration, and low power design. Effective communication skills, teamwork abilities, self-direction, and time management skills are essential for this role. Preferred qualifications include developing RTL for multiple logic blocks of a DSP core, running various frontend tools for linting, clock domain crossing, and synthesis, collaborating with the physical design team on design constraints and timing closure, working with the power team on power optimization, and collaborating with the verification team on test plan, coverage plan, and coverage closure. The educational requirement for this position is a Bachelor's degree in Engineering, Information Systems, Computer Science, or a related field.,

The ideal candidate for this position should have 2 to 6 years of experience. The location for this job is Noida with 1-2 openings available. The educational requirement is a BA or B.Sc. in a technical field, English, or Communications. An added advantage would be having at least 1-3 years of writing or customer support experience in the electronics, networking, or computer industry, with experience in the semiconductor industry being a plus. The ideal candidate would possess a background in Mass Communication, Physics, or English, along with prior experience in technical writing. Familiarity with semiconductor-related technical jargon, software debuggers, and EDA tool scripts would be beneficial. The ability to edit or create web pages is also considered an advantage. Responsibilities for this role include writing, editing, proofreading, and preparing product manuals per release schedules. This will involve interacting with development engineering and technical marketing personnel to translate conceptual models into coherent reference manuals and user guides. The candidate will also collaborate with engineers, customer support, and product management to ensure the readability, technical accuracy, and completeness of the product documentation. Additionally, participation in developing departmental authoring guides, tools, and process improvements is expected. Desired talents and skills include excellent verbal and written communication skills in English, attention to company documentation and quality assurance standards, the ability to understand and translate technical information into customer documents, and a working knowledge of programming languages, Verilog, formal verification, or logic synthesis. Proficiency in publication tools such as Frame Maker, MS Word, Visio, Eclipse/Web help, as well as familiarity with DITA, CMS, and wiki- or database-based authoring, is desirable. Excellent interpersonal skills and positive teamwork abilities are necessary for conducting interviews with various users and technical staff to gather data for documentation. The ideal candidate should be solution-oriented, self-motivated, and capable of managing schedules and priorities across multiple projects.,

You are a senior FPGA expert with over a decade of experience in architecting, implementing, and optimizing complex digital systems. Your role will involve owning the design and delivery of mission-critical FPGA-based solutions. You will be responsible for the architecture, design, and implementation of complex FPGAs (Xilinx/Intel), as well as defining and driving system-level hardware architecture in collaboration with cross-functional teams. Additionally, you will lead timing closure, constraint management, and interface integration (PCIe, DDR, high-speed serial), while optimizing performance, power, and resource utilization. Your role will also include providing technical leadership, conducting peer reviews, and mentoring junior engineers. To be successful in this role, you should have 10+ years of hands-on FPGA design experience, deep expertise in Verilog/VHDL/SystemVerilog, and a strong track record of successful tape-outs/productization. Proficiency with tools such as Vivado, Quartus, Synplify, ModelSim, or similar is required. Familiarity with embedded systems, SoCs, or HW/SW integration is considered a plus. The ideal candidate is a self-starter who excels at solving challenging problems, shaping architecture, and delivering production-quality hardware. In this role, you will have the opportunity to work on innovative, performance-critical systems, while enjoying autonomy, ownership, and a voice in architecture decisions. If you are interested or know someone who fits this description, please apply by sending your details to himabindu.jeevarathnam@acldigital.com.,

As a Functional Verification Engineer at AMD in Hyderabad, you will be responsible for verifying the functionality of complex System on Chip (SOC) designs using industry-standard verification methodologies. With 4-10 years of experience, you will play a key role in ensuring the quality and reliability of ASIC designs. You should be proficient in UVM (Universal Verification Methodology) and have a strong command of Verilog or SystemVerilog. Additionally, knowledge of AMBA Bus Protocols is essential for this role. Your expertise in functional verification, design verification (DV), and ASIC verification will be crucial in meeting the verification goals of the projects. Working closely with cross-functional teams, you will have the opportunity to contribute to cutting-edge technologies and innovative solutions. This position requires immediate to 45 days notice period availability. If you are passionate about verification engineering and have a solid foundation in AMBA, SystemVerilog, SOC, Verilog, and other relevant skills, we invite you to join our team at AMD and be part of our dynamic work environment. Join us in shaping the future of technology with your verification expertise.,

Location: Bengaluru (Client Site) Job Type: Full-time Experience: 3-7 years Notice Period: 0-15 days (immediate joiners preferred) Embedded Engineer Advantal Technologies is seeking for the following positions: Experience band 3-7 years (We can have one lead of experience around 7 and rest 3 years) Experience in C programming on Bare Metal Experience on development on Xilinx MPSoC (preferable ZCU 106/104) Hands on experience on Xilinx Vitis Desirable to have experience on MISRA C coding guidelines Desirable to have experience on DO-178C Experience on device driver development Experience on protocols: I2C, SGMII, UART, SPI Desirable to have experience on security aspects of authentication, certificates, encryption/decryption FPGA Engineer: Experience band 3-7 years (We can have one lead of experience around 7 and rest 3 years) Experience in RTL coding using Verilog Experience on development on Xilinx MPSoC (preferable ZCU 106/104) Hands on experience on Xilinx Vivado and Vitis Desirable to have experience on MISRA C coding guidelines Desirable to have experience on DO-254 Desirable to have experience on Microblaze Desirable to have experience on security aspects of authentication, certificates, encryption/decryption Technical Lead: Minimum 8 years of experience. Minimum of 2 years experience in leading teams Excellent understanding of embedded system development and real-time application development. Hands-on experience in bare-metal code development using C, over an embedded platform Hands-on experience of FPGA design flow and experience digital design development using Verilog HDL. Experience in DO-178C compliance and certification Understanding of software development using API, and networking protocols Should be able to address the non-functional aspects like performance, scalability, reliability, availability etc. Should have a good understanding of the security aspects of the applications like authentication, authorization, public key infrastructure, SSL, certificates, etc. Good hands-on with design, coding, and resolving the technical issues Good experience in review process architecture, design, code. Fair understanding and working experience in Qt, C / Java/python programming language Technical hands on with tools and related framework Strong interpersonal and excellent communication skills Testers: Minimum 3 years of experience in testing of embedded system Experience in test case design and related execution. Experience in testing Zynq ultrascale MPSoC using Xilinx Vivado Experience in writing testbench using Verilog/System Verilog Experience in QuestaSim or equivalent simulation tool, Simulation environment creation, Good experience in code coverage, branch coverage If interested, please contact hr@advantal.net

Role : RTL Software Testing Engineer Role does not involve Silicon RTL development and neither any HW flow or testing. Work Location: Hyderabad Qualification: B.E / B. Tech or M. Tech in ECE / CS / EEE Experience Level : Minimum 2+ years Job Description Excellent Knowledge in Tcl, Python scripting. to test cases.(This would be the primary responsibility) Vivado testing of synthesis tool and other stages. RTL Coding in Verilog, System Verilog, or VHDL Strong understanding of FPGA flow, Logic design, Digital design etc. Knowledge in Xilinx FPGA architecture Communication Skills: Ability to communicate technical information in an organized and understandable fashion. Customer oriented approach with a demonstrated concern and desire to work with and assist customers. Good organizational skills with the ability to multitask, prioritize, and track many activities. Outstanding oral and written communication skills.

SMTS SILICON DESIGN ENGINEER T HE ROLE : This role is for a verification engineer or a hardware modelling engineer to maintain and enhance Graphics verification environment. THE PERSON: A successful candidate should have good understanding of both hardware and software concepts. K EY RESPONSIBLITIES : Maintain the verification infrastructure Implement low level drivers for the verification environment Implement new features in the verification environment and the driver Debug and support issues from different stakeholders P REFERRED EXPERIENCE : Experience in verification or driver development of complex compute IPs Experience with System C/C++ based verification environments Experience with Graphics driver development Experience with open cl/open gl is desirable Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-NS1

MTS GFX Verification Role: We are currently seeking a highly skilled verification engineer for GFX Verification team. Responsibilities: In this role, he/she would be responsible for verification of GPU Verification by meeting the demands of the constantly evolving project schedule. The successful candidate will be a member of the GFX team. He/she will demonstrate passion towards design, design verification, be a teammate, a problem solver with independence, creativity, and interpersonal skills. Working with all partners such as lead architects and block design teams to understand features to be implemented and verified. Developing robust test plan for both synthetic testing and real workload trace Debug verification test failures, working with the design team to accurate defects. Make sure AMD next generation GFXIP can meet performance/power/function expectation. Requirements: Must have Min 8 years of experienced in ASIC verification. Must be proficient in Verilog and System Verilog language Must be good at C/C++ programming and working in Linux and Windows environments. Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation/emulation tools and do test plan, test creation and triage, coverage, and assertion etc. Be proficient of script language like Perl, Python. Must demonstrate strong analytical thinking and problem-solving skills with an excellent attention to detail. Must have good English hearing, speaking, reading, and writing capabilities. Must have good teamwork and interpersonal skills. Graphics pipeline experience is preferred. Good knowledge of computer architecture is preferred. Must be a self-starter, and able to independently drive tasks to completion. Good teamwork and communications skills are required. Academic credentials: B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering / Computer Engineering with Digital Systems/VLSI as major with 8+ Years of Exp Location: Bangalore, India #LI-NS1

FPGA Engineer by Advantal Technologies | Jul 25, 2025 | Jobs | 0 comments Location: Bengaluru (Client Site) Job Type: Full-time Experience: 3-7 years Notice Period: 0-15 days (immediate joiners preferred) No. of Positions: 1 Lead & 4 Engineers About the Role: We are seeking a skilled FPGA Engineer with 3 7 years of experience in RTL design using Verilog, along with expertise in Xilinx MPSoC platforms, MicroBlaze processor development, and embedded system security aspects such as authentication, encryption/decryption, and certificates. The ideal candidate will play a key role in architecting and implementing secure, high-performance digital logic systems. Requirement: Experience band 3-7 years Experience in RTL coding using Verilog Experience on development on Xilinx MPSoC (preferably ZCU 106/104) Hands-on experience with Xilinx Vivado and Vitis Desirable to have experience with MISRA C coding guidelines Desirable to have experience with DO-254 Desirable to have experience with Microblaze Desirable to have experience in security aspects of authentication, certificates, encryption/decryption How to Apply: If you are passionate about embedded systems and meet the above requirements, we would love to hear from you. For more information, connect with us at : +91 91312 95441 Location: Bengaluru (Client Site) Job Type: Full-time Experience: 3-7 years Notice Period: 0-15 days (immediate joiners preferred) No. of Positions: 1 Lead & 4 Engineers About the Role: We are seeking a skilled FPGA Engineer with 3 7 years of experience in RTL design using Verilog, along with expertise in Xilinx MPSoC platforms, MicroBlaze processor development, and embedded system security aspects such as authentication, encryption/decryption, and certificates. The ideal candidate will play a key role in architecting and implementing secure, high-performance digital logic systems. Requirement: Experience band 3-7 years Experience in RTL coding using Verilog Experience on development on Xilinx MPSoC (preferably ZCU 106/104) Hands-on experience with Xilinx Vivado and Vitis Desirable to have experience with MISRA C coding guidelines Desirable to have experience with DO-254 Desirable to have experience with Microblaze Desirable to have experience in security aspects of authentication, certificates, encryption/decryption How to Apply: If you are passionate about embedded systems and meet the above requirements, we would love to hear from you. For more information, connect with us at : +91 91312 95441

www.omnidesigntech.com Principal Digital Verification Engineer Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT). Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins-Colorado, Bangalore-India, Hyderabad-India, Dublin-Ireland, Boston-Massachusetts. Bangalore We are looking for an experienced digital verification engineer, who is capable of driving the required verification flows for our mixed-signal designs. The ability to work closely with rtl design team and the analog team, and to develop detailed verification flows, is a key feature of this role! Qualifications You will be part of a Verification Team. You will be responsible for driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. You will be responsible for analysing Code Coverage, Functional Coverage and Assertions. Use industry standard tools, methodologies. Solid experience in verification of complex SoCs. Expertise in SoC Verification using SV and Verilog. Knowledge of UVM is a plus. Expertise in Test Plan creation and Verification technologies like Code Coverage, Functional coverage, assertion based verification. Verification experience in complex datapath, DSP based ASICs is highly desirable. Good knowledge in gate-level simulation, and Scripting languages like Python, TCL. Excellent debugging and problem solving skills. Strong communication skills. Education and Experience B.E./B.Tech./M.E./M.Tech in VLSI Minimum of 8-15 years of working experience in Digital Verification/Formal Verification flow of a product company. Candidate must have working experience System Verilog/UVM based verification flow. We are looking for trailblazers ... We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Design’s IP cores and the rapidly emerging semiconductor embedded design business ecosystem. we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring our vision to fruition. If you are interested in making an impact as part of a young, fast growing, cutting edge technology company, please reach out to us. We are a equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com

RTL/Integration- Design Engineer Work Location : Bengaluru, Whitefield Qualification : 5-10 years full-time experience in IP hardware design Mode of interview : Virtual Availability to join: candidates who can join in 30-45 Days are preferred. Normal Working Hours, 5 days a week Work Mode : Work from Office The Project and role : As a member of the Computing and Graphics group , you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. The Person: The ideal candidate will have experience developing RTL for IP or subsystems and understand architectural specifications. Responsibilities include IP and subsystem design, integrating multiple IPs, performing quality checks and working collaboratively with the IP/SoC team. Key Responsibilities: Design of IP and subsystems with integration of AMD and other 3rd party IPs Perform quality checks (lint, CDC, and power rule checks) of power-gated digital designs Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up Preferred Experience: Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs Verilog lint tools (Spyglass) and verilog simulation tools (VCS) Clock domain crossing (CDC) tools Detailed understanding of SoC design flows Understanding of IP/SS/SoC Power Management techniques Power Gating, Clock Gating Experience with embedded processors and data fabric architectures (NoC) Functional Skills Outstanding interaction skills while communicating both written and verbally Ability to work with multi-level functional teams across various geographies Outstanding problem-solving and analytical skills ACADEMIC CREDENTIALS: Bachelors or Masters degree in Computer Engineering/Electrical Engineering

Job Description Primary Duties & Responsibilities Architect, design, implement and test HDL modules for the payload following best practices such as efficiency, maintainability, and testability. Gather, define, and document requirements to meet existing and anticipated needs for payload systems. Develop, analyze, and review data to validate and verify the system meets specifications and design requirements. Implement real-time control algorithms and data processing routines to meet mission-critical performance requirements. Work closely with the software and hardware engineers to integrate and develop formal design verification and validation plans and perform or oversee testing. Maintain high-quality documentation of the entire design. Develop user manuals and troubleshooting guidelines for end-users. Ensure that the FPGA/RTL design meets industry standards. Work with cross-functional global teams with external stakeholders. Education & Experience Bachelors / master's degree in engineering. Minimum 5 years of experience in Firmware Development and FPGA development. Strong understanding of FPGA development tools, synthesis, simulation, and verification process. Experience with Intel-based SoCs, Quartus Prime, Modelsim, NIOS, etc. Proficient in FAGA designing and RTL(verilog) programming. Strong experience in the FPGA design process and writing device drivers in VHDL and or Verilog-embedded applications on FPGAs. Skills Experience with designing state machines and hardware interfacing with the understanding of high-speed communication interfaces (SPI, I2C, UART, and LVDS). Experience with software/firmware verification with test benches to verify design logic and generate high-quality documentation of the design and test results. Experience working in the hardware lab with knowledge of electronic equipment such as multimeters, function generators, oscilloscopes, logic analyzers, etc. Familiarity with digital signal processing (DSP) and high-speed data interfaces. Knowledge of how to optimize for memory/timing/power under resource constraints. Knowledge of understanding hardware design and SoC's specific schematics. Must be hard-working with good communication skills. Must be able to work both independently with minimal guidance, as well as part of a team. Be flexible and ability to excel in a cross-organizational, cross-cultural, global team environment. Good to have knowledge of c/c++/python/shell programming. Experience working on multiple stages of the product development lifecycle (project initiation, design completion, release, and maintenance with version control) Working Conditions Should be flexible to work outside of business hours. The work mode of Finisar India is Hybrid i.e. 3 days at office. Culture Commitment Ensure adherence to company’s values (ICARE) in all aspects of your position at Coherent Corp.: I ntegrity – Create an Environment of Trust C ollaboration – Innovate Through the Sharing of Ideas A ccountability – Own the Process and the Outcome R espect – Recognize the Value in Everyone E nthusiasm – Find a Sense of Purpose in Work Coherent Corp. is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. Finisar India (Subsidiary of Coherent Corp) is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to gender identity, sexual orientation, race, color, religion, national origin, disability, or any other characteristic protected by law. About Us Coherent is a global leader in lasers, engineered materials and networking components. We are a vertically integrated manufacturing company that develops innovative products for diversified applications in the industrial, optical communications, military, life sciences, semiconductor equipment, and consumer markets. Coherent provides a comprehensive career development platform within an environment that challenges employees to perform at their best, while rewarding excellence and hard-work through a competitive compensation program. It's an exciting opportunity to work for a company that offers stability, longevity and growth. Come Join Us! Note to recruiters and employment agencies: We will not pay for unsolicited resumes from recruiters and employment agencies unless we have a signed agreement and have required assistance, in writing, for a specific opening. LinkedIn

Job Description Collaborate with system architects and micro-architects to define high-level, implementable SoC specifications. Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning. Lead RTL design and integration of multi-subsystem SoCs , supporting complex architectures with multi-core, multi-power, and multi-reset domains . Demonstrate strong proficiency with front-end flows , including Lint, CDC, low-power (UPF) checks, synthesis, DFT , and Static Timing Analysis (STA) . Drive the development of robust Safety, Security, and Debug architectures for advanced SoCs with multiple interconnects. Design and integrate standard interface protocols such as AHB, AXI, CHI , and memory interfaces including ROM, RAM, Flash, LPDDR/DDR3/4 . Engage cross-functionally with DFT, physical design, verification, emulation, and validation teams to ensure first-time-right silicon and on-time project delivery. Support post-silicon debug, bring-up, and validation , working closely with lab and silicon validation teams. Continuously evaluate and adopt new design methodologies and best practices to improve productivity and shift-left the design cycle. Mentor junior engineers, review their work, and provide technical leadership and guidance across multiple design projects. Provide overall leadership and tracking of the team’s goals. Contribute to the innovation quotient of the team via Desing Patents, Industry Standard Publications, AI-enabled design methodologies etc. Qualifications M.Tech/ B.Tech in Electrical Engineering or Computer Science with 12+ years of RTL design experience. Proven expertise in Verilog/SystemVerilog RTL design, integration, and microarchitecture. Strong understanding of SoC architecture, AMBA protocols (AXI, AHB, APB), clock/power domains, and memory subsystems. Experience with EDA tools for synthesis, lint, CDC, RDC, and timing analysis. Familiarity with UPF/low-power design, formal verification techniques, and static/dynamic checks. Excellent leadership, communication, and project management skills. Experience working with global cross-functional teams. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement . Job title Principal Engineer,RTL Department Engineering Location Noida Remote No Requisition ID 20019236_2025-03-01

As an RTL/FPGA Design Engineer in the VLSI domain, you will play a crucial role in developing FPGA-based products. With a focus on RTL programming using Verilog/System Verilog or VHDL, you will be responsible for optimizing RTL code to meet timing requirements and on-chip resource constraints. Your expertise in FPGA Development Tools such as Quartus, Modelsim, Vivado, Xilinx ISE, and Libero will be essential in ensuring the successful completion of projects. Your responsibilities will include functional verification using Verilog/System Verilog or VHDL, system architecture design, and testing/troubleshooting of hardware components. Additionally, you will be required to support all phases of FPGA-based product development activities, demonstrating a strong understanding of FPGA design flow/methodology and IP integration. To excel in this role, you should hold a BE/B.Tech or ME/M.Tech degree in Electronics/Electronics & Communication or Electronics/VLSI Design from a recognized university. Proficiency in Verilog/SystemVerilog or VHDL for design and verification is essential, along with knowledge of protocols like SPI, I2C, UART, and AXI. Familiarity with tools such as Quartus II, Questasim, Modelsim, ISE, Vivado, and libero will be advantageous. As a self-motivated individual, you should be eager to learn and contribute effectively within a team-oriented environment. Your ability to prioritize tasks, solve problems creatively, and write clean code following coding guidelines will be highly valued. If you are passionate about working in a dynamic and innovative setting, we encourage you to apply for this exciting opportunity in Ahmedabad or Bangalore. Join us and be a part of our vibrant team dedicated to pushing the boundaries of VLSI design and FPGA technology. Apply now to explore this role further and take the next step in your career growth.,

Job Description: As a Technical Developer at Five Feed Learning Solutions Pvt. Ltd., you will be responsible for various aspects of FPGA and RTL design. You should possess good communication skills and analytical problem-solving capabilities. Your role will involve hands-on experience in FPGA/RTL Design using Verilog HDL, Tanner, Vivado ISE/Xilinx ISE, Modelsim, and Synplify Synopsys. A strong knowledge of VLSI Circuit designs and parameter synthesis is essential. Knowledge of TCAD, HSPICE, and PSPICE will be advantageous. Your responsibilities will include RTL design, verification, FPGA partitioning and implementation, as well as lab-based bring up of the SoC on FPGAs. Recent FPGA experience, including implementation, synthesis using Synplify, and timing closure with Vivado/ISE, is required. You should be able to architect, implement, and verify modules for FPGA interconnect. Proficiency in Verilog, Perl, and Make is expected. You should have expertise in both simulation-based verification and lab-based debug skills on FPGAs. Qualifications: - Graduation in B.E, B.Tech - Post Graduation in M.E., M.Tech VLSI Perks & Benefits: - Salary: Rs 2.5 Lacs - 4 Lacs p.a - Key Skills: Custom Coding, Technical Support, VLSI, Modelsim, Verilog, FPGAs, Perl, Synplify, Vivado/ISE, Xilinx ISE - Industry: Education / Training - Number of Positions: 2 Recruiter Profile: Recruiter Name: Not specified Email Address: hiringteam.3@fflspl.com Contact Company: Five Feed Learning Solutions Pvt. Ltd. Reference ID: FFLSPL/Feb-2025/189-92,

As a Verification Engineer, you will be responsible for developing and implementing comprehensive verification plans using industry-standard methodologies such as UVM. Your role will involve designing and writing robust verification environments (testbenches) to achieve high code coverage. Utilizing simulation tools like ModelSim, Cadence Incisive, and Synopsys VCS will be essential for verifying RTL functionality. You will play a crucial part in debugging and analyzing verification failures to identify the root cause of design issues. Collaboration with RTL design engineers to resolve functional bugs and ensure design revisions meet verification requirements will be a key aspect of your responsibilities. Additionally, your involvement in code reviews and ensuring adherence to verification coding standards will be significant. Staying up-to-date with the latest verification tools and methodologies will be crucial for your continuous growth and success in this role. Qualifications required for this position include a Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (a Master's degree is a plus). You should have 5-7 years of experience in design verification for ASICs or SoCs. A strong understanding of digital design principles, including combinational logic and sequential logic, is essential. Your proven ability to develop and debug complex verification environments, proficiency in Verilog or VHDL, and experience with verification methodologies like UVM will be highly valued. Experience with simulation tools and scripting languages such as Python and Perl would be advantageous. Excellent analytical and problem-solving skills, along with strong communication and collaboration abilities to work effectively in a team environment, are qualities that will contribute to your success in this role.,

You will be responsible for designing and developing Debug IPs focusing on CoreSight IP design. Your role will involve ensuring that the Debug IPs meet the required specifications and performance standards. You will utilize your expertise in RTL design using Verilog and/or SystemVerilog for complex SoC development. Additionally, you will apply your knowledge of Arm-based designs and/or Arm System Architectures to develop and optimize IPs. Collaboration with cross-functional teams, SoC integration & Architecture teams is essential to ensure successful IP delivery within specified timelines. Implementing rigorous verification processes to ensure that the IPs meet all functional and performance requirements is a key aspect of the role. To qualify for this position, you should hold a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in RTL design for complex SoC development using Verilog and/or SystemVerilog is required. A strong understanding of Arm-based designs and/or Arm System Architectures is essential. Proficiency in IP design, verification, and delivery, with a focus on Debug IPs, is also a key requirement. Excellent communication and collaboration skills are necessary to effectively work with cross-functional teams. Preferred skills for this role include experience with CoreSight based Debug IP design and strong problem-solving and analytical skills.,

Qualcomm India Private Limited is a company of inventors that unlocked 5G, leading to rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. In the Invention Age, inventive minds with diverse skills, backgrounds, and cultures are needed to turn 5G's potential into world-changing technologies and products. As part of the successful engineering team at Qualcomm, whose deliveries are present in billions of mobile, compute, and IoT products globally, you will play a crucial role. This position, based in Qualcomm's Bangalore office, focuses on Low Power controller IP cores and subsystem digital design for industry-leading Snapdragon SoCs in mobile, compute, IoT, and Automotive markets. Your responsibilities will include micro-architecture and RTL design for Cores/subsystems, working closely with various teams for design convergence, enabling SW teams to utilize HW blocks, qualifying designs using static tool checks, and reporting progress against expectations. Preferred qualifications for this role include 4 to 10 years of experience in digital front-end design, expertise in RTL coding in Verilog/SV/VHDL, familiarity with UPF and power domain crossing, experience in synthesis, logical equivalence checks, and netlist CLP, proficiency in various bus protocols, low power design methodology, formal verification, and post-Si debug. Additionally, expertise in scripting languages like Perl/TCL/Python, database management flows, and effective communication skills are desired. Minimum qualifications entail a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of relevant experience, or a Master's degree with 3+ years of experience, or a PhD with 2+ years of experience. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. The company expects its employees to adhere to all applicable policies and procedures, including security and confidentiality requirements. Qualified applicants are encouraged to apply, and staffing/recruiting agencies are advised not to submit unsolicited profiles, applications, or resumes. For more information about this role, please contact Qualcomm Careers.,

As an AMS Verification Engineer, you will be responsible for working on Analog Mixed-Signal (AMS) Verification for SoCs, subsystems, and IPs. Your role will involve hands-on experience with AMS simulation environments using tools such as Cadence, Synopsys, or Mentor. It is essential to have a solid understanding of analog and mixed-signal circuits, including comparators, op-amps, switched-cap circuits, ADCs/DACs, current mirrors, charge pumps, and regulators. Your expertise in Verilog, Verilog-A, Verilog-AMS, and Verilog-D for behavioral modeling will be crucial for block-level and chip-level AMS verification. This includes top-level testbench development, self-checking testbenches, and regression suites. Exposure to SystemVerilog (SV) and UVM from an AMS perspective will be considered a plus. Proficiency in scripting languages such as Python, Perl, TCL, or SKILL for automation is required. You should be fluent with Cadence Virtuoso-based analog design flow, encompassing schematic capture, simulator/netlist configuration, and SPICE simulation. Your ability to extract, analyze, and document simulation results and present findings in technical reviews is highly valued. Furthermore, familiarity with test plan development, AMS modeling, and verification methodologies is essential. You will also be involved in supporting post-silicon validation and correlating measurement data with simulations. As a valued team member, you should be team-oriented, proactive, and able to contribute effectively in a multi-site development environment.,

As part of our team working on building India's first commercial Scanning Electron Microscope (SEM) from scratch, your primary responsibility will be to design and develop the real-time beam controller on a Zynq Ultrascale+ (ARM+FPGA). You will be working on achieving a pixel clock of 20 MHz with 5 ns jitter, ensuring a blanking rise/fall time of less than 25 ns into 50. Additionally, you will implement closed-loop stage control utilizing high-resolution position feedback and update the PID at a frequency of 10 kHz. Your role will also involve streaming 16-bit detector data at a rate of 250 MB/s over PCIe to host memory. Furthermore, you will be tasked with delivering imaging algorithms such as auto-focus, auto-stigmation, and drift correction that run at 5 frames per second. To facilitate scripting and automated metrology, you will need to develop a clean and well-documented Python API. To excel in this role, you should possess at least 6 years of experience in C++17/C, Python, real-time Linux or RTOS. You should be comfortable working with FPGA toolchains like Vivado and Verilog. A strong background in DSP and control theory is essential, and you should be adept at using tools like scope probes and logic analyzers. Any prior experience with SEM, TEM, or other charged-particle systems would be considered a bonus. We are interested in learning about the most challenging technical problem you have successfully tackled and why you are excited about contributing to Bharat Atomic's mission. If you are passionate about turning first-principles physics into a manufacturable instrument and possess the required skills and experience, we encourage you to share your CV and Portfolio with us.,

As a Senior RTL Design Engineer with 3-5 years of experience, you will be based in Hyderabad. You will be required to demonstrate strong RTL (Verilog/System Verilog) skills with a focus on IP development. Your responsibilities will include verifying designs by creating simple testbenches, as well as possessing a solid foundation in logic synthesis and timing closure concepts. Additionally, you should have a good understanding of SoC architecture, AXI bus protocols, and hardware debug processes. Experience with Xilinx FPGAs, Vivado tool flows, and micro-architecture development will be considered a plus. If you meet the specified requirements and are interested in this opportunity, please submit your updated resume to janagaradha.n@acldigital.com.,

You will be a member of the FPGA development team designing and developing complex FPGAs for use in state-of-the-art embedded systems. As an FPGA Senior Design Engineer / Module Lead, you will be involved in requirements gathering, architecture and detailed design of FPGAs, coding, code walk, development of verification and validation plans, documentation of design, verification / validation, user guides, etc., technical reviews, maintaining Quality standards as per the Project Quality Guidelines and mentoring team members. Experience in architecture design, development and verification of complex FPGAs is crucial for this role. You should possess excellent RTL coding skills in Verilog/VHDL and be familiar with AMD (Xilinx) / Intel (Altera) / Lattice / Microchip FPGAs. Additionally, familiarity with AMD (Xilinx) ISE, Vivado / Intel (Altera) Quartus / Lattice Diamond / Microchip Libero FPGA tools is required. Experience in Functional verification using ModelSim and familiarity with high-speed interfaces such as PCIe, SPI-4.2, SFI-4.2, Gigabit Ethernet, UTOPIA, POS PHY, USB2/3, DDR3, SPI, UART, I2C, Aurora etc. is necessary. Exposure to FPGA Static Timing Analysis and knowledge of scripting languages like TCL and Python are desired skills. You should also have knowledge of Interfacing FPGA to ADC, DACs and experience in FPGA on-chip debugging with Chipscope/ Signaltap. Test bench development in VHDL / Verilog / System Verilog and familiarity with hardware test equipment like High-Speed DSO, Logic Analyzer, Spectrum Analyzer, Network Analyzers, Traffic Generators, etc. are important aspects of this role. Understanding of high-speed Microprocessors / Micro-controllers, L2/L3 switching, TCP/IP, and other networking protocols is beneficial. Knowledge of Hardware Schematics, Quality Process, and Configuration Management tools is also required for this position. Good oral and written communication skills, strong organizational, presentation, and motivational skills are essential qualities. The ideal candidate should have 3 to 5 years of experience in FPGA Development and hold a BE / B.Tech / M.Tech degree in Electronics & Communication Engineering.,