3.0 - 5.0 years

0 Lacs

bengaluru, karnataka, india

On-site

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Product Engineer Grade: T3 Experience: 3-5 Years Location: Bangalore/India Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communic...

Posted 1 week ago

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Analog Layout Engineer | Physical Design Engineer | AMS Layout Design Acesoft Labs

3.0 - 8.0 years

15 - 27 Lacs

bengaluru

Work from Office

Role & responsibilities Description : 4 to 8 years of experience in Design and development of critical analog, mixed-signal, custom digital block. TSMC 16/12nm,7nm,5nm,3nm and below (foundries are also fine like Intel, Samsung, GF) Preferably TSMC 5nm/3nm experience. Responsible full chip level integration support. Verification flows - LVS/DRC/DFM/Antenna check/EMIR experience. Responsible for on-time delivery of block-level layouts of acceptable quality. Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. Analog blocks like Regulators/Charge pumps/Power Management etc.. HBM experience is an added advantage. PLs share resumes/CV to pradeep.b@acesoftlabs.com Preferred c...

Posted 1 month ago

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Senior DFT Engineer, Google Cloud Google

3.0 - 7.0 years

0 Lacs

karnataka

On-site

Minimum qualifications: You should hold a Bachelor's degree in Electrical Engineering, a related field, or possess equivalent practical experience. Additionally, you must have at least 5 years of experience in DFT specification definition architecture and insertion. A minimum of 3 years of experience using electronic design automation (EDA) test tools (e.g., Spyglass, Tessent) is required. Your background should also include experience with ASIC DFT synthesis, STA, simulation, and verification flow. It is essential to have experience collaborating with ATE engineers, involving tasks such as silicon bring-up, patterns generation, debug, validation on automatic test equipment, and resolution o...

Posted 3 months ago

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