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Design Verification Engineer (PCIe) Proxelera

0.0 years

0 Lacs

hyderabad, telangana, india

On-site

Key Responsibilities & Skills: * Perform functional and compliance verification of PCIe-based IPs and subsystems. * Integrate and debug using Avery PCIe VIPs. * Deep understanding of PCIe Gen4/Gen5 protocols. * Expertise in SystemVerilog and UVM methodology. * Strong debug skills with VCS, Questa, or Xcelium. * Experience in coverage-driven and constraint-random verification. * Hands-on with Python, Perl, or Shell scripting. * Collaborate with design, validation, and architecture teams. * Review test plans, reports, and coverage metrics. * Excellent communication and problem-solving abilities.

Posted 5 days ago

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