17 Vclp Jobs

Were Hiring – RTL Design / Low-Power Verification Engineer (UPF / VCLP Expert) Are you passionate about RTL Design and Low-Power SoC Verification ? Join ACL Digital and be part of an innovative semiconductor design team driving next-gen chip solutions! Location: Bangalore Experience: 5+ Years Notice Period: Immediate to 30 Days What You’ll Do Define, develop, and validate Unified Power Format (UPF) for multi-voltage, power-gated SoC/ASIC designs. Perform power intent verification using Synopsys VC LP / PrimeTime PX / Cadence CLP . Analyze and close VCLP warnings and errors — isolation, retention, and level shifter strategies. Collaborate with RTL & PD teams to ensure correct low-power cell i...

Role Overview: As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will have the opportunity to plan, design, optimize, verify, and test electronic systems, circuits, mechanical systems, and various other cutting-edge technologies to launch world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Key Responsibilities: - Developing advanced Low Power flows and methodologies for estimation, optimization, and signoff - Architecting AI & ML-driven LP flows to improve efficiency and design scalability - Collaborating with SoC and Subsystems teams for seamless deployment of robust LP methodologies - Working wi...

You are a highly skilled and experienced engineer with a deep understanding of synthesis, timing closure, power optimization, and constraints management. Your expertise includes working on advanced nodes under 5nm and proficiency in low-power, high-performance design. Familiarity with RTL, DFT, LDRC, TCM, VCLP, and PTPX gives you an edge in tackling complex design challenges. Your ability to use scripting languages such as TCL, Perl, and Python is a valuable asset. Holding a BS or MS in Electrical Engineering or a related field with over 9 years of relevant experience, you are well-equipped to drive continuous technological innovation and transform the future. - Developing innovative methodo...

You have a job opportunity for the Manager / Senior Role Physical Design Engineer position in Hyderabad. Your primary responsibilities will include: - Performing IP/Block level PnR activities from Netlist to GDS-II - Demonstrating good knowledge of all PnR activities such as Floor-planning, Placement, CTS, Routing, Timing closure (STA), and signoff checks like FEV, VCLP, EMIR, and PV - Executing all the Physical Implementation steps from Physical Synthesis to a Sign-Off GSD2 file - Handling signoff convergence, block-level Timing Signoff, ECO generation, and Power signoff - Having knowledge of high performance and low power implementation methods (preferred) - Expertise in ICC2/Fusion Compil...

The Client DDRPHY team is looking for an energetic and passionate Logic Design Engineer who will work on high-speed digital design targeted towards low power optimized IP implementations. You will be responsible for overseeing definition, design, verification and your responsibilities will include but are not limited to - defining architecture and microarchitecture features of the block being designed, implementing RTL in System Verilog, setting up Automation flows for IP Logic Design, ensuring RTL quality via Front End tools like Lint, CDC, VCLP, Synthesis QA checks etc, creating FE packages for IP milestones that meet SoC Collateral requirements, create innovative automated solutions to he...

3+ years experience Synthesis and STA Engineers Experience with power analysis using power artist and PTPX Experience with sign off static timing analysis, static low power checks, logic equivalency checks Static timing analysis and ECO flows and achieve timing closure

We are looking for a highly skilled Synthesis & Static Timing Analysis (STA) expert to join our Flows & Methodologies Team in Noida with a hybrid work model where you will be required to work 3 days in the office. As an ideal candidate for this role, you should have a minimum of 6 to 15 years of experience along with strong analytical skills, attention to detail, and the ability to collaborate effectively with cross-functional teams. Proficiency in EDA tools and digital design principles is a must-have for this position. Your key responsibilities will include working closely with SoC cross-functional teams to define and develop Synthesis & STA methodologies for advanced nodes such as 3nm, 5n...

We are seeking an ASIC RTL Design Lead to join our team in Hyderabad at the earliest. The ideal candidate should possess over 10 years of experience and demonstrate expertise in the following areas: - Proficiency in RTL Design utilizing verilog - Experience in SoC and Subsystem integration, including the integration of peripherals such as PCIE, Ethernet, and USB - Ability to conduct front end flow environment bringup - Strong understanding of Flows, Lint, CDC, Synthesis, Formality, VCLP - Knowledge of tcl or perl scripting - Development of CDC and synthesis constraints, Timing analysis, Signoff If you meet these requirements and are interested in this opportunity, please send your profile to...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER THE ROLE: As a member of the AECG Custom ASIC Group, you will h...

As a CPU/GPU/IP Implementation Methodologies Engineer, you will be responsible for developing innovative methodologies to implement high-performance CPUs, GPUs, and interface IPs. You will utilize advanced technologies and tools to enhance the quality of results and streamline the implementation process. Your role will also involve contributing to the development and implementation of power, performance, and area (PPA) methodologies for complex IPs. You will work with industry-leading Synopsys tools like RTLA and Fusion Compiler to address critical design challenges. Collaboration with a global team will be essential to ensure staying ahead of technological advancements and design complexiti...

Qualcomm India Private Limited is a leading technology innovator that aims to create a smarter, connected future for all by pushing the boundaries of what's possible. As a Qualcomm Hardware Engineer in the Engineering Group > Hardware Engineering, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This includes working on a wide range of systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems to develop cutting-edge products. Collaboration with cross-functional teams is essential to meet performance requirements and deliver innovative solutions. The Low Power CAD Engineer position at Qualco...

Looking for Siemens EDA ambassadors: Lead Software Engineer for Product Validation and Customer support for PowerPro If you are passionate about innovations that lead to real progress, and if you are curious about technologies that are yet to be developed, then this opportunity might be for you. Utilize your curiosity, passion, and creativity to enhance the lives of millions of people. Join us and share your unique perspective with us! As a valuable member of the Siemens EDA team, your role will involve contributing to the growth of efficiency and customer satisfaction within Siemens EDA's Power platform. This challenging position aims to support the expansion of Siemens's EDA business in In...

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the worlds leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide...

You should have a strong understanding of design power intent at the RTL level and UPF. You should be able to translate power intent into UPF after consulting with the RTL designers. Your responsibilities will include running, debugging, and resolving Static Power Check (VCLP) related issues independently before RTL is handed off to PD. Your tasks will involve UPF generation (yaml creation, running upfgen to create the UPF) and UPF maintenance. As RTL changes, UPF may need adjustments and re-verification. You should also be proficient in running VCLP and integrating it with the top level as well as with the P&R flows. We are looking for a UPF expert with a strong background in low power desi...

You are a highly skilled and experienced engineer with a deep understanding of synthesis, timing closure, power optimization, and constraints management. Your expertise includes working on advanced nodes under 5nm and proficiency in low-power, high-performance design. Familiarity with RTL, DFT, LDRC, TCM, VCLP, and PTPX gives you an edge in tackling complex design challenges. Your ability to use scripting languages such as TCL, Perl, and Python is a valuable asset. Holding a BS or MS in Electrical Engineering or a related field with over 9 years of relevant experience, you are well-equipped to drive continuous technological innovation and transform the future. Your responsibilities will incl...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with logic synthesis techniques to optimize RTL code, performance and power, and low-power design techniques. Experience with a scripting language such as Perl or Python. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Science, or equivalent practical experience. Experience implementing image/video processing blocks or other multimedia IPs such as Display ...

Greetings from Quest Global Please find the details and kindly send me your Profile . RTL Design 10-15 Years Location : Bangalore/Hyderabad 1. Should have worked on ASIC/SOC projects using 22nm or smaller technology node 2. Expertise in automated RTL Integration using any of the industry standard tool/EDA flow 3. Expertise in SDC and UPF constraints development and checking 4. Expertise in Timing violation debug/fix at netlist level 5. Good knowledge on AHB/AXI/APB/PIPE interface 6. Expertise in Lint, CDC and VCLP, Synthesis, LEC 7. Very Strong in Python and TCL scripting • Nice to have skills: 8. Exposure to PCIe/Ucie 9. Experience in Leading small rtl design team • Location: Bangalore and ...