Physical Design Engineer/Lead SoCtronics

5.0 - 10.0 years

0 Lacs

hyderabad, telangana

On-site

As an experienced Physical Design Engineer, you will be responsible for executing block level P&R and Timing closure activities. Your primary role will involve owning up block level P&R and performing Netlist2GDS on blocks. You will be working on the implementation of multimillion gate SoC designs in cutting-edge process technologies such as 28nm, 16nm, 14nm, and below. Your expertise should cover various aspects of physical design, including Synthesis, Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning and Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal I...

Posted 3 weeks ago

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QS & Estimation (Finishes) Engineer Adani Realty

3.0 - 7.0 years

0 Lacs

maharashtra

On-site

As a Quantity Surveyor, your main responsibilities will include leading and managing the quantity surveying and estimation activities for finishes in construction projects. This involves preparing detailed cost estimates, budgets, and bill of quantities based on project requirements. You will be expected to conduct thorough cost analysis and value engineering to optimize project costs. Collaboration with cross-functional teams including architects, engineers, and contractors is essential to ensure accurate project costing. Your role will also involve reviewing and analyzing tender documents, contracts, and variations to assess cost implications. Monitoring project progress and costs to ident...

Posted 2 months ago

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Physical Design Engineer/Lead SoCtronics

5.0 - 10.0 years

0 Lacs

hyderabad, telangana

On-site

You will be responsible for executing block level P&R and Timing closure activities, including owning up block level P&R and performing Netlist2GDS on blocks. You will work on the implementation of multimillion gate SoC designs in cutting edge process technologies such as 28nm, 16nm, 14nm, and below. Your role will require strong hands-on expertise in physical design aspects like Synthesis, Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning, Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal Integrity Analysis, Physical Verification (DRC, ERC, LVS), DFM, and ...

Posted 3 months ago

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