QS & Estimation (Finishes) Engineer Adani Realty

3.0 - 7.0 years

0 Lacs

maharashtra

On-site

As a Quantity Surveyor, your main responsibilities will include leading and managing the quantity surveying and estimation activities for finishes in construction projects. This involves preparing detailed cost estimates, budgets, and bill of quantities based on project requirements. You will be expected to conduct thorough cost analysis and value engineering to optimize project costs. Collaboration with cross-functional teams including architects, engineers, and contractors is essential to ensure accurate project costing. Your role will also involve reviewing and analyzing tender documents, contracts, and variations to assess cost implications. Monitoring project progress and costs to identify potential risks and deviations from the budget is crucial. Providing regular reports and updates on project costing and budget status to senior management will be part of your routine tasks. It is important to ensure compliance with relevant industry standards, regulations, and quality requirements. In addition to your day-to-day responsibilities, you will be encouraged to continuously seek opportunities for process improvement and cost optimization in quantity surveying and estimation. To excel in this role, you are required to have a Bachelor's degree in Civil Engineering, Quantity Surveying, or a related field. A Master's degree or additional certifications in Quantity Surveying or Cost Management would be considered a plus.,

Posted 3 weeks ago

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Physical Design Engineer/Lead SoCtronics

5.0 - 10.0 years

0 Lacs

hyderabad, telangana

On-site

You will be responsible for executing block level P&R and Timing closure activities, including owning up block level P&R and performing Netlist2GDS on blocks. You will work on the implementation of multimillion gate SoC designs in cutting edge process technologies such as 28nm, 16nm, 14nm, and below. Your role will require strong hands-on expertise in physical design aspects like Synthesis, Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning, Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal Integrity Analysis, Physical Verification (DRC, ERC, LVS), DFM, and DFY, and Tapeout. You should have expertise in analyzing and converging on crosstalk delay, noise glitch, and electrical rules in deep submicron processes, along with an understanding of process variation effects. Experience in variations analysis/modeling techniques and convergence mechanisms would be a plus. Proficiency in Synopsys ICC2 and PrimeTime physical design tools is essential for this role. Additionally, skill and experience in scripting using Tcl or Perl are highly desirable. Qualifications required for this position include a BE/BTech or ME/MTech degree with a specialization in the VLSI domain. The ideal candidate should have 5-10 years of relevant experience in the field.,

Posted 1 month ago

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