58 Uvm Methodology Jobs - Page 3

As a Design Verification Engineer with over 5 years of experience, particularly in HBM & DDR DRAM IP and Subsystem verification, you will be an integral part of our innovative team. Your role will involve developing and executing verification plans, creating testbenches, and collaborating with design engineers to ensure high-quality and robust designs. Your responsibilities will include developing comprehensive verification plans for HBM4/4e IP and Subsystem, creating and maintaining testbenches using System Verilog and UVM methodology, performing functional verification of RTL designs, and resolving design and verification issues. You will also generate verification metrics, participate in ...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Product Engineer Location: Bangalore Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the worlds most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industria...

As a Principal Engineer - ASIC Verification at Micron Technology, you will be an integral part of a highly skilled ASIC Team working on cutting-edge technology nodes. Your primary responsibility will be to lead the IP verification process, from creating test plans to achieving signoff. You will play a crucial role in ensuring the first-pass product through comprehensive verification coverage, including mixed-mode verification. Additionally, you will be involved in mentoring and coaching junior team members and collaborating with domain specialists globally on core technical initiatives. To excel in this role, you should possess a good understanding of DDR-PHY, LPDDR5/DDR4/5/HBM protocols and...

As a SOC Verification Engineer at Mirafra Technologies in Hyderabad, you will be responsible for performing System-level RTL verification, including FWHW coverification, SoC boot-flow, and integration-level validation. Your tasks will involve developing and verifying post-silicon validation sequences using C/C++, building and enhancing methodology-driven UVM testbenches, and collaborating on comprehensive test-plan development. You are expected to demonstrate solid expertise in Verilog, SystemVerilog, and C/C++, along with a strong working knowledge of the JTAG protocol. To excel in this role, you should have a strong background in SoC/Integration-level verification, ideally with UVM methodo...

As a Senior Design Verification Engineer, you will be responsible for designing and implementing UVM-based testbenches from scratch and playing a crucial role in the successful tapeouts of multiple projects. Your expertise in functional verification using SystemVerilog and UVM will be essential in owning verification deliverables end-to-end. Your experience should demonstrate a strong command over SystemVerilog and UVM methodology, coupled with a solid understanding of SoC/ASIC architecture and the verification lifecycle. You will be expected to write testbenches, develop stimulus, checkers, monitors, and scoreboards, and utilize simulation tools like VCS and Questa for debugging purposes. I...

Job responsibilities: (edit as per the requirement) Leads projects with high resource, risk and/or complexity Develops and leads large and multiple cross-functional and cross-organizational programs, initiatives, and activities with high resource requirements, risk and/or complexity Continually evaluates technology effectiveness/data interoperability of complex systems Manages issue resolution with vendors on tech/product quality and functionality and influences vendor roadmap and direction of products Communicates highly-complex ideas, anticipates potential objections and persuades others, often at senior levels, to adopt a different point of view. Experience and Technical Skills required (...

Leads projects with high resource, risk and/or complexity Develops and leads large and multiple cross-functional and cross-organizational programs, initiatives, and activities with high resource requirements, risk and/or complexity Continually evaluates technology effectiveness/data interoperability of complex systems Manages issue resolution with vendors on tech/product quality and functionality and influences vendor roadmap and direction of products Communicates highly-complex ideas, anticipates potential objections and persuades others, often at senior levels, to adopt a different point of view. Experience and Technical Skills required (edit as per the requirement): At least 7+ to 12 year...

You Are: A highly-skilled ASIC Digital Verification Engineer with a passion for developing functional verification solutions for RTL based IP Cores You are experienced in handling complex protocols and thrive in a collaborative international environment With over 15 years of experience, you possess a deep understanding of verification methodologies and are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM) You are adept at making architectural decisions, implementing test benches, and driving innovation in verification solutions You are a proactive team player with excellent communication and problem-solving skills, ready to contribute to cutting-edge projects in A...