2115 Uvm Jobs - Page 45

Role & responsibilities Strong verification expertise using Verilog and SystemVerilog, with solid understanding of UVM methodology and hands-on experience writing test-benches. Proficient in debugging testcases and verifying processor-based subsystems. Knowledge of AMBA protocols (AXI, AHB, APB) is a plus. Exposure to Arm-based SoCs and strong grasp of digital design fundamentals. Experience with scripting in Perl, TCL, Make, and Shell.

SOURCERIGHT TECHNOLOGIES (INDIA) PRIVATE LIMITED is looking for Design Verification, Pcie, SV, UVM, Ethernet (SI412FI RM 3403) to join our dynamic team and embark on a rewarding career journey Collaborate with cross-functional teams to achieve strategic outcomes Apply subject expertise to support operations, planning, and decision-making Utilize tools, analytics, or platforms relevant to the job domain Ensure compliance with policies while improving efficiency and outcomes

NVIDIA has been transforming computer graphics, PC Gaming, and accelerated computing for more than 25 years. It s a unique legacy of innovation that s motivated by great technology and amazing people. Today, we are tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what s never been done before takes vision, innovation, and the world s best talent. As an NVIDIAN, you ll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. The HWPM Team at NVIDIA is seeking an excellent ASIC Senior Verification E...

We are looking for a seasoned Senior Design Verification Engineer with 8+ years of experience in verifying complex digital IPs and SoCs. The ideal candidate will have strong expertise in developing UVM-based verification environments and driving functional coverage closure. Key Responsibilities: Develop and maintain constrained-random and directed testbenches using System Verilog/UVM Define verification plans and test strategies based on specifications Write test cases, checkers, and functional coverage models Perform RTL simulations, debug failures, and ensure coverage closure Collaborate with RTL, DV, and firmware teams across verification lifecycle Support gate-level simulation, regressio...

NVIDIA has been redefining computer graphics, PC Gaming, and accelerated computing for more than 25 years. It s a unique legacy of innovation that s motivated by phenomenal technology and outstanding people. Today, we are tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what s never been done before takes vision, innovation, and the world s best talent. As an NVIDIAN, you ll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. The HWPM Team at NVIDIA is seeking an excellent ASIC Verification E...

Design and development of processor L2 , L3, Non cacheable units and LLC (Last Level Cache) for high-performance IBM Systems. - Design and architect L2 cache and LLC as driven by capacity, latency, bandwidth, and RAS requirements. - Develop the features, present the proposed architecture in the High level design discussions - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in...

Your Role and Responsibilities Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validatio...

Your Role and Responsibilities Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global fo...

As a Formal verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Develop skills in IBM Formal verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 – 10 years of relevant industry experience Proven experience in Formal/Functional Verification - Demonstrated execution experience of verification of logic blocks verification. Knowledge of formal me...

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL/Test Pervassive Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high p...

Role & responsibilities Core Requirements Basic understanding of CMOS and gate level circuit designs Familiarity with SPICE Familiarity with Verilog simulations Good communication skills and ability to work well in a team Preferred Qualities Analytical capability for complex gate level circuit designs Experience in SystemVerilog, PLI coding Experience in UVM Test Bench Experience in DRAM, SRAM or other memory related fields Experience Level 5+ years Preferred candidate profile

Roles and Responsibilities 8yrs yrs of Experience in developing TB & TB components for block level and full chip level verification. Experience in creating Test plan, writing Test cases Proficient in System Verilog Verilog Proficient in writing Assertions UVM based Methodology with strong understanding of OOPS concepts Good knowledge of Digital Fundamentals Good knowledge of Scripting (Perl, Shell), C language Familiar with different aspects of IP development: micro-architecture, RTL & TB implementation, Test plan, Functional coverage, Code coverage and regression Strong Simulation & Debugging skills Strong analytical skills with attention to detail Excellent written & verbal communications ...

As a Sr. Verification Engineer specializing in SOC Verification, you will be a valuable member of the SmartSoC team, contributing your expertise to intricate SOC Verification projects. Your responsibilities will entail the technical execution of SOC Verification projects for complex ARM-based SOCs. This involves tasks such as Test Planning, Environment Architecture, and creating SV-UVM environments to ensure the successful verification of SOC designs. To excel in this role, you should possess 3 to 10 years of experience in Design Verification, coupled with excellent Communication and Presentation Skills. Your proficiency in SOC Verification is crucial, along with your expertise in Verificati...

As a Design Verification Engineer at our Hyderabad location, you will be responsible for verifying the design of industry-leading products, such as Graphics DDR7. With 5-7 years of experience in SV, UVM, Test Bench Development, Soc, Full-chip verification, and memory experience, you will play a crucial role in ensuring the quality and reliability of our products. Your primary responsibilities will include Verilog simulation, UVM methodology implementation, and full-chip verification. Familiarity with memory interfaces is highly preferred. Additionally, you will have the opportunity to work on projects involving GLS, STA, Python knowledge, and circuit characterization. We are looking for some...

The ideal candidate for the position should be a self-motivated and multi-tasker, with a demonstrated ability to work well in a team setting. As part of the team at Centum T&S, you will be responsible for delivering assigned tasks with a focus on quality. Your role will involve interacting with cross-functional teams to resolve any issues that arise. Strong communication skills and leadership qualities are essential as you collaborate with global stakeholders and report to the Project Manager. Your responsibilities will include working on cutting-edge FPGA-based verification environments that encompass System Verilog (SV) and Universal Verification Methodology (UVM). You will need expertise ...

As a VLSI Mentor / Guest Faculty specializing in Advanced Digital Systems & Low Power Design at Spandsons Horizon Engineering, you play a crucial role in guiding 5th, 6th, and 7th-semester B.E./B.Tech students in advanced VLSI concepts and practical applications. This contract role, based in Salem, offers a unique opportunity to directly influence the academic and career growth of 60 aspiring engineers. Your key responsibilities include delivering engaging sessions covering topics such as Advanced Digital System Design with Verilog HDL and Low Power VLSI Design. You will also provide hands-on guidance for lab assignments and projects using various tools like Xilinx Vivado, ModelSim, LTspice,...

If you are passionate about pushing the boundaries of Design technology and thrive in a collaborative, dynamic environment, we invite you to join our team as a Design Engineer. Join us to be part of our journey in shaping the future of SoC design and innovation. Responsibilities As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team integrating IP and developing logic for SoCs. You will work with the project team to understand and review the architecture and develop the design specifications. Your key responsibilities will include writing micro-architecture specifications, developing the RTL, fixing bugs and running various design checks. You will wo...

We are hiring 8+ years of hands-on DV experience in System Verilog/UVM.

Job Description Key Responsibilities: Define and implement verification strategies and test plans for DDR memory interface designs. Develop UVM/System Verilog-based testbenches and reusable verification components. Perform protocol-level verification for DDR memory interfaces and validate compliance. Collaborate with architecture, RTL, and system teams to understand design intent and corner cases. Own functional coverage, regression setup, and closure. Integrate DDR models, controllers, PHYs , and validate their interactions. Required Skills: 6-10 years of hands-on experience in ASIC/IP/SoC verification . Strong expertise in SystemVerilog, UVM, and functional coverage methodology . In-depth ...

Job Requirements Key Responsibilities: Execute floorplanning, power planning, placement, CTS, routing, DRC/LVS, and timing closure for blocks/subsystems. Work on multi-voltage designs using UPF, level shifters, isolation cells, and retention strategies. Perform timing analysis and closure using PrimeTime and support IR/EM/Noise closure under guidance. Collaborate with DFT/RTL/STA teams to resolve integration and physical challenges. Run power optimization techniques at synthesis and post-route stage. Support subsystem-level integration and participate in debug and convergence discussions. Write scripts (Python, Tcl) for flow automation, data mining, and report generation. Required Skills: Ha...

We are looking for experienced FPGA Verification Engineer. As a FPGA Verification Engineer, you will work for a high complexity DWDM equipment for LH/ULH applications. You will work in close collaboration with multi location cross-functional R & D teams. Our work includes everything from product concept to finished product - a process that spans over the entire development cycle. The team takes full responsibility for delivery on time with the right quality. As an FPGA Verification engineer, you will be responsible for designing verification plan, developing environment/testbench, creating test scenarios for running simulations, coverage analysis and lab support during board bring up to ensu...

CPU Verification Engineer THE ROLE : We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor , you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The V erification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engine...

Hiring Now: Design Verification Engineers (Multiple Openings) Locations: Bangalore & Pune Experience: 4+ to 18 Years Notice Period: Immediate to 30 Days Email: prabhu.p@acldigital.com WhatsApp: 8754387484 Current Openings 1 Senior Design Verification Engineer 10+ Years (Bangalore) – 1 Position Strong expertise in SystemVerilog (SV) and UVM-based verification Mandatory : Experience with ARM Coresight Debug subsystem Strong debugging and problem-solving skills 2 Design Verification Engineer – 5+ Years (Bangalore) – 2 Positions Proficient in SystemVerilog (SV) and UVM Preferred : ARM Coresight Debug subsystem knowledge Strong debugging expertise required 3 Design Verification Engineer – 8+ Year...

Hi, Greetings from Thales India Pvt Ltd.....! We are hiring for Technical Lead - Design Verification (SV UVM) for our Engineering competency center for Bangalore location. Thales India Engineering Competency Center in Bangalore is seeking Technical Lead /Senior Technical Lead role to be part of AVS/FLX FPGA design and development team. In this role, you will be responsible for FPGA Validation & Verification for Avionics products and solutions. Responsibilities includes development of Test strategy, Virtual Verification Procedures, Test bench, BFMs, Monitors, Checkers & Virtual Verification Report as per DO254 guidelines. Qualifications: B.Tech/B.E or Masters in Electronics & Communication or...

Roles & Responsibilities: Be part of a team to verify or emulate/prototype complex system on a chip designs. Interact with design engineers to identify important verification scenarios. RTL Design / porting of ASIC RTL targeting FPGA prototyping and emulation platforms, such as Synopsys ZEBU, Cadence Palladium or Siemens Veloce Synthesis, PNR and timing analysis of RTL on industry standard prototyping and emulation platforms Qualification, Experience & Skills desired: Bachelor's degree in Electrical/Electronics Engineering with 5+ years of relevant experience, or masters degree in Electrical Engineering Skilled in FPGA design techniques, RTL Design, tools and processes. Minimum 5 years and a...