2109 Uvm Jobs - Page 39

Starting business in a new village a. Village identification within the radiusb. Feasibility study of the village based on demographics, activities and financial needs ofthe customersc. Assist the MC-IC in making the village approval Sourcing of business a. Identification of customers and forming of Joint Liability Groupsb. Filling up of the application formc. Verification of the residence and business of the customerd. KYC verificatione. Pre-disbursement trainingf. Visiting potential customers in order to develop business Disbursements a. Collection of KYC documentsb. Assisting the MC-IC for disbursement activity completionc. Loan documentation Collection of current dues a. Collect the coll...

Starting business in a new village a. Village identification within the radiusb. Feasibility study of the village based on demographics, activities and financial needs ofthe customersc. Assist the MC-IC in making the village approval Sourcing of businessa. Identification of customers and forming of Joint Liability Groupsb. Filling up of the application formc. Verification of the residence and business of the customerd. KYC verificatione. Pre-disbursement trainingf. Visiting potential customers in order to develop business Disbursements a. Collection of KYC documentsb. Assisting the MC-IC for disbursement activity completionc. Loan documentation Collection of current duesa. Collect the collec...

This Position reports to: Senior Designer Your role and responsibilities In this role, you will have the opportunity to create and modify the standard designs of equipment, systems, or installations, including standard specifications for manufacturing, fabrication, or construction, using standard design concepts. Each day, you will design engineering solutions, including drawings and calculations according to contract specifications. You will also showcase your expertise by contributing to design reviews and design verification and modifying the design, as necessary. The work model for the role is: #LI-Onsite This role is contributing to the Electrification business in Distribution Solutions...

Performs functional logic verification of an FPGA to ensure design will meet specification requirements Develops FPGA verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications Executes verification plans and defines and runs system simulation models to verify the FPGA design, analyze power and timing, and uncover bugs Replicates, root causes, and debugs issues in the pre-silicon environment Finds and implements corrective measures to resolve failing tests Collaborates with FPGA architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features May als...

Skills/Experience: Extensive experience in IP/SOC Verification. Must be proficient in System Verilog and UVM. Must have hands-on experience in the verification of the IP protocols such as PCIe/DDR/USB/Ethernet/CXL/HDMI/MIPI/DSI/CS/GLS/CPU Verification or any other high-speed protocols. Experience with scripting language (Python, Perl, TCL etc.) Experience in assembly language or C is a plus. Ability to create testbenches from scratch and own the complete verification including coverage of the subsystem/chip level. Strong debugging capabilities. Experience (years) : 3 - 12 Years Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent

Skills/Experience: Proficient in Scan, specializing in ATPG and Pattern verification at Block and Full chip level. Skilled in Scan insertion, ATPG, DRC analysis, Low Coverage Analysis, JTAG and IJTAG. Experienced in scripting for flow automation, using Siemens tools (Tessent), Synopsys tools (DFTMAX, Tetra MAX, VCS, DFT Compiler), Verdi. Familiar with tools: NC-SIM/Irun, Sim-Vision, XCELIUM. Experience (years) : 3+ Year Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent

Experience with STA using Primetime and PTPX required Proficient in constraint generation. Experience of multiple power domain implementation with complex UPF/CPF definition required Formal verification experience (Formality/Conformal) Perl/Tcl scripting is required Strong problem solving and ASIC development/debugging skills. Experience with CPU micro-architecture and their critical path. Low power implementation techniques experience. High speed CPU implementation. Place and route tool experience. Constraint management tool and Verilog coding experience Experience (years) : 3+ Year Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent

We make real what matters. This is your role. Questa verification IPs help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will get along with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We dont need superheroes, just super minds. You're an Electronics Engineer (B.Tech/ M.Tech) or related field from a reputed institute You've got phenomenal knowledge of verification engineering and have ...

Role & responsibilities : Lead /manage SoC/IP/Package-level verification projects, ensuring quality and timely delivery. Architect and drive UVM-based verification environments and methodologies. Define verification strategies, develop test plans, and ensure signoff criteria (functional & code coverage, power analysis, GLS) are met. Collaborate cross-functionally with design, DFT, physical design, and software teams to ensure robust verification coverage and silicon success. Manage team deliverables, mentor junior engineers, and provide technical guidance. Interface with stakeholders for project scoping, scheduling, and resource allocation. Drive silicon debug, pattern verification, and post...

Skills/Experience: Create emulation models from RTL / Netlist. Expertise in mapping designs to Zebu/Palladium/Haps emulation, improving model performance. Knowledge of the Palladium flow and experience in migrating design on Palladium. Good knowledge of runtime and debug skills. Identifying signals and taking wave dumps on palladium platforms and analyse the failures. Exposure to ARM/ARC cores and its architecture Exposure to AMBA bus architectures like AXI/AHB/APB Exposure to bug tracking tools like Jira and version control tools like Github, Bitbucket, GIT Exposure to Flash(NAND) and HDD(Hard disk) like storage technologies. Experience with Palladium like emulation platforms(Veloce or Zebu...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Skills/Experience: Good Experience with Xilinx FPGA. Should be well aware of RTL logic. Well versed with Vivado tool and associated IP Well versed with LUT considerations in FPGA design Well versed with FPGA simulation and testing methods Well versed with FPGA debug using Xilinx JTAG debugger Experience (years) : 3 - 12 Years Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent

Skills/Experience: Strong design fundamentals with hands-on experience in front-end design flows Hands-on experience in design of micro-architecture blocks, RTL coding, block-level verification. Hands-on experience in Linting, CDC analysis of reports, identify ways to fix the violations Hands-on experience in SoC/IP integration Excellent understanding of SoC components like processors, memories, peripherals, IOs Good understanding of at-least one of the protocols like UFS/PCIe/SAS/SATA/USB Experience of working with ARM or ARC (Synopsys) processors/sub-systems Experience of UPF flow, updating constraints Ability to work independently, ramp-up quickly and work with verification/validation tea...

We are seeking an exceptional Senior ASIC Verification Engineer to join our innovative semiconductor team. You will lead verification initiatives for complex ASIC designs and drive technical excellence across projects. About the Role : You will be responsible for developing advanced verification environments, leading cross-functional technical initiatives, and mentoring team members while ensuring the highest quality standards in our ASIC designs. What You'll Do : - Design and implement advanced System Verilog/UVM verification infrastructures - Lead verification planning and execution for complex ASIC projects - Develop comprehensive test strategies ensuring thorough design validation - Driv...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC ver...

Developing emulation solutions for PCIe, CXL, and UCIe protocols for semiconductor customers. Engaging in software development using C/C++ and synthesizable RTL development with Verilog. Verifying solutions to ensure high performance and reliability. Interacting with customers during the deployment and debug phases to ensure smooth i mplementation. Collaborating with cross-function al teams to integrate emulation solutions. Maintaining and enhancing existing emulation solutions to meet evolving industry standards. The Impact You Will Have: Driving the development of advanced emulation solutions that meet industry standards. Enhancing the performance and reliability of semiconductor products ...

We are seeking a highly motivated and experienced Senior Staff SoC/MCU Verification Engineer to join our team. In this role, you will contribute to the verification of complex System-on-Chip (SoC/MCU) designs, ensuring functionality, performance, and quality meet project and customer specifications. This position requires expertise in advanced verification methodologies, formal verification, strong technical leadership, and excellent problem-solving skills. Staff Engineer, DV We are seeking a highly motivated and experienced Staff SoC/MCU Design Verification Engineer to join our team. In this role, you will contribute to the verification of complex System-on-Chip (SoC/MCU) designs, ensuring ...

Design Verification Engineer | CMAA Advisors | Careers Architect, develop, and maintain System Verilog UVM-based testbenches for Bluetooth controller IP/subsystems, including PHY/MAC/LL layers. Create comprehensive verification plans covering all Bluetooth protocol layers and custom enhancements. Verify hardware blocks implementing: Bluetooth Link Layer (LL) Baseband Controller (BBC) Adaptive Frequency Hopping (AFH) LE Advertising and Scanning HCI (Host Controller Interface) AES-CCM encryption/decryption Bluetooth Low Energy PHY (1M, 2M, Coded PHY) Develop assertions, checkers, and scoreboards for protocol compliance and functional Drive debug efforts using tools like Verdi/DVE and perform r...

Strong fundamental knowledge of DFT techniques including JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IJTAG. and MBIST/LBIST. Experience in Tessent based ATPG flow, GLS and Post-silicon-debug. Hands-on in Perl/Tcl/Python scripting. Excellent analytical, and problem-solving skills. Perform Core and SOC level ATPG to meet Automotive grade quality. Hierarchical ATPG retargeting and Pattern release for application on ATE. Perform SOC and Core level Timing/Non-timing GLS. Silicon bring-up, diagnosis and support for physical failure analysis. Enable Emulation of Gate level SCAN patterns. Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering o...

Lead the Architecture, Design and development of processor MMU (Memory management unit) for high- performance IBM Systems. - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the MMU feature enhancements. - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature Required education Bachelor's Degree Preferred education Mas...

End-to-end design and development of features for IBM high performance Mainframe and POWER processors and ASICs. Develop the feature, present the proposed architecture in the High level design discussions Estimate the overall effort to develop the feature Develop micro-architecture, Design RTL, Collaborate with the Verification, Physical design, FW teams to develop the feature Pre Silicon: Signoff the Design that meets all the functional, area and timing goals Post Silicon: Bringup and Validate the hardware functionality Required education Bachelor's Degree Required technical and professional expertise 1 to 3 years of professional experience Experience with HDLs- VHDL/ Verilog Understand and...

Role Overview As a Senior/Lead Design Verification Engineer , you will own verification strategy and execution for high-complexity IP and SoC designs. You will be responsible for planning, leading teams, defining testbench architecture, and ensuring coverage-driven closure. Key Responsibilities Define and drive the verification plan based on design specifications and functional requirements. Architect and develop reusable UVM/SystemVerilog-based testbenches. Own IP/SoC-level functional verification from test planning to coverage closure. Work closely with RTL, DFT, and firmware teams for seamless integration and debug. Guide and mentor junior engineers; conduct reviews and knowledge sessions...

Job Overview We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs. Job Description Lead and manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MI...

We are looking for an experienced SoC Level Verification Engineer with 7+ years of relevant experience. Key Responsibilities: Perform SoC level verification using C + UVM based test cases Write test cases and debug for ARM M-core Debugging using disassembly, tarmac, and waveform Work with Cadence and Synopsys VIP for SoC level validation Handle DMA, Interrupts, Cache, and Interconnect verification Work on peripheral protocols (SPI, I2C, I3C, CAN, LIN preferred) Required Skills: Strong ARM M-core experience SoC level verification expertise Hands-on with UVM test benches and C programming Strong knowledge of AHB, APB protocols Familiar with Cadence simulator, Simvision, and debugging tools