2082 Uvm Jobs - Page 22

About The Role Your Role As a SoC GLS Verification Engineer , you will play a key role in verifying complex SoC designs through Gate-Level Simulation (GLS). You will work closely with design and verification teams to ensure functional correctness, timing accuracy, and overall quality of silicon-ready designs. Your expertise in GLS methodologies and debugging will be critical in delivering high-performance, reliable SoCs. In this role, you will: Perform GLS using Zero Delay , SDF , and Post-Layout GLS (PAGLS) techniques. Debug and resolve issues in gate-level simulations to ensure timing and functional correctness. Develop and maintain SystemVerilog/UVM testbenches for GLS environments. Colla...

About The Role This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; About The Role - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in ...

Division: Artificial Intelligence Solutions Employment Status: Exempt Salary Grade: 108 Shift Requisition ID: 75816 Please be aware that if you are selected to formally interview for an internal position you will be required to notify your current manager. Please refer to the Employee Transfers Guidelines posted on Skylink. Responsibilities Digital design specification, design, analysis, and HDL (Verilog) coding Behavioral modeling of analog and mixed signal circuits Digital back-end: synthesis, physical implementation (prep for P&R), static timing, scan insertion, etc. Verification of digital sub-systems, mixed-signal sub-systems, and the entire chip using a combination of digital models/RT...

UVM/OVM Verification Engineer Job Title: UVM/OVM Verification Engineer Experience: 2-5 years Education: B.Tech/M.Tech in ECE/EE/VLSI Responsibilities: Build reusable verification environments in UVM or OVM Develop and maintain sequences, monitors, and scoreboards Ensure comprehensive coverage (code + functional) Debug and support regression failures Requirements: Hands-on experience with UVM/OVM methodologies Good debugging skills with waveforms and logs Experience with version control (Git, Perforce)

Functional Verification Engineer Job Title: Functional Verification Engineer Experience: 2-5 years Education: B.Tech/M.Tech in ECE/EE Responsibilities: Develop directed/random testcases for verifying functional specs Use UVM-based testbenches for simulation Identify corner cases and achieve high coverage metrics Participate in verification planning and reviews Requirements: Deep understanding of SoC/IP-level functional verification Proficient in UVM, System Verilog, and scripting Familiarity with assertion-based verification (SVA)

RTL Verification Engineer Job Title: RTL Verification Engineer Experience: 0-3 years Education: B.E/B.Tech/M.Tech in ECE or related field Responsibilities: Develop testbenches in System Verilog Write and execute testcases for RTL validation Perform code coverage and functional coverage analysis Debug simulation failures and regressions Requirements: Good knowledge of Verilog/System Verilog Basic understanding of UVM and testbench architecture Experience with simulation tools like VCS or Questa

Develop and maintain formal equivalence checking flows using Synopsys Formality. Collaborate with cross-functional teams to align verification methodology with design goals. Implement and support Formality ECO flows for incremental synthesis. Drive methodology improvements for SoC design verification. Coordinate with internal stakeholders and external vendors to deliver high-quality solutions. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or VLSI Design. 5–8 years of hands-on experience with Synopsys Formality or similar tools (e.g., Cadence Con...

4+ years of experience in System Verilog & UVM. Expertise in any one of the industry standard protocol like PCIe, Ethernet, DDR, USB, UCIe, AXI etc.

Team leadership with technical guidance and tracking and Verification planning; Verification test bench development, tuning and implementation. Development of verification test bench components such as drivers, monitors, response checkers as well as use most advanced UVM VIPs. Development of direct and constrained-random stimulus using c ,SV. Understands and analyzes RTL code, functional, assertion coverage results. Understands Develop functional coverage. Understands and develops system Verilog assertions. Understands and implements formal verification methods; Strong skills in debug, failure re-creation and root cause analysis. Applicant should have efficient debugging and logic skills. Jo...

Evaluate and deploy the evolving verification methodologies to handle increasingly complex IP/SubSystem designs within aggressive, market-driven schedules. Own and ensure quality adherence during all stages of the project cycle. Ability to carry out a thorough analysis of existing processes, recommend and implement process improvements to ensure Zero Defect IPs/SubSystems. Building and Influencing technological innovations for self and in team environment . Hands on and ability to work well as part of a team both locally, and with remote or multi-site teams. Key Skills Self starter with 10-15 years of experience on IP / Sub-system verification on multimillion Gate and complex Design with mul...

Own and drive Roadmaps for complete IP / Subsystem domains portfolio within global RD team. Perform benchmarks against other industry players and ensure differentiating features for our customer with high level of innovation. Architect and Design complex IP and Subsystems across a range of protocols required for Edge processing and Automotive Self Driving Vehicles, In-Vehicle experience, Gateway Systems, Fail Safe Subsystems (ASIL-D) etc. Own, Lead an Drive IP / Subsystem from Concept till IP Design and Development achieving final design performance in integrated system within aggressive, market driven schedules. Ensure quality adherence during all stages of the IP development cycle and carr...

Candidates with 1-3 Yrs expertise in SV, UVM, Verilog, DV, RTL design knowledge. Preferred VLSI Diploma course mandatory.

Role Overview: As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems for next-generation products. You will collaborate with cross-functional teams to develop cutting-edge solutions and meet performance requirements. Your responsibilities will include ownership of System Memory Management Unit (SMMU) IP test bench and collaterals for the next generation System-on-chip (SoC) across various product categories. Key Responsibilities: - Own DV test bench and associated collaterals such as Checkers, Trackers, Scoreboards, Assertion, and Functional Coverage - Develop test plans an...

Role Overview: You will be responsible for leading Emulation & FPGA prototyping and verification for complex SoCs/ASICs. This role will involve RTL/testbench development, lab bring-up, debugging, and close collaboration with design, software, and verification teams to ensure robust pre-silicon validation and hardware-software integration. Key Responsibilities: - Develop and implement verification strategies using Emulation & FPGA prototyping platforms. - Create and maintain RTL/testbenches aligned with ASIC designs. - Lead lab bring-up, debug HW/SW interactions (JTAG, UART, analyzers). - Collaborate with software/ASIC teams for seamless integration and firmware readiness. - Design architectu...

Job Title: ASIC Verification Senior Staff Engineer/ Staff ASIC Design Verification Engineer/ Lead IP Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an accomplished verification engineer with a passion for excellence and a track record of delivering robust, high-quality IP solutions. You thrive in ...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. We are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we are powering it all with the world's most advanced technol...

Job description In this role, you will be creating UVM testbenches for a SoC and IP, as well as tests, regressions, and functional coverage to achieve zero bug escapes. You will interface with the designers to develop the test plans, and from that develop testcases and coverage to thoroughly verify the RTL. Your regressions will grow to cover the full functionality of the design relative to the architectural simulator and will include corner case testing for the more challenging cases. Your test and coverage reviews will ensure key coverage. ESSENTIAL DUTIES AND RESPONSIBILITIES: Create UVM testbenches, tests, and constraints to ensure design correctness Design, develop, and maintain modular...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced verification engineer eager to make a difference at the forefront of technology. With a strong foundation in electronics and a deep understanding of System-on-Chip (SoC) verification, you thrive in collaborative environments where complex probl...

At Synopsys, we are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we are powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation and SoC Design, we want to meet you. Job Description And Requirements The role is for SoC Verification in the System Solutions Group (SSG). The role primarily requires development and implementation of System Design Solutions using Synopsys EDA tools and IP to solve customer problems as part of a service projec...

You will be joining Broadcom Central Engineering team as a Multi Skilled RTL, Verification engineer with DFT expertise. You will have the opportunity to work in domains such as RTL, Verification, and DFT for Complex Memory, IO subsystems, and Hierarchical Blocks including BIST. This role offers a great opportunity for individuals who are eager to deepen their knowledge in end-to-end Chip development flow with specialized expertise in DFT and Memory BIST, eBIST. **Key Responsibilities:** - Perform RTL development and Verification for Digital subsystems, Memory Subsystems including BIST. - Execute DFT Insertion and Verification signoff for IO, ARM-PNR, Memory Digital Subsystems utilizing Tesse...

Role Overview: You will be independently executing mid-sized customer projects in the field of VLSI Frontend, Backend, or Analog design with minimal supervision. As an individual contributor, your responsibility will include owning a task in RTL Design/Module and providing support and guidance to engineers in various areas like Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. Anticipating, diagnosing, and resolving problems by coordinating with cross-functional teams to ensure on-time quality delivery approved by the project manager and client will be crucial. Key Responsibilities: - Automate design tasks flows and write scripts to generate re...

Required Skills and Experience: 10+ years of proven experience in working on IP/Subsystem/Soc Verification Experienced in Protocol on Flash Storage device Controller with unipro and MIPI PHY. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various ...

Job Overview: We are seeking a highly skilled and motivated Design Verification Lead to join our advanced VLSI design team. The ideal candidate will have strong expertise in SystemVerilog, UVM (Universal Verification Methodology), and verification of industry-standard protocols (e.g., PCIe, USB, Ethernet, DDR, etc.). As the Design Verification Lead, you will lead the verification of complex SoC and IP designs, mentor verification engineers, and collaborate closely with design, architecture, and validation teams to deliver high-quality, robust products. Key Responsibilities: Lead the design verification efforts for complex SoC/IP projects following best practices. Develop and maintain verific...

About This Opportunity We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrow's mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport to enable communication service providers to surpass the expectations of their end-customers. At our state-of-the-art design centers, we don't just follow industry trendswe set them. By leveraging cutting-edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, you'll play a pivotal role in shaping the future of global...

About This Opportunity We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrow's mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport to enable communication service providers to surpass the expectations of their end-customers. At our state-of-the-art design centers, we don't just follow industry trendswe set them. By leveraging cutting-edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, you'll play a pivotal role in shaping the future of global...