131 Upf Jobs - Page 5

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a passionate and highly skilled engineer with a deep understanding of digital implementation and logic equivalence checking and a strong desire to lead product validation efforts Your exceptional debugging skills and proficiency in software and scripting languages such as Perl, Tcl, and Python set you apart With a keen eye for detail, you maintain high standards of product quality and excel in communication and leadership roles You thrive in collaborative environments, working closely with cross-functional teams to develop and execute comprehensive validation plans Your analytical mindset allows you to perform in-depth root cause analysis and proactively address potential issues, ensuring the readiness of products for customer deployment You are an experienced professional with a b-tech or m-tech degree and a minimum of 6-8 years of related experience, ready to make a significant impact on our Formality tool, What Youll Be Doing: Execute and lead product validation of Synopsys's Formality tool by understanding requirements specifications, functional specifications, and customer use cases Lead a team of 5 or more product validation engineers Collaborate with cross-functional teams such as R&D, Product Engineering to develop, implement, and execute comprehensive validation plans based on our technical roadmap and specifications Define and manage scope, schedule, and risks associated with the validation objectives Perform in-depth customer incoming root cause analysis to understand the product weak areas and hot spots and execute proactive testing to improving product quality Use product expertise to provide technical recommendations, identify, diagnose and troubleshoot issues, and propose solutions to ensure quality and readiness of the product/solution for customer deployment Analyze product validation data to identify trends, discrepancies, and areas for improvement Prepare detailed validation reports for presenting to multi-functional teams and management The Impact You Will Have: Ensuring the quality and reliability of Synopsys's Formality product to keep standing out as a leading LEC solution in the industry Enabling timely and successful deployment of high-performance designs for our customers Contributing to the innovation and advancement of LEC and product validation technologies Strengthening collaboration and communication across R&D, Product Engineering, and Field teams What Youll Need: Tech or equivalent and a minimum of 5 years of related experience or M Self-motivated individual with deep domain knowledge in Logic Equivalence Checking (LEC) including expertise in debugging and resolving LEC failures using Synopsyss Formality tool Experience and sound knowledge in design implementation including datapath optimization, CTS, UPF and DFT instrumentation Sound knowledge in HDL including SystemVerilog and VHDL Exceptional debugging skills Proficiency in software and scripting skills (Perl, Tcl, Python) Experience in cross-functional teamwork, driving projects and mentoring Who You Are: Details oriented with a focus on maintaining high standards of product quality Excellent communication, organizational, risk assessment/mitigation, and time management skills Ability to abstract up and communicate meaningful conclusions and define next steps Excellent communication and leadership skills The Team Youll Be A Part Of: You will be part of a dedicated product validation team for Formality, working closely with R&D, product engineering and field applications engineering teams Your team focuses on ensuring the high quality of new releases and features of Formality tool, enabling customers to accurately and timely validate their high-performance designs Together, you will tackle complex technical challenges and drive continuous improvement in our product validation processes, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process, Inclusion and Diversity are important to us Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability,

Your exceptional debugging skills and proficiency in software and scripting languages such as Perl, Tcl, and Python set you apart With a keen eye for detail, you maintain high standards of product quality and excel in communication and leadership roles You thrive in collaborative environments, working closely with cross-functional teams to develop and execute comprehensive validation plans Your analytical mindset allows you to perform in-depth root cause analysis and proactively address potential issues, ensuring the readiness of products for customer deployment You are an experienced professional with a b-tech or m-tech degree and a minimum of 6-8 years of related experience, ready to make a significant impact on our Formality tool, What Youll Be Doing: Execute and lead product validation of Synopsys's Formality tool by understanding requirements specifications, functional specifications, and customer use cases Lead a team of 5 or more product validation engineers Collaborate with cross-functional teams such as R&D, Product Engineering to develop, implement, and execute comprehensive validation plans based on our technical roadmap and specifications Define and manage scope, schedule, and risks associated with the validation objectives Perform in-depth customer incoming root cause analysis to understand the product weak areas and hot spots and execute proactive testing to improving product quality Use product expertise to provide technical recommendations, identify, diagnose and troubleshoot issues, and propose solutions to ensure quality and readiness of the product/solution for customer deployment Analyze product validation data to identify trends, discrepancies, and areas for improvement Prepare detailed validation reports for presenting to multi-functional teams and management The Impact You Will Have: Ensuring the quality and reliability of Synopsys's Formality product to keep standing out as a leading LEC solution in the industry Enabling timely and successful deployment of high-performance designs for our customers Contributing to the innovation and advancement of LEC and product validation technologies Strengthening collaboration and communication across R&D, Product Engineering, and Field teams What Youll Need: Tech or equivalent and a minimum of 8 years of related experience or M Self-motivated individual with deep domain knowledge in Logic Equivalence Checking (LEC) including expertise in debugging and resolving LEC failures using Synopsyss Formality tool Experience and sound knowledge in design implementation including datapath optimization, CTS, UPF and DFT instrumentation Sound knowledge in HDL including SystemVerilog and VHDL Exceptional debugging skills Proficiency in software and scripting skills (Perl, Tcl, Python) Experience in cross-functional teamwork, driving projects and mentoring Who You Are: Details oriented with a focus on maintaining high standards of product quality Excellent communication, organizational, risk assessment/mitigation, and time management skills Ability to abstract up and communicate meaningful conclusions and define next steps Excellent communication and leadership skills The Team Youll Be A Part Of: You will be part of a dedicated product validation team for Formality, working closely with R&D, product engineering and field applications engineering teams Your team focuses on ensuring the high quality of new releases and features of Formality tool, enabling customers to accurately and timely validate their high-performance designs Together, you will tackle complex technical challenges and drive continuous improvement in our product validation processes, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process, Inclusion and Diversity are important to us Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability,

What You ll Be Doing: Execute and lead product validation of Synopsyss Formality tool by understanding requirements specifications, functional specifications, and customer use cases Lead a team of 5 or more product validation engineers Collaborate with cross-functional teams such as R&D, Product Engineering to develop, implement, and execute comprehensive validation plans based on our technical roadmap and specifications Define and manage scope, schedule, and risks associated with the validation objectives Perform in-depth customer incoming root cause analysis to understand the product weak areas and hot spots and execute proactive testing to improving product quality Use product expertise to provide technical recommendations, identify, diagnose and troubleshoot issues, and propose solutions to ensure quality and readiness of the product/solution for customer deployment Analyze product validation data to identify trends, discrepancies, and areas for improvement Prepare detailed validation reports for presenting to multi-functional teams and management The Impact You Will Have: Ensuring the quality and reliability of Synopsyss Formality product to keep standing out as a leading LEC solution in the industry Enabling timely and successful deployment of high-performance designs for our customers Contributing to the innovation and advancement of LEC and product validation technologies Strengthening collaboration and communication across R&D, Product Engineering, and Field teams What You ll Need: B.Tech or equivalent and a minimum of 8 yearsof related experience or M.Tech or equivalent and a minimum of 6 years of related experience Self-motivated individual with deep domain knowledge in Logic Equivalence Checking (LEC) including expertise in debugging and resolving LEC failures using Synopsys s Formality tool Experience and sound knowledge in design implementation including datapath optimization, CTS, UPF and DFT instrumentation Sound knowledge in HDL including SystemVerilog and VHDL Exceptional debugging skills Proficiency in software and scripting skills (Perl, Tcl, Python) Experience in cross-functional teamwork, driving projects and mentoring Who You Are: Details oriented with a focus on maintaining high standards of product quality Excellent communication, organizational, risk assessment/mitigation, and time management skills Ability to abstract up and communicate meaningful conclusions and define next steps Excellent communication and leadership skills

Role & responsibilities Key Responsibilities : Lead and manage RTL design activities for complex ASICs, ensuring high performance and low power consumption. Integrating RTL components into System-on-Chip (SoC) designs Integrating RTL components into System-on-Chip (SoC) designs Architect and implement RTL for digital circuits (such as processors, communication systems, or custom IP cores). Mentor and guide junior RTL engineers in best practices for design, coding standards, and optimization techniques. Develop and refine RTL code in Verilog/System Verilog for ASIC development. Collaborate with cross-functional teams (Verification, Physical Design, and Software) to ensure successful integration of the ASIC design. Perform RTL design reviews, debugging, and optimization to meet design targets such as area, speed, and power. Work on creating micro-architectural specifications and ensure the design meets project requirements. Ensure designs are implemented with proper synchronization, timing constraints, and low power techniques. Participate in top-level design, integrating IP blocks, ensuring design consistency across subsystems. Drive the design flow from architecture and specifications through to implementation. Prepare and maintain technical documentation for designs and related processes. CDC, LINT and Integration expertise is expected. Required Skills & Experience : Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or related fields. 3-12 years of experience in RTL design for ASICs, with at least 3 years in a team lead role. Expertise in RTL design using Verilog or System Verilog. Solid understanding of digital design principles, including timing analysis, state machines, and pipelining. In-depth knowledge of ASIC design flow, from RTL to tape-out. Experience with EDA tools for synthesis, simulation, and timing analysis (e.g., Synopsys, Cadence). Strong debugging and problem-solving skills. Good knowledge on scripting (Python, Perl and Shell scripting) Knowledge of power, performance, and area (PPA) optimization techniques. Experience with designing for low-power, high-speed circuits is highly desirable. Excellent communication skills and the ability to work in a team environment. Preferred Skills : Experience with complex subsystems such as memory controllers, interconnects, or high-speed I/O. Prior experience working with large, cross-functional teams and managing design schedules. Experience with software tools for RTL analysis and optimization. Hands-on experience in leading ASIC projects from specification to production.

Summary Established in 2001, EnSilica is a publicly listed company (LON:ENSI), designing industry leading, application specific integrated circuit chips (ASIC), for customers ranging from start-ups to blue chip companies, in industries including: automotive, medical, space and mobile technology companies. With its head office on Milton Park, Oxfordshire, and other offices in Bristol, Sheffield, Brazil (Porto Alegre) and India (Bangalore), EnSilica currently employs more than 160 people. We are looking for a very experienced verification engineer who can not only strengthen the team through their technical expertise but also bring leadership and grow the verification business within EnSilica. You will have a good understanding of different methodologies, but particularly SystemVerilog and UVM. Faced with a new project, you will have the ability to quickly assimilate the verification challenge and help define an effective and pragmatic verification strategy and gain the support of the end-customer for the chosen approach. You will need to understand the importance of monitoring key metrics to assess progress and predict the end-point for the verification process. Responsibilities Verification specialist working on customer and internal projects often as the verification lead. Provide high-class verification support to a wide range of projects using a range of advanced verification techniques including constrained random, coverage driven, assertion-based and formal methods. You would also be responsible for the development of a comprehensive verification strategy and plan, along with the architecting and development of the complete test environment. Active participation in the verification community to drive the introduction of new and effective techniques within our business to help solve the verification challenges faced by our customers. Close working with our customers to build a strong relationship that results in repeat business. Education / Key Skills / Experience BE/ME in Electronics /Computer Science 1 group University. 15+ years experience in industry working on a variety of verification projects. Extensive knowledge of verification methodologies particularly UVM and SystemVerilog. Strong experience in the specification and implementation of verification infrastructures, test benches, models, assertions and functional tests in Verilog and SystemVerilog. Familiarity with constrained random verification methodologies, code coverage analysis and running regression tests. Strong VHDL/Verilog RTL. Very good understanding of modern verification flows and methodologies and able to influence the EnSilica one toward continuous improvement Ideally you will be familiar with both Mentor Questa and Cadence Incisive tool and ideally some exposure to low power verification using UPF based flows A good understanding of functional safety and quality processes, to achieve ISO26262 or similar standards compliances will be considered as a strong plus Personality Excellent communication and interpersonal skills. Strong and effective presentation skills, able to operate at multiple levels including senior management. Self-motivated achiever who gains satisfaction from providing excellent customer service and has a can-do attitude. Happy to take ownership of problems and provide suitable solutions. Creative problem solving. Team player. Ability to work in a dynamic environment.

You will contribute as a skilled Packet Core Specialist expert responsible for one or more key functions like Fault, Configuration, Performance, and Security. You will work independently within global guidelines, solve complex problems, and contribute to process improvements. You will also mentor and advisor, take responsibility for high-risk procedures, and collaborate with internal and external stakeholders to ensure seamless delivery of MS services. You have: 9-12 years with a bachelors degree in Telecommunications, Network Engineering, Computer Science, or a related field. Proven experience in packet core network design and planning for mobile and broadband networks, including EPC and 5G Core technologies. Expertise in packet core network elements such as MME, SGW, PGW, UPF, PCRF, and their interworking in both 4G and 5G environments. Experience with network optimization, traffic modeling, and capacity planning tools. It would be nice if you also had: Good analytical and problem-solving skills, with the ability to diagnose and resolve complex network issues. Knowledge of cloud technologies and virtualization (e.g., NFV, SDN, cloud-native 5G) is a plus. Excellent communication skills and the ability to collaborate effectively with cross-functional teams. You will lead the design and planning of packet core network architectures, including EPC (Evolved Packet Core), 5G Core, and other related technologies, ensuring scalability, security, and performance. You will perform capacity planning for packet core elements (e.g., MME, SGW, PGW, UPF) and ensure efficient resource allocation and utilization. Optimize network design to accommodate traffic growth while meeting quality of service (QoS) requirements. You will Collaborate with the implementation and operations teams to integrate new packet core components and technologies into existing networks. Oversee the testing and validation of network configurations and integrations. You will utilize traffic modeling tools and simulations to forecast future demand on the packet core network and identify potential bottlenecks or performance issues. You will design and implement security measures for packet core networks, including encryption, firewalls, and access control mechanisms, to safeguard data and ensure compliance with industry standards and regulations. You will work with vendors to select appropriate hardware, software, and technologies for packet core network infrastructure. Manage vendor relationships and ensure that vendors meet performance and delivery expectations. You will monitor packet core network performance using network management and monitoring tools. Analyze performance data to troubleshoot issues and propose solutions to optimize the network.

In this role, you will manage a team of one of Solution Area and bring thought leadership in customer engagement. Candidate will also be responsible for quality delivery and delivery project KPI tracking and adhering, manage Nokia's Internal Stake holder engagements with solution capabilities from multiple sources and technologies, build understanding and preference for Nokia products and solutions by influencing regional team decisions and strategic direction, demonstrate significant operational as well as commercial knowledge of clients' business and uses this to build credibility as well as identify sales opportunities, define new & innovative delivery model and package integrated solutions not only limited to Nokia Net's portfolio Leads training, development. You have: Bachelor's or master's degree in computer science, Software Engineering, or a related field. Around 14+ years of experience in Packet Core Projects Knowledge or experience of Packet Core EquipmentMME, S/PGW, AMF, SMF, UPF Knowledge or experience of Nokia Packet Core equipmentcMM, cMG, NRD Understanding of Technical Notes, Protocol Specs, Method of Procedure It would be nice if you also had: Linux knowledge is an advantage Basic understanding ofProject Management skill is an advantage Work in several technology areas with intermediate to advanced skill level or with one technology area at an advanced skill level. Create implementation plan and technical infrastructure documents. Work according to the Systems Integration (SI) delivery process, create test strategy and test cases. Contribute to gather customer requirements, analysis, feature specification and requirement feasibility study, contribute to migration procedures. Contribute to knowledge documentation in various tools like Sharepoint, ShareInside, Yammer, ShareNet, discussion forums. Work autonomously and effectively in a mixed environment and uses best practices and knowledge of internal or external business issues to improve products or services. Use advanced analytical skills to solve complex problems or problems that do not have routine solutions and takes a new perspective. May lead projects with manageable risks and resource requirements or small teams, handles day-to-day staff management issues, including resource management and allocation of work.

General Summary: As a SoC Power & Architecture Engineer, you will collaborate with cross-functional teams to develop and optimize power architecture for mobile SoC ASICs. Your expertise will drive low-power design techniques and power management strategies that enhance chip efficiency and performance. Skills and Experience: Required (412 years): Low power intent concepts and languages (UPF or CPF) Power estimation and reduction tools (PowerArtist, PTPX, Calypto) Power dissipation and savings techniques, including dynamic clock and voltage scaling Power analysis (leakage and dynamic) and thermal impact evaluation Power software features for optimization Voltage regulators (Buck converters, Low Dropout regulators) ASIC power grids and PCB power distribution networks Preferred / Additional Skills: Mobile baseband application processor chipset and power grid knowledge UPF-based synthesis and implementation with Design Compiler Structural low power verification tools (CLP, MVRC) Excellent written and verbal communication skills Responsibilities: Define chip and macro-level power domains Conduct system-level power modeling and mixed-signal power analysis Design power islands, power gating, and power isolation techniques Develop structural low-power design elements such as level shifters and isolation cell topologies with associated design rules Perform architectural analysis and develop digital power optimization logic, circuits, and software Collaborate with Power Management IC developers for power grid planning Create detailed architecture and implementation documentation Education and Minimum Qualifications: Required: Bachelor's degree in Computer Engineering, Electrical Engineering, or related field with 3+ years of hardware engineering experience OR Master's degree with 2+ years of hardware engineering experience OR PhD with 1+ year of hardware engineering experience Preferred: Master's degree in Computer Engineering or Electrical Engineering

Expertise in AMBA protocols (CHI/AXI/AHB) Excellent analytical skills, should have an experience of leading a team of 7-8 engineers Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Handson experience of GLS and timing simulations Exposure to Formal verification Self-driven and motivated to work in a high pressure environment Good at stakeholder management with good communication skills Minimum Qualifications: Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Qualcomm is not responsible for any fees related to unsolicitedresumes/applications.

Greetings from Quest Global Please find the details and kindly send me your Profile . RTL Design 10-15 Years Location : Bangalore/Hyderabad 1. Should have worked on ASIC/SOC projects using 22nm or smaller technology node 2. Expertise in automated RTL Integration using any of the industry standard tool/EDA flow 3. Expertise in SDC and UPF constraints development and checking 4. Expertise in Timing violation debug/fix at netlist level 5. Good knowledge on AHB/AXI/APB/PIPE interface 6. Expertise in Lint, CDC and VCLP, Synthesis, LEC 7. Very Strong in Python and TCL scripting • Nice to have skills: 8. Exposure to PCIe/Ucie 9. Experience in Leading small rtl design team • Location: Bangalore and Hyderabad • Notice period: max 45 days Please forward your updated profile to chakradhar.marupuru@quest-global.com below details Current CTC : Expected CTC: Notice Period : Best Regards Chakradhar M , Email:chakradhar.marupuru@quest-global.com | www.quest-global.com. Assistant Manager Quest Global Whatsapp No : 99869 21214 , Mob: +601 736 16576 Quest Global, Penang – Mayang. Unit 1.13-17 GBS@Mayang , Lengkok Mayang Pasir, Bayan Baru 11950,Penang, Malaysia

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Requirements Looking for a highly talented and a technically strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation domain for Display Sub-System. Able to handle multiple project execution that are time critical and complex Able to communicate effectively with all stakeholders across the organization Able to collaborate with cross functional teams for upholding the best practices and enabling smooth execution Focus on improving execution efficiency and improve on the optimizations in area, power and performance. Able to grow the team in terms of technical depth and size as we do more and more projects Able to innovate and bring fresh ideas Bachelors or masters degree in engineering with 9-13+ Years of experience. Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Responsibilities include Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation. Development of signoff quality constraints and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script development in addition to running/analyzing/debugging designs. Hands on with Synopsys DCG/Genus/Fusion Compiler. Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains. Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development Experience with either RTL development or Physical Design is also a plus 13+ Years experience Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5+ Year of industry experiences in the following areas Expertise in Synthesis - Synopsys Design Compiler, DCG/DC_NXT/Fusion Compiler and/or Cadence RC/Genus. o"ƒHands on with multi-voltage, power aware synthesis, UPF flows in synthesis and low power designs. o"ƒExpertise in formal verification with Cadence LEC/ Synopsys Formality o"ƒExpertise in writing and debugging timing constraints o"ƒPerl and/or TCL scripting, makefile flows. Qualcomm's compute sub system engineers will work on next generation low power, machine Learning sub-system for our system-on-chip (SoC) products used in Smartphone, Automotive and other low power devices. Become a key member of the core team developing fastest smartphone SoC devices implemented on the latest cutting-edge process technologies. In this role candidate will be responsible for compute sub system implementation that includes Physically aware Synthesis -DCG/Fusion Compiler/Genus. In addition, he/she will perform tasks toward constraints development, clock definitions, timing analysis, UPF, CLP check, Formal Verification and ECO flow. He/She will be working closely with physical Design team to optimize designs for power, area, and performance. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. General Summary As a key member of our team at Qualcomm, you will lead PreSilicon PPA optimization and convergence risk assessment for multiple high-impact projects from initial product planning to final tapeout. You will collaborate with cross-functional teams to develop innovative solutions to meet PPA requirements. Key Responsibilities - Expertise in Netlist2GDSFloorplan, place and route (PnR), and sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations. - Hands-on experience with SOC Floorplan across multiple SOC projects, technology nodes, and Tool & flows. - Achieving ambitious Power, Performance, and Area (PPA) requirements for complex SoCs. - Experience in low power design implementation, including Unified Power Format (UPF), multi-voltage domains, and power gating. - Strong understanding of circuit design, device physics, and deep sub-micron technology. - Proficiency in automation to drive PPA improvements. - Proven experience in managing complex SoC and subsystems. - Managing and leading a small team for project execution and PPA targets. Minimum Qualifications - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 12+ years of Hardware Engineering or related work experience. OR - Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 10+ years of Hardware Engineering or related work experience. OR - PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. Preferred Qualifications - Proven hands-on experience in managing complex SoCs and subsystems. - Experience working on multiple technology nodes in advanced processes Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

JD Must have skills. Payment Domain Expertise, MUST - Knowledge on MT and MX Message, Basics of SQL, and Java Specific skillset on MTS and UPF knowledge. Payment domain expertise, knowledge on MT and MX messages - Grade Specific JD Must have skills. Payment Domain Expertise, MUST - Knowledge on MT and MX Message, Basics of SQL, and Java Specific skillset on MTS and UPF knowledge. Payment domain expertise, knowledge on MT and MX messages Skills (competencies) Abstract Thinking Active Listening Agile (Software Development Framework) Analytical Thinking Backlog Grooming Business Architecture Modeling Business Process Modeling (e.g. BPMN) Change Management Coaching Collaboration Commercial Acumen Conceptual Data Modeling Conflict Management Confluence Critical Thinking CxO Conversations Data Analysis Data Requirements Management Decision-Making Emotional Intelligence Enterprise Architecture Modelling Facilitation Functional IT Architecture Modelling Giving Feedback Google Cloud Platform (GCP) (Cloud Platform) Influencing Innovation Jira Mediation Mentoring Microsoft Office Motivation Negotiation Networking Power BI Presentation skills Prioritization Problem Solving Project Governance Project Management Project Planning Qlik Relationship-Building Requirements Gathering Risk Management Scope Management SQL Stakeholder Management Story Mapping Storytelling Strategic Management Strategic tThinking SWOT Analysis Systems Requirement Analysis (or Management) Tableau Trusted Advisor UI-Design / Wireframing UML User Journey User Research Verbal Communication Written Communication

Role : UPF & Power Simulation Preferred experience : 8+ Years Location : Hyderabad Availability : Immediate 30 days Job Description : The responsibilities will majorly include : Understanding of power domains and HW programming guide sequences Develop test plan to verify all low power states Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging UPF and RTL and achieving all coverage goals Exploring innovative dynamic or static methodologies by engaging with EDA vendors Strong System Verilog/UVM based verification skills Experience with Assertion coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Good understanding of low power design techniques Proficient with low power SoC design constructs such as clock gates, level shifters, isolation cells and state retention cells. Experience with UPF/CPF based power aware verification. Experience with Synopsys NLP (native Low Power) tool. Working knowledge of GLS , PAGLS and scripting languages such as Perl, Python is a plus Proficiency in Low-Power standards like UPF/CPF. Working knowledge on UPF based RTL / PGPIN simulations. Proficiency in ASIC design tools, simulation methodologies, and hardware description languages (HDLs). Excellent analytical and problem-solving skills with a focus on power optimization.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. * Work with multiple SOC Design teams to rollout robust Logic Synthesis, UPF synthesis, QoR optimization and netlist Signoff flows * Provide implementation flows support and issue debugging services to SOC design teams across various site * Develop and maintain 3rd party tool integration and product enhancement routines * Should drive new tool evaluation, methodology refinement for PPA optimization Skill Set * Proficiency in Python/Tcl * Familiar with Synthesis tools (Fusion Compiler/Genus), * Fair knowledge in LEC, LP signoff tools * Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking * Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus * Should be sincere, dedicated and willing to take up new challenges Experience 3 to 5 years of experience in RTL,UPF & Physical aware Synthesis for cutting edge technology nodes, logic equivalence checking, Scripting and Netlist Timing Signoff

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years"™ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Summary: Position for 5-8 years of experience in design verification of complex Qualcomm propriety DSP IP HEXAGON DSP team is responsible for delivering high-performance DSP cores which are at the heart of Qualcomm's multi-tier SoC roadmap targeted for mobile space Qualcomm is the largest fabless design company in the world, generating over $15 Billion in annual revenues from chipsets and royalties from intellectual property. Qualcomm provides hardware, software, and related services to nearly every mobile device maker and operator in the global wireless marketplace Job Responsibilities: Drive design verification of DSP Subsystem IP by working with a global DSP design team involving architecture, and power teams Implement and improve System Verilog Testbench Architecture Develop and deploy new verification methodologies, automation to continuously improve quality and efficiency Develop design corresponding test plans, architect and develop verification environments, and meet coverage goals Hand-on simulations and debug Complete all required verification activities at IP level and insure high quality commercial success of our products Assertions, simulation, formal verification (static property checking), HW-SW co-verification, constraint/HVL-based verification Responsible for power aware RTL simulation Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Skillset/Experience: 5-8 years"™ experience in processor/ASIC design verification Solid background and understanding of Digital Design, Processor Architecture , Processor Verification and Power aware verification. Expertise in System Verilog Testbench Architecture and implementation Expertise in UPF and PA RTL simulations Experience in VERA/System Verilog, simulators from Synopsys/Mentor/Cadence Solid analytic and debugging skills, strong knowledge of digital design and good understanding of Object-Oriented Programming (OOP) concepts Experience in Hardware verification languages (HVL) such as SystemVerilog testbench (OVM/UVM) and (HDL) such as Verilog, SystemVerilog Experience in AMBA, AHB, AXI , APB and debug protocols Scripting/Automation Skills "” Perl, Python, Shell, Make file TCI Experience is verification of Processor subsystems (ARM/DSP) is preferred Should have excellent inter-personal and communication skills

About Client Hiring for One of the Most Prestigious Multinational Corporations! Job Description Job Title : Base24 Developer/Business Analyst/Scrum Master/Tester Required skills and qualifications : WE HAVE BELOW COMBINATIONS Base24 Developer Base24 Business Analyst Base24 Scrum Master Base24 Tester Qualification : Any Graduate or Above Relevant Experience : 6 to 10 yrs Location : PAN INDIA CTC Range : 30 TO 40 LPA Notice period : ANY Mode of Interview : Virtual Mode of Work : In Office SANA F Staffing analyst - IT recruiter Black and White Business solutions PVT Ltd Bangalore, Karnataka, INDIA sana.f@blackwhite.in I www.blackwhite.in +91 8067432430

As an integral part of the R&D team, you will contribute to Siemenssuccess by crafting state of the art power analysis and optimization solutions. This is your role We are seeking a motivated and skilled software engineer to join our R&D team. Our primary responsibility is to specify, design, develop, and maintain software features and solutions across various R&D units. We develop and deliver software based on functional and architectural specifications, adhering to established quality and process standards. We collaborate with Application Engineers (AEs) and Marketing teams to understand customer requirements and issues. By working closely with the R&D team, we build innovative software solutions and coordinate with the Product Validation (PV) team to ensure detailed validation of those solutions. We are looking for a result oriented and accountable person that thrives in an international environment. Its meaningful that you are self-propelled and enjoy tackling new challenges and learning new HDL languages and low power methodologies as demands are constantly evolving. Required Experience We are seeking a Graduate / Post Graduate (Bachelors/Masters) in EEE) / ECE/Computer Science (CS) from top reputed Engineering colleges with 0-2 years of significant experience in software development. Experience in EDA will be a phenomenal plus! We value sound understanding of C/C++ languages, design patterns along with data structure and algorithms will be key to development of software. Understanding of HDL languages Verilog/VHDL/System Verilog - low power aware synthesis and power formats - UPF/CPF will supplemental. Knowledge of scripting languages, hands-on knowledge of Revision control systems like Perforce will only improve the development time. Your good analytical, abstraction and interpersonal skills will help in creating bigger and sustainable solutions for complex systems. Your ability to work with cross-functional teams as a team player will help in creating good solutions that resolve actual customer issues. This role is in Noida, where youll get the chance to work with teams impacting entire cities, countries and the craft of things to come. This is dynamic environment where the learning curve is very high.

About The Role JD Must have skills. Payment Domain Expertise, MUST - Knowledge on MT and MX Message, Basics of SQL, and Java Specific skillset on MTS and UPF knowledge. Payment domain expertise, knowledge on MT and MX messages Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications.1. Applies scientific methods to analyse and solve software engineering problems.2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance.3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers.4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities.5. The software engineer collaborates and acts as team player with other software engineers and stakeholders. About The Role - Grade Specific JD Must have skills. Payment Domain Expertise, MUST - Knowledge on MT and MX Message, Basics of SQL, and Java Specific skillset on MTS and UPF knowledge. Payment domain expertise, knowledge on MT and MX messages Skills (competencies) Verbal Communication

Job TitleLead Engineer (Core Wireless Testing) LocationBengaluru Work EmploymentFull time DepartmentProduct Engineering DomainProduct Validation Reporting toManager About Us: Tejas Networks is a global broadband, optical and wireless networking company, with a focus on technology, innovation and R&D. We design and manufacture high-performance wireline and wireless networking products for telecommunications service providers, internet service providers, utilities, defence and government entities in over 75 countries. Tejas has an extensive portfolio of leading-edge telecom products for building end-to-end telecom networks based on the latest technologies and global standards with IPR ownership. We are a part of the Tata Group, with Panatone Finvest Ltd. (a subsidiary of Tata Sons Pvt. Ltd.) being the majority shareholder. Tejas has a rich portfolio of patents and has shipped more than 900,000 systems across the globe with an uptime of 99.999%. Our product portfolio encompasses wireless technologies (4G/5G based on 3GPP and O-RAN standards), fiber broadband (GPON/XGS-PON), carrier-grade optical transmission (DWDM/OTN), packet switching and routing (Ethernet, PTN, IP/MPLS) and Direct-to-Mobile and Satellite-IoT communication platforms. Our unified network management suite simplifies network deployments and service implementation across all our products with advanced capabilities for predictive fault detection and resolution. As an R&D-driven company, we recognize that human intelligence is a core asset that drives the organization’s long-term success. Over 60% of our employees are in R&D, we are reshaping telecom networks, one innovation at a time. Why Join Tejas: We are on a journey to connect the world with some of the most innovative products and solutions in the wireless and wireline optical networking domains. Would you like to be part of this journey and do something truly meaningful? Challenge yourself by working in Tejas’ fast-paced, autonomous learning environment and see your output and contributions become a part of live products worldwide. At Tejas, you will have the unique opportunity to work with cutting-edge technologies, alongside some of the industry’s brightest minds. From 5G to DWDM/ OTN, Switching and Routing, we work on technologies and solutions that create a connected society. Our solutions power over 500 networks across 75+ countries worldwide, and we’re constantly pushing boundaries to achieve more. If you thrive on taking ownership, have a passion for learning and enjoy challenging the status quo, we want to hear from you! Who We Are Product Engineering team is responsible for Platform and software validation for the entire product portfolio. They will develop automation Framework for the entire product portfolio. Team will develop and deliver customer documentation and training solutions. Compliance with technical certifications such as TL9000 and TSEC is essential for ensuring industry standards and regulatory requirements are met. Team works closely with PLM, HW and SW architects, sales and customer account teams to innovate and develop network deployment strategy for a broad spectrum of networking products and software solutions. As part of this team, you will get an opportunity to validate, demonstrate and influence new technologies to shape future optical, routing, fiber broadband and wireless networks. What You Work: As a Lead Engineer you will be responsible for driving technical projects, managing resources effectively, balancing team workloads. You will design solutions, oversee testing, and mentor junior engineers to ensure productivity and skill development. Also, you will manage resources, troubleshoot, debug issues, writing and reviewing test cases to ensure code quality, and collaborate with cross-functional teams to deliver high-quality products on time. Knowledge of software development methodology, build tools, and product life cycle Build a 5G Cloud-native test solution in a virtualized environment with end to end understanding of 5G Network functions (i.e., AMF, SMF, UPF and PCF) and protocols Exposure to customer deployment models and configuration of large mobile packet core solutions Have 4-12 years of Industry experience in Mobile packet core technologies with validation background and solid exposure in automation You have End to End or System Testing background Good knowledge in Kubernetes, docker and Cloud Native solutions Experience in bringing up Open stack , VMWare based test setups Interest & Passion in Automation and framework development using Python and Robot Framework Exposure in Spirent Landslide, Mobilium DsTest or Ixia simulators Exposure in automation frameworks like pyats and robot framework. Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage. Experience in CI/CD tools Jenkins and GIT Mandatory skills: Solid experience in 5G core End to End validation Kubernetes, Docker, OpenStack Working exposure on AMF and UPF Have been to customer escalation role Spirent Landslide Python, Shell Scripting, Robot framework Desired skills: Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage. Experience in CI/CD tools Jenkins and GIT Preferred Qualifications Experience 6 to 10 years of relevant experience Education B.Tech/BE or any other equivalent degree, PG in communication field Diversity and Inclusion Statement : Tejas Networks is an equal opportunity employer. We celebrate diversity and are committed to creating all-inclusive environment for all employees. We welcome applicants of all backgrounds regardless of race color, religion, gender, sexual orientation, age or veteran status. Our goal is to build a workforce that reflects the diverse communities we serve and to ensure every employee feels valued and respected.

Job TitleSenior Engineer (Core Wireless Testing) LocationBengaluru Work EmploymentFull time DepartmentProduct Engineering DomainProduct Validation Reporting toManager About Us: Tejas Networks is a global broadband, optical and wireless networking company, with a focus on technology, innovation and R&D. We design and manufacture high-performance wireline and wireless networking products for telecommunications service providers, internet service providers, utilities, defence and government entities in over 75 countries. Tejas has an extensive portfolio of leading-edge telecom products for building end-to-end telecom networks based on the latest technologies and global standards with IPR ownership. We are a part of the Tata Group, with Panatone Finvest Ltd. (a subsidiary of Tata Sons Pvt. Ltd.) being the majority shareholder. Tejas has a rich portfolio of patents and has shipped more than 900,000 systems across the globe with an uptime of 99.999%. Our product portfolio encompasses wireless technologies (4G/5G based on 3GPP and O-RAN standards), fiber broadband (GPON/XGS-PON), carrier-grade optical transmission (DWDM/OTN), packet switching and routing (Ethernet, PTN, IP/MPLS) and Direct-to-Mobile and Satellite-IoT communication platforms. Our unified network management suite simplifies network deployments and service implementation across all our products with advanced capabilities for predictive fault detection and resolution. As an R&D-driven company, we recognize that human intelligence is a core asset that drives the organization’s long-term success. Over 60% of our employees are in R&D, we are reshaping telecom networks, one innovation at a time. Why Join Tejas: We are on a journey to connect the world with some of the most innovative products and solutions in the wireless and wireline optical networking domains. Would you like to be part of this journey and do something truly meaningful? Challenge yourself by working in Tejas’ fast-paced, autonomous learning environment and see your output and contributions become a part of live products worldwide. At Tejas, you will have the unique opportunity to work with cutting-edge technologies, alongside some of the industry’s brightest minds. From 5G to DWDM/ OTN, Switching and Routing, we work on technologies and solutions that create a connected society. Our solutions power over 500 networks across 75+ countries worldwide, and we’re constantly pushing boundaries to achieve more. If you thrive on taking ownership, have a passion for learning and enjoy challenging the status quo, we want to hear from you! Who We Are Product Engineering team is responsible for Platform and software validation for the entire product portfolio. They will develop automation Framework for the entire product portfolio. Team will develop and deliver customer documentation and training solutions. Compliance with technical certifications such as TL9000 and TSEC is essential for ensuring industry standards and regulatory requirements are met. Team works closely with PLM, HW and SW architects, sales and customer account teams to innovate and develop network deployment strategy for a broad spectrum of networking products and software solutions. As part of this team, you will get an opportunity to validate, demonstrate and influence new technologies to shape future optical, routing, fiber broadband and wireless networks. What You Work: As a Senior Engineer, you will be responsible for, Knowledge of software development methodology, build tools, and product life cycle Build a 5G Cloud-native test solution in a virtualized environment with end to end understanding of 5G Network functions (i.e., AMF, SMF, UPF and PCF) and protocols Exposure to customer deployment models and configuration of large mobile packet core solutions Have 4-12 years of Industry experience in Mobile packet core technologies with validation background and solid exposure in automation You have End to End or System Testing background Good knowledge in Kubernetes, docker and Cloud Native solutions Experience in bringing up Open stack , VMWare based test setups Interest & Passion in Automation and framework development using Python and Robot Framework Exposure in Spirent Landslide, Mobilium DsTest or Ixia simulators Exposure in automation frameworks like pyats and robot framework. Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage. Experience in CI/CD tools Jenkins and GIT Mandatory skills: Solid experience in 5G core End to End validation Kubernetes, Docker, OpenStack Working exposure on AMF and UPF Have been to customer escalation role Spirent Landslide Python, Shell Scripting, Robot framework Desired skills: Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage. Experience in CI/CD tools Jenkins and GIT Preferred Qualifications Experience 4 to 6 years of relevant experience Education B.Tech/BE or any other equivalent degree, PG in communication field Diversity and Inclusion Statement : Tejas Networks is an equal opportunity employer. We celebrate diversity and are committed to creating all-inclusive environment for all employees. We welcome applicants of all backgrounds regardless of race color, religion, gender, sexual orientation, age or veteran status. Our goal is to build a workforce that reflects the diverse communities we serve and to ensure every employee feels valued and respected.

Job TitleStaff Engineer (Core Wireless Testing) LocationBengaluru Work EmploymentFull time DepartmentProduct Engineering DomainProduct Validation Reporting toGroup Manager About Us: Tejas Networks is a global broadband, optical and wireless networking company, with a focus on technology, innovation and R&D. We design and manufacture high-performance wireline and wireless networking products for telecommunications service providers, internet service providers, utilities, defence and government entities in over 75 countries. Tejas has an extensive portfolio of leading-edge telecom products for building end-to-end telecom networks based on the latest technologies and global standards with IPR ownership. We are a part of the Tata Group, with Panatone Finvest Ltd. (a subsidiary of Tata Sons Pvt. Ltd.) being the majority shareholder. Tejas has a rich portfolio of patents and has shipped more than 900,000 systems across the globe with an uptime of 99.999%. Our product portfolio encompasses wireless technologies (4G/5G based on 3GPP and O-RAN standards), fiber broadband (GPON/XGS-PON), carrier-grade optical transmission (DWDM/OTN), packet switching and routing (Ethernet, PTN, IP/MPLS) and Direct-to-Mobile and Satellite-IoT communication platforms. Our unified network management suite simplifies network deployments and service implementation across all our products with advanced capabilities for predictive fault detection and resolution. As an R&D-driven company, we recognize that human intelligence is a core asset that drives the organization’s long-term success. Over 60% of our employees are in R&D, we are reshaping telecom networks, one innovation at a time. Why Join Tejas: We are on a journey to connect the world with some of the most innovative products and solutions in the wireless and wireline optical networking domains. Would you like to be part of this journey and do something truly meaningful? Challenge yourself by working in Tejas’ fast-paced, autonomous learning environment and see your output and contributions become a part of live products worldwide. At Tejas, you will have the unique opportunity to work with cutting-edge technologies, alongside some of the industry’s brightest minds. From 5G to DWDM/ OTN, Switching and Routing, we work on technologies and solutions that create a connected society. Our solutions power over 500 networks across 75+ countries worldwide, and we’re constantly pushing boundaries to achieve more. If you thrive on taking ownership, have a passion for learning and enjoy challenging the status quo, we want to hear from you! Who We Are Product Engineering team is responsible for Platform and software validation for the entire product portfolio. They will develop automation Framework for the entire product portfolio. Team will develop and deliver customer documentation and training solutions. Compliance with technical certifications such as TL9000 and TSEC is essential for ensuring industry standards and regulatory requirements are met. Team works closely with PLM, HW and SW architects, sales and customer account teams to innovate and develop network deployment strategy for a broad spectrum of networking products and software solutions. As part of this team, you will get an opportunity to validate, demonstrate and influence new technologies to shape future optical, routing, fiber broadband and wireless networks. What You Work: As a Staff Engineer you will be responsible for driving technical projects, managing resources effectively, balancing team workloads. You will design solutions, oversee testing, and mentor junior engineers to ensure productivity and skill development. You’ll lead technical initiatives, mentor team members and collaborate closely with cross functional teams to drive innovation and ensure high-quality deliverables. You’ll leverage your expertise to solve challenging problems and contribute to strategic engineering decisions. Knowledge of software development methodology, build tools, and product life cycle Build a 5G Cloud-native test solution in a virtualized environment with end to end understanding of 5G Network functions (i.e., AMF, SMF, UPF and PCF) and protocols Exposure to customer deployment models and configuration of large mobile packet core solutions Have 10+ years of Industry experience in Mobile packet core technologies with validation background and solid exposure in automation You have End to End or System Testing background Good knowledge in Kubernetes, docker and Cloud Native solutions Experience in bringing up Open stack , VMWare based test setups Interest & Passion in Automation and framework development using Python and Robot Framework Exposure in Spirent Landslide, Mobilium DsTest or Ixia simulators Exposure in automation frameworks like pyats and robot framework. Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage. Experience in CI/CD tools Jenkins and GIT Mandatory skills: Solid experience in 5G core End to End validation Kubernetes, Docker, OpenStack Working exposure on AMF and UPF Have been to customer escalation role Spirent Landslide Python, Shell Scripting, Robot framework Desired skills: Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage. Experience in CI/CD tools Jenkins and GIT Preferred Qualifications Experience 10 to 15 years of relevant experience Education B.Tech/BE or any other equivalent degree, PG in communication field Diversity and Inclusion Statement : Tejas Networks is an equal opportunity employer. We celebrate diversity and are committed to creating all-inclusive environment for all employees. We welcome applicants of all backgrounds regardless of race color, religion, gender, sexual orientation, age or veteran status. Our goal is to build a workforce that reflects the diverse communities we serve and to ensure every employee feels valued and respected.

Responsibilities: Promptly attend site problems arriving at customer premises in low voltage motors. Carry out overhauling of motors at customer premises. Maintain excellent relationship with the customers & Authorized Repair Center. Help in generating service business e.g. motor overhauling, AMC, spare parts, complete motor retrofitting, Motor rewinding etc. Analyze site problems & give suitable solutions to customer. In some cases, co-ordinate with HO for offering solution. How do I Qualify ? Diploma/Degree in Electrical engineering field with excellent knowledge of Low & Medium Voltage Motors. At least 7 Years experience in servicing of Electrical motors. Having knowledge in service business development area. Capable in identifying customer end maintenance process improvement need. Excellent communication & team-work skill. Problem solving attitude.