0.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Job Description: Job Description, As part of TLR team (top-level-route), R&D Engineer is primarily responsible for :- Place and Route, CTS, Routablity analysis with respect to congestion. Well versed in physical verification aspect, DRC, LVS, Antenna, LUP, ( chip finishing and Tapeout) Meeting RC requirements for manual/special signals Good understanding of calibre DRC/LVS/DFM,DFY, ERC and ESD latchup. Responsible for all the integrity checks (chip-finishing) and post Tapeout eJob view release, Good scripting knowledge perl and TCL, familiar with caliber, Innovus, Understanding of VLSI fabrication process, Implementing timing ECOs. Implementing IR drop fixes, RC extraction, signal EM fixes, ...

Posted 2 days ago

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Senior Staff Engineer-STA(Synthesis) Infineon Technologies

8.0 - 10.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Write and implement block level and top-level constraints for Synthesis, Static Timing Analysis. Job Description In your new role you will: Implement high-performance, low-power, and area-efficient digital designs. Write and implement block level and top-level constraints for Synthesis, Static Timing Analysis. Optimize designs for power, performance, and area, and meet PPA goals. Power analysis using PT-PX or equivalent flow. Logic Equivalence Check (LEC) and Low Power Checks (CLP) at block and SoC level designs. Define and evaluate constraints and signoff Test/DFT mode timing requirements. Knowledge on Power analysis and PT-PX flow Your Profile You are best equipped for this task if you hav...

Posted 3 weeks ago

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