6 Timing Concepts Jobs

Qualcomm India Private Limited is a leading technology innovator that aims to create a smarter, connected future for all by pushing the boundaries of what's possible and driving digital transformation. As a Qualcomm Hardware Engineer within the Engineering Group, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This includes working on circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. To qualify for this role, you should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 3 years of Hardware Engineering experience. Alternatively, a Master's degree with 2+ years of experience or a PhD with 1+ year of experience is also acceptable. A minimum of 4 to 6 years of work experience in ASIC RTL Design is required. Hands-on experience in Logic design/micro-architecture/RTL coding, as well as design and integration of complex multi clock domain blocks, is a must. Proficiency in Verilog/System-Verilog and knowledge of AMBA protocols such as AXI, AHB, APB are essential. Experience in Multi Clock designs, Asynchronous interface, and using tools in ASIC development like Lint, CDC, Design compiler, and Primetime is necessary. Understanding of Automotive System Designs, Functional Safety, Memory controller designs, and microprocessors is an added advantage. As a Qualcomm Hardware Engineer, you will work closely with Design verification and validation teams for pre/post Silicon debug. Hands-on experience in Low power design is preferable, and familiarity with Synthesis/Understanding of timing concepts for ASIC is a must. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. The company expects its employees to adhere to all applicable policies and procedures, including security and confidentiality requirements. Please note that Qualcomm's Careers Site is intended for individuals seeking job opportunities directly with Qualcomm. Staffing and recruiting agencies are not authorized to use the site for submissions. For more information about this role, please contact Qualcomm Careers.,

You will be responsible for Logic design, micro-architecture, and RTL coding, with hands-on experience in SoC design and integration for complex SoCs. It is essential to have expertise in Verilog/System-Verilog and knowledge of AMBA protocols like AXI, AHB, APB, as well as SoC clocking, reset, debug architecture, and peripherals such as USB, PCIE, and SDCC. Understanding Memory controller designs and microprocessors will be advantageous. Collaborating closely with SoC verification and validation teams for pre/post Silicon debug is a key aspect of this role. Your role will require hands-on experience in Low power SoC design, Multi Clock designs, and Asynchronous interfaces. Proficiency in using ASIC development tools such as Lint, CDC, Design compiler, and Primetime is necessary. An understanding of constraint development and timing closure will be a plus. Experience in Synthesis and knowledge of timing concepts will also be beneficial. Additionally, experience in creating padring and collaborating with the chip-level floorplan team is desirable. You must hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 6 years of Hardware Engineering or related work experience. Alternatively, a Master's degree with 5+ years of relevant experience or a PhD with 4+ years of relevant experience will also be considered. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. Reasonable accommodations will be provided upon request to support individuals with disabilities in the hiring process. The company expects all employees to adhere to relevant policies and procedures, including security protocols and confidentiality requirements. Please note that Qualcomm does not accept unsolicited resumes or applications from agencies. Staffing and recruiting agencies, as well as individuals being represented by an agency, are not authorized to submit profiles, applications, or resumes through the Qualcomm Careers Site. For more information about this role, please reach out to Qualcomm Careers.,

Qualcomm India Private Limited is seeking a candidate with a minimum of 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FV. The ideal candidate should have experience in Logic design/micro-architecture/RTL coding, along with hands-on experience in designing and integrating complex multi clock domain blocks. Proficiency in Verilog/System-Verilog and knowledge of AMBA protocols like AXI, AHB, APB, clocking/reset/debug architecture are necessary. Experience in Multi Clock designs and Asynchronous interface is a must, as well as familiarity with tools in ASIC development such as Lint, CDC, Design compiler, and Primetime. Collaboration with Design verification and validation teams for pre/post Silicon debug is expected, and hands-on experience in Low power design is preferable. Additionally, experience in Synthesis and understanding of timing concepts for ASIC is essential. The minimum qualifications for this position include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 3+ years of Hardware Engineering or related work experience. Alternatively, a Master's degree in the relevant fields with 2+ years of experience or a PhD with 1+ year of experience would also be considered. Qualcomm is an equal opportunity employer committed to providing accessibility to individuals with disabilities throughout the application/hiring process. Reasonable accommodations can be requested by emailing disability-accommodations@qualcomm.com or calling Qualcomm's toll-free number. Employees are expected to adhere to all applicable policies and procedures, including security and confidentiality requirements. Qualcomm's Careers Site is exclusively for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies are not authorized to use the site or submit profiles, applications, or resumes on behalf of individuals. Unsolicited submissions from agencies will not be accepted, and Qualcomm does not bear responsibility for any fees related to such submissions. For more information about this role, please contact Qualcomm Careers.,

As a Principal Product Engineer at Cadence, you will be a part of a team that is at the forefront of electronic design, leveraging over 30 years of computational software expertise to transform design concepts into reality. You will have the opportunity to work with the world's most innovative companies, contributing to the development of extraordinary electronic products across various dynamic market applications such as consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health sectors. Cadence offers a stimulating work environment that fosters creativity, innovation, and impact. Our employee-friendly policies prioritize the physical and mental well-being of our workforce, support career development, provide continuous learning opportunities, and recognize and celebrate individual and collective successes. Our unique "One Cadence - One Team" culture emphasizes collaboration both within and across teams to ensure customer success. In this role, you will work with a diverse and passionate team of individuals who are dedicated to exceeding customer expectations and making a difference every day. Cadence provides numerous avenues for personal and professional growth, regardless of where you are in your career journey. To excel in this position, you should have a solid understanding of Hardware Description Languages (HDL) such as Verilog, System Verilog, and VHDL, along with experience in logic synthesis tools. Proficiency in timing concepts, SDCs, PPA push and analysis, 1801/UPF concepts, awareness of P&R flows, and power analysis and optimization would be advantageous. The ideal candidate should hold a BE/BTech/ME/MS/MTech degree or equivalent qualification. If you are looking to be part of a team that is committed to solving challenging problems and making a meaningful impact, Cadence is the place for you. Join us in our mission to tackle what others cannot.,

As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This will involve working on a variety of components including yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to bring cutting-edge products to the market. Collaboration with cross-functional teams is a key aspect of this role to ensure that solutions meet performance requirements. The ideal candidate should have a minimum of 4 to 6 years of work experience in ASIC RTL Design. Experience in Logic design, micro-architecture, and RTL coding is essential. Hands-on experience with the design and integration of complex multi clock domain blocks is a must. Proficiency in Verilog/System-Verilog and knowledge of AMBA protocols such as AXI, AHB, APB, clocking/reset/debug architecture are also required. Candidates should have experience in Multi Clock designs and Asynchronous interface. Familiarity with ASIC development tools like Lint, CDC, Design compiler, and Primetime is necessary. An understanding of Automotive System Designs, Functional Safety, Memory controller designs, and microprocessors would be advantageous. The role involves close collaboration with Design verification and validation teams for pre/post Silicon debug. Prior experience in Low power design is preferred. Additionally, expertise in Synthesis and a solid grasp of timing concepts for ASIC are must-haves for this position.,

You will be joining a leading training institute in the semiconductor industry that is constantly seeking dedicated individuals who are enthusiastic about achieving excellence and eager to expand their knowledge. Our work environment is dynamic, fostering innovation and creativity, and we provide avenues for personal and professional growth through training programs, mentorship, and coaching. The position available is for Synthesis/STA in either Bengaluru or Noida with a requirement of 3-12 years of experience and a BTECH/MTECH qualification. Key Responsibilities: - Demonstrated proficiency in timing concepts and the ability to independently close timing of Block/SoC. - Hands-on experience in generating constraints. - Proficiency in Logical synthesis tools such as Design compiler/ Rc compiler. - Familiarity with Formal Verification and comfortable using LEC/formality tools. - Ability to generate and implement functional Ecos. - Experience in Pre-layout and Post layout timing analysis using industry standard tools like Primetime/ETS. - Hands-on experience in crosstalk timing closure. - Understanding of Path based analysis, AOCV, DMSA is advantageous. - Knowledge of the complete physical Design flow is considered a plus. If you are a self-driven, innovative individual with a strong commitment to excellence, we encourage you to submit your resume and cover letter to our HR department. Be part of our dedicated team of professionals and contribute to the advancement of the semiconductor industry.,