1082 Timing Closure Jobs - Page 3

Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Emulation Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will analyze, design, code, and test multiple components of application code across one or more clients. You will perform maintenance, enhancements, and/or development work in a dynamic environment, contributing to the success of the projects. Roles & Responsibilitie...

Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Emulation Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will analyze, design, code, and test multiple components of application code across one or more clients. You will perform maintenance, enhancements, and/or development work in a dynamic environment, contributing to the success of the projects. Roles & Responsibilitie...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NA Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your typical day will involve collaborating with team members to ensure the successful imple...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, your typical day involves analyzing, designing, coding, and testing various components of application code across multiple clients. You will engage in maintenance and enhancement tasks, ensuring that the software remains efficient and effective. Coll...

Job Description In your new role you will: Power Controller RTL generation and integration for distributedpower-switch management based on power-intent specification Verification of SoC power domains together with the power controllerin the modeling environment Pursue continuous learning and innovation in power methodologies,tools, and technologies, and contribute to the improvement of powermanagement practices within the organization Collaborating with technical leads and managers to ensurecross-functional alignment and consistency You are best equipped for this task if you have: Understanding of power management techniques for complexproducts. Understanding of power gating techniques, incl...

Title- Senior SoC Design Manager Location- Hyderabad, Telangana Duration- Full time About the Company Best Nano Tech is committed to innovation in the semiconductor industry, focusing on developing cutting-edge technologies that drive the future of embedded AI compute. About the Role As Senior SoC Design Manager, you will lead the design and development of next-generation mixed-signal, ARM-based SoCs. You will build and guide a world-class engineering team in Hyderabad and play a critical role in shaping our silicon roadmap for embedded AI compute. You'll work at the intersection of hardware, software, and AI, driving end-to-end SoC execution from concept and architecture through tape-out an...

SUMMARY Max CTC : 21,330 Work Timings : US Shift/ Night Shift Contract Duration : 6 months Work location : CDC 5,Shollinganallur Important Pointers Candidate should be flexible to WFO Should be comfortable in International Voice Process. English communication should be excellent. Retention Bonus will be paid as follows 3months 5,000 3+6months -10,000 3+6+6months 10,000 Requirements Any Non Technical Graduates with Good communication skill Eligible. No PG and BE / BTECH Graduate is Eligible Should be able to Speak & Write good English with proper punctuation & grammar. Benefits PF,ESI BOTH WAY CAB(Pickup and drop will be provided) Work From office

We are looking for an experienced STA Engineer with strong hands-on expertise in Synopsys PrimeTime & PT-ECO for block-level timing analysis and closure. Responsibilities: * Generate & analyze block-level timing constraints for Functional & DFT modes * Understanding of Clocking & Data Flow * Review check_timing, Constraints QoR & perform Constraints Validation * Work closely with FE/Design, DFT & Implementation teams for timing closure * Good understanding of CTS build and Clock Tree spec closure * Perform Timing ECOs & final timing closure * Good scripting knowledge in TCL/Unix

Job Details Job Description: Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for ...

Job Overview: Physical Design Engineer implements the entire ASIC/SoC back end design flow from RTL to GDSII to create design databases ready for manufacturing with a special focus on power, performance & area optimization with next generation state of the art process technologies. Physical Design Engineer Experience: 5 Years & above (Mandatory). Education: BE/ ME/B. Tech/M. Tech/MS or equivalent disciplines with an emphasis on VLSI design Location: Bengaluru, India EMPLOYMENT TYPE: FULL TIME Roles & Responsibilities: - Take complete ownership of the implementation of Block level designs and Chip level design - Responsible for planning and execution of all aspects of Physical Design includin...

As an experienced Physical Design Engineer at Tessolve in Bangalore, your role will involve the end-to-end physical design flow from RTL to GDSII at advanced technology nodes such as 7nm, 5nm, or below. Your responsibilities will include optimizing chip area, power, and performance through floorplanning and partitioning, as well as optimizing standard cell placement, buffer insertion, and clock tree synthesis during placement and CTS. You will work on congestion analysis, RC extraction, static timing analysis (STA), power optimization techniques, physical verification, and sign-off analysis. Collaboration with RTL design, DFT, and verification teams for design convergence will also be a key ...

About the team: You will join a dynamic, global team of experts dedicated to advancing the state-of-the-art in high-performance cores and IP implementation. The team is at the forefront of developing innovative methodologies and leveraging Synopsys industry-leading tools to solve the most critical design challenges in semiconductor technology. Job Description Develop and enhance PPA (Power, Performance, Area) methodologies for complex interface IPs at advanced technology nodes. Implement high-performance CPUs, GPUs, and interface IPs using industry-leading Synopsys tools such as RTLA, Fusion Compiler, DSO, and Fusion AI. Drive flow development and optimization to improve design quality and p...

Job Summary: We are seeking a skilled and motivated FPGA Prototyping/Emulation Engineer to join our hardware design team. The ideal candidate will have hands-on experience in FPGA-based prototyping and emulation of complex SoC designs, and will work closely with RTL designers, verification engineers, and software teams to enable early software development and system validation. Key Responsibilities: Develop and maintain FPGA-based prototyping platforms for pre-silicon validation. Integrate and debug RTL blocks on FPGA platforms (e.g., Xilinx, Intel/Altera). Collaborate with design and verification teams to bring up emulation environments. Optimize FPGA resource usage and timing closure for l...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience OR Master's degree in Computer Science, Electrical/Electronics Engineeri...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Sci...

Role Overview: You will be independently executing mid-sized customer projects in various fields of VLSI Frontend Backend or Analog design with minimal supervision. Your role will involve working as an individual contributor and owning tasks related to RTL Design/Module. You will provide support and guidance to engineers in areas such as Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. Your responsibilities will also include anticipating, diagnosing, and resolving problems by coordinating with cross-functional teams. Additionally, you will be expected to deliver high-quality outputs on time, automate design tasks flows, write scripts for gener...

SUMMARY Max CTC : 21,330 Work Timings : US Shift/ Night Shift Contract Duration : 6 months Work location : CDC 5,Shollinganallur Important Pointers Candidate should be flexible to WFO Should be comfortable in International Voice Process. English communication should be excellent. Retention Bonus will be paid as follows 3months 5,000 3+6months -10,000 3+6+6months 10,000 Requirements Any Non Technical Graduates with Good communication skill Eligible. No PG and BE / BTECH Graduate is Eligible Should be able to Speak & Write good English with proper punctuation & grammar. Benefits PF,ESI BOTH WAY CAB(Pickup and drop will be provided) Work From office

Job Description: Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Mi...

Hope you are doing well. We are currently hiring for an STA Engineer position at Eximietas Design , and based on your background, you may be an excellent fit for this role. Please find the detailed Job Description below. Job Description STA Engineer (Static Timing Analysis) Company: Eximietas Design Location: Bangalore Experience: 6+ Years About the Role: We are seeking an exceptional STA Engineer to join our semiconductor design team. You will collaborate with talented engineers to deliver high-performance, energy-efficient, and scalable ASIC designs. This role involves leading STA efforts for complex, high-speed, advanced-node ASICs in a fast-paced environment. Responsibilities: Lead a tea...

SUMMARY Part-Time Weekend Job Join Leading Food & Beverage Industry Team in Bangalore Job Role: Weekend Supporting Staff Company: Food & Beverage Industry Location: Bangalore Work Locations: Lulu Mall (Rajajinagar) Phoenix Marketcity (Whitefield) Shift Timing: 12:00 PM 5:00 PM Work Days: Saturday and Sunday Estimated Monthly Earnings: 3,000 3,500 Work 4 5 hours and earn extra income every weekend Key Responsibilities: Support kitchen and floor staff Serve starters, beverages, and non-vegetarian items (including chicken) Maintain cleanliness in service and dining areas Ensure smooth dining operations Requirements: No prior experience required (orientation provided) Must be energetic, discipli...

Required skills: Experience into STA and timing closure/signoff experience with PD domain skill-set/knowledge. Candidate should be able to understand the timing constraints, analyze design details, analyze timing reports from prepcts to postcts stages, in-depth concepts of 14nm technode STA analysis, DCD knowledge. Candidate is preferably expert in PT and Tempus tools. Education Requirements B. Tech / M. Tech (ECE) Experience 5 to 12 Years Shift General Work Week Monday to Friday Joining time Immediate to 90 Days

Responsibilities: * Conduct static timing analysis using TCL and Perl scripts. * Work closely with PD, synthesis, and RTL teams * Develop Python scripts for data processing and visualization. Mail: chaitanya.vasamsetti@gigaopsglobal.com Office cab/shuttle Food allowance Health insurance Annual bonus Provident fund

We are seeking a highly experienced Senior Physical Design Engineer with 8+ years of experience in block-level and full-chip physical implementation. The candidate should be proficient in physical design flows and methodologies for advanced technology nodes. Key Responsibilities: Drive physical implementation from RTL to GDSII (floorplanning, placement, CTS, routing) Perform timing analysis, congestion analysis, and physical verification (DRC/LVS) Optimize for performance, power, and area (PPA) Collaborate closely with RTL, STA, DFT, and package teams Own signoff checks (IR drop, EM, Antenna, Crosstalk, etc.) Support tape-out and silicon validation activities Requirements: 8+ years of experi...

As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This includes bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Key Responsibilities: - Strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. - Experience with writing timing constraints for synthesis, STA, timing closure, and pipelinin...

As a Hardware Engineer at Qualcomm India Private Limited, you will be part of a leading technology innovator that drives digital transformation to create a smarter, connected future. Your role will involve planning, designing, optimizing, verifying, and testing electronic systems, including circuits, mechanical systems, and digital/analog/RF/optical systems. You will collaborate with cross-functional teams to develop cutting-edge products and meet performance requirements. Key Responsibilities: - Plan, design, optimize, verify, and test electronic systems - Bring-up yield, circuits, mechanical systems, digital/analog/RF/optical systems - Develop equipment and packaging, test systems, FPGA, a...