880 Timing Closure Jobs - Page 10

Physical Design and Timing closure of Infineon SoCs targeted for IoT and MCU markets. Job Description In your new role you will: This position is for Physical Design and Timing Closure of complex, low power SoCs targeted for IOT and MCU markets. Candidate will be responsible to drive die area, performance, power goals for hierarchical blocks/Top. Candidate will work on various stages of physical design implementation which includes floorplanning, IO planning, packager co-design, power grid design, place and route, clock tree synthesis, timing closure, Static/Dynamic IRdrop, physical verification checks. Candidate is expected to have deep understanding and hands-on experience in implementing ...

We are looking for a skilled professional with 5-15 years of experience to join our team as an SCOM in IDESLABS PRIVATE LIMITED, located in [location to be specified]. The ideal candidate will have a strong background in recruitment services and excellent communication skills. Roles and Responsibility Manage and coordinate recruitment activities to meet client requirements. Develop and implement effective recruitment strategies to attract top talent. Build and maintain relationships with clients and candidates for successful placements. Conduct interviews and assessments to identify the best candidates. Collaborate with internal teams to ensure seamless recruitment processes. Analyze recruit...

We are looking for a skilled SAP DRC Engineer with 7 to 12 years of experience. The ideal candidate will have expertise in the SAP DRC module and BTP of SAP, SD, FI, E-Doc Cockpit, and project management skills. This position is available in PAN India, including Bangalore, Hyderabad, Chennai, Noida, Pune, and Gurgaon. Roles and Responsibility Design and implement SAP DRC solutions to meet business requirements. Collaborate with cross-functional teams to ensure seamless integration of SAP DRC with other modules. Develop and maintain documentation for SAP DRC projects. Provide training and support to end-users on SAP DRC functionality. Troubleshoot and resolve technical issues related to SAP D...

We are looking for a skilled professional with 05-20 years of experience to join our team as a (VLSI) Physical Design (PD) expert in Bangalore, Hyderabad, Kochin, and Pune. The ideal candidate will have hands-on experience with Netlist2GDSII Implementation, including floor planning, placement, CTS, routing, STA, power integrity analysis, physical verification, and programming in Tcl/Tk/Perl. Roles and Responsibility Implement Netlist2GDSII for various projects. Perform floor planning, placement, CTS, routing, STA, and power integrity analysis. Conduct physical verification and ensure successful project delivery. Collaborate with cross-functional teams to meet project goals. Develop and maint...

We are looking for a skilled professional with 7 to 15 years of experience in the field of Physical Design to join our team. The ideal candidate will have a strong background in Floor Planning, Innovus, Fusion Compiler, and programming skills in Tcl/Tk/Perl. Roles and Responsibility Develop and implement physical design methodologies for submicron technology nodes. Utilize expertise in Floor Planning, Innovus, and Fusion Compiler to optimize design performance. Collaborate with cross-functional teams to ensure seamless integration of physical design with other components. Apply knowledge of physical design principles and methodologies to improve design quality. Troubleshoot and debug complex...

Role & responsibilities: The candidate will be responsible for implementing the place and route of design blocks including floorplanning, placement, clock tree building, routing, timing optimizations, DRC, LVS fixing, IR drop analysis, Formal verification, power intent checks etc . The candidate will also be responsible for block level physical design closure in terms of timing, power, DRC/LVS etc. Preferred candidate profile : • 4-7 years of experience in ASIC Physical Design. • Have good knowledge of entire physical design process from floorplan till GDSgeneration. • Good Exposure to Physical Verification Process. • Have hands-on experience in latest sub-micron technologies below 10 nm • H...

As the candidate for the position at Ceremorphic AI hardware, you will be responsible for owning and driving the physical implementation of next-generation SOCs. Your role will involve understanding requirements and defining physical implementation methodologies. You will collaborate with architecture, design, front end, and CAD teams to ensure the delivery of high-quality physical designs. Additionally, you will be responsible for implementing and verifying designs at all levels of hierarchy in the SOC. Your role will also entail interacting with the foundry on matters related to technology, schedule, and signoff, as well as supervising resource allocation and scheduling. Key Responsibiliti...

We are looking for a Motion Graphic Designer to join our marketing team and bring our brand stories to life through stunning motion graphics, videos, and AI-powered creative experiments. Key Responsibilities Design and animate motion graphics for marketing campaigns, including explainer videos, ad films, reels, and product launch videos. Edit podcasts, event highlights, and social media videos with professional quality and brand alignment. Collaborate with the team to brainstorm creative ideas, storyboards, and campaign concepts. Work on video and photo shoots, ensuring smooth pre-production and post-production workflow. Optimize videos for multiple formats (9:16, 16:9, square) across Instag...

Responsibilities: Collaborate with cross-functional teams on project deliverables. Optimize timing closure through innovative techniques. Perform physical verification using Synopsys tools.

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill collaborate closely with cross-functional teams to ensure the successful delivery of highquality designs Responsibilities: Responsible for leading a team of STA engineers and close high frequency, lower tech node complex designs. Understand Design Architecture and timing requirements Develop timing constraints SDC and validate Work with ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Come join Intel's highly regarded Devices Development Group, responsible for creating Client SOCs. We envision the future of computing and design for the next generation of laptop and desktop computers. We are seeking a highly skilled and motivated STA (Static Timing Analysis) Engineer to join our team specializing in timing analysis for cutting-edge and complex SoC projects. This role offers a unique opportunity to work on high-level designs and collaborate with multidisciplinary teams in a dynamic and challenging environment. Your Responsibilities May Include But Not Be Limited To STA setup, convergence, reviews and sign-off for Multi-Mode and Multi-corner Multi voltage domain designs. Tim...

Responsibilities In this role, you will be responsible for Timing methodology definition and closure of designs using industry standard tools for chiplet designs for custom and domain specific products. The chiplets will be leveraged to enable modular design and support multiple products. As part of this team, the candidate will work with leading edge technologies and solutions across multiple domains including SoC multi-die implementations (2.5 and 3D), power delivery, leading edge memory technologies, innovate thermal solutions, on die clocking, and fabrics. The team will also look at options to enhance product power/performance/area/cost thru improved tools and methodologies. The successf...

Responsible for high-performance microprocessor blocks RTL to GDSII implementation Perform block-level synthesis, floor-planning, placement, and routing. Close the design to meet timing, power budget, and area. Implement ECO's to address functional bugs and timing violations. Team player, with good problem solving and communication skills. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8-12 years of industry experience in physical design methodology. Good knowledge and hands-on experience in physical design methodology, which includes logic synthesis, placement, clock tree synthesis, and routing. Should be knowledgeable ...

Develop and maintain formal equivalence checking flows using Synopsys Formality. Collaborate with cross-functional teams to align verification methodology with design goals. Implement and support Formality ECO flows for incremental synthesis. Drive methodology improvements for SoC design verification. Coordinate with internal stakeholders and external vendors to deliver high-quality solutions. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or VLSI Design. 5–8 years of hands-on experience with Synopsys Formality or similar tools (e.g., Cadence Con...

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions grounded in open standards. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs Intelligent Connectivity Platform integrates CXL, Ethernet, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. Discover more at www.asteralabs.com. We are seeking a Principal Digital Design Engineer with deep expertise in high-performance controller an...

About The Role Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. ? Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product de...

There is energy here energy you can feel crackling at any of our international locations. It s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Description This position is for RTL designer role in DSP processor team. The position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies. The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis, formal verification, PLDRC, clock domain crossing, and low power techniques. Knowledge and experience of microprocessor integration is a definite advantage. Skills/Experience Must have 3 to 15 years of practical experience with details of RTL development (VHDL and/or Verilog) including:...

As a Qualcomm Hardware Engineer, your role will involve planning, designing, optimizing, verifying, and testing electronic systems such as circuits, mechanical systems, Digital/Analog/RF/optical systems, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. **Key Responsibilities:** - Participating in ASIC development projects with a focus on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification. - Creating design experiments, conducting detailed PPA comparison analysis, collaborating with various teams for optimizati...