156 Timing Analysis Jobs - Page 5

Key Responsibilities: Floor planning: Develop and optimize floorplans for ASIC designs, ensuring optimal placement of cores, macros, and I/O cells while considering performance and manufacturability. Place & Route (P&R): Perform place-and-route tasks, optimizing for timing, power, and area, ensuring congestion-free routing and maximizing PPA (Performance, Power, Area). Static Timing Analysis (STA): Carry out static timing analysis to identify violations and work on techniques for timing closure such as resizing, retiming, or re-optimization. Power Analysis & Optimization: Perform power analysis, targeting low-power designs using techniques such as clock gating, power gating, and low-power state optimization. Signal Integrity & Noise Analysis: Perform signal integrity analysis to avoid noise and crosstalk in the design. Design Rule Check (DRC) and Layout vs. Schematic (LVS): Run DRC and LVS checks to ensure the layout adheres to manufacturing rules and matches the schematic. RC Extraction: Perform parasitic extraction and analyze RC effects to ensure the design functions at the required operating frequencies. Verification: Participate in the final sign-off processes for physical design and support tape-out efforts, ensuring all design specifications are met. Collaboration: Work closely with design, verification, and CAD teams to troubleshoot and resolve any design-related issues. Documentation: Maintain clear documentation throughout the physical design flow for ease of understanding and for future reference. Qualifications: Education: Bachelors/Masters degree in Electronics/Electrical Engineering or a relevant degree. Experience: Minimum 3-14 years of experience in ASIC physical design. Proficiency in place and route (P&R), static timing analysis (STA), power analysis , and DRC/LVS checks. Experience with tools like Cadence Innovus , Synopsys IC Compiler , or Mentor Graphics for physical design. Knowledge of advanced process nodes (e.g., 7nm, 5nm) is a plus. Technical Skills: Proficiency in digital design concepts and semiconductor process flows. Strong knowledge of timing optimization techniques and power optimization strategies. Familiarity with parasitic extraction and signal integrity analysis. Ability to script in languages like Tcl , Python , or Perl to automate tasks. Preferred Skills: Experience with 3D IC design or FinFET technologies. Familiarity with full-chip tape-out procedures. Exposure to machine learning techniques in physical design optimization will be added advantage. Personal Attributes: Strong problem-solving and analytical skills. Detail-oriented, with a focus on accuracy and optimization. Excellent communication and collaboration skills, capable of working in a cross-functional team. Ability to manage multiple tasks in a fast-paced environment.

Collaborate with the design team for the implementation of various hard IPs and the SoC top level. Lead the top-level implementation of SoC designs, including IO ring integration. Utilize Synopsys Fusion Compiler for physical and WLM synthesis. Perform timing analysis and resolve timing issues related to implementation. Conduct DFT insertion and ensure robust design for testability. Execute place and route flows using Cadence Innovus and Synopsys Fusion Compiler. Manage chip-level and block-level design implementation. Design and analyze IO rings. Implement FlipChip SoC designs, including RDL routing. Ensure timing and design signoff, including STA, LVS, and DRC. Utilize tools such as Synopsys Design Compiler, DFT Compiler, PrimeTime, Cadence Innovus, and Mentor Graphics Calibre for various implementation tasks. Interested candidates can share their resumes to shubhanshi@incise.in

1. Hands on work on custom layout for analog blocks like High Speed SerDes and General purpose IO designs with Cadence Virtuoso on latest technologies like 5nm and below and also take leadership roles in delivery of IPs 2. Work on Floor planning, power design, signal routing strategy, EMIR awareness andparasitic optimisations 3. Understand and apply analog Layout techniques to ensure the design meets performance with minimum possible area and good yield. 4. Participate in building and enhancing layout flow for faster, higher quality design process. 5. Checking physical verifications like DRC/LVS/ERC/ANT/DFM and other IBM internal checks 6. Collaborate with Circuit Designers to solve challenging problems 7. Writing /PYTHON scripts to automate repetitive tasks 8. Work with Place and Route engineer to integrate custom macros into top level. 9. Able to perform design reviews across global team 10. Work closely with required global teams to ensure the success of the whole product. 11. Leadership in delivery of macros we plan to own from India Job requirements: 1. Experience in doing layouts for analog blocks like SerDes, ADCs, DACs, LDOs, PLLs, BGAP & amplifiers etc. 2. Experience in designing layouts for high-speed circuits is a plus. 3. Layout experience in the following technology nodes3nm, 5nm and 7nm FinFET. 4. Good team worker with multi-discipline, multi-cultural and multi-site environments 5. Strong fundamental knowledge in semiconductor device physics, layout principles, IC reliability and failure mechanisms 6. Good problem-solving skills are essential where problems are analysed upfront, identifying gaps, and providing optimum solutions7. Knowledge in Skill/perl/tcl/Python scripting is a plus. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise The Analog layout design engineer with experience in next generation Ultra high speed serial IO link (HSS) interface for Cognitive, ML,DL, and data center applications. The engineer needs to have knowledge in the design and development full custom analog layouts for ultra high speed 32G/50G/112G IO link interfaces. Preferred technical and professional experience Experience in 7 and 14 nm analog layout design. Working on Cutting edge technology and HSS domain . Quick learner, deep layout design knowledge, problem solving skills and good communication skills with cross teams across the Geos.

SKS Enterpprises is looking for Manager/ Sr Manager - Placement to join our dynamic team and embark on a rewarding career journey Career Counseling: Provide guidance and career counseling to students or job seekers, helping them identify their skills, interests, and career goals Job Placement: Facilitate job placements by matching candidates with suitable job openings based on their qualifications and preferences Employer Engagement: Build and maintain relationships with employers, businesses, and organizations to understand their hiring needs and requirements Job Postings and Recruitment: Post job vacancies and coordinate recruitment processes, including conducting interviews and coordinating selection procedures Resume and Interview Preparation: Assist candidates in preparing resumes, cover letters, and interview techniques to enhance their chances of securing a job Internship and Training Opportunities: Identify and promote internship and training opportunities for students and job seekers to gain practical experience Networking Events: Organize job fairs, networking events, and industry-specific workshops to connect candidates with potential employers

locationsIndia, Bangalore time typeFull time posted onPosted 9 Days Ago job requisition idJR0274850 Job Details: About The Role : We are looking for Senior DFT Design Engineers to join our team who are ready to make significant impacts in graphics and visual computing. As a member of the GHI DFT group, you will be responsible for one or more of the following activities: You will work on the design, RTL/GLS validation, automation, and/or timing analysis for Scan/ATPG and/or DFT/JTAG controller You will also contribute or be involved with trace/pattern generation efforts as well as post-silicon enabling, debug support, and/or analysis of the DFx features/content types you are responsible for. Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high-quality integration of the GPU block. Qualifications: The ideal candidate will exhibit the following traits/skills: Excellent written and verbal communication skills Demonstrate Leadership ability in driving execution Demonstrate teamwork, problem solving and influencing skills Ability to work with different geographical locations Minimum Qualifications: Bachelors in Electrical/Computer Engineering or related field with 9+ years of experience. Or a Masters in the same fields with 7+ Years of academic or industry experience. Your experience should be in following At least one of the key DFT features such as TAP/JTAG, Scan/ATPG or Array DFT (MBIST/PBIST) (This is a key skill requirement.) SoC or IP DFT design, integration or verification EDA tools such as ATPG tools, Siemens Tessent shell, VCS simulation and/or debug tools. Preferred Qualifications: Silicon enabling debug or test pattern development experience Design automation skills and proficiency in programming or scripting languages Structural design flows, including timing, routing, placement or clocking analysis High volume manufacturing requirements and test flows 3D, media and display graphics pipelines SoC architecture Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

We are seeking a skilled SoC (System on Chip) Frontend Design Engineer to join our integrated circuit (IC) design team. The ideal candidate will be working on RTL design, digital logic design, synthesis, linting, timing analysis, and verification for FPGA/ASIC projects. This role requires deep knowledge of VHDL/Verilog, verification methodologies, testbench development, and debugging. The candidate will work closely with cross-functional teams to deliver high-quality, efficient SoC designs. You have: Bachelors Degree in Electrical, Computer Engineering, or a related field (Masters preferred).3+ years of experience in RTL design, digital logic design, and synthesis. Proficiency in VHDL/Verilog for RTL design. Strong knowledge of digital logic design, synthesis, and timing analysis. Experience with linting tools and methodologies. Familiarity with verification methodologies (UVM, System Verilog). Experience in testbench development, simulation, and functional coverage. Strong debugging skills to identify and resolve design issues. Proven track record of successful FPGA/ASIC design projects. Required ToolsSynopsys Design Compiler or Cadence Genus, Mentor Graphics QuestaSim, Spyglass VC It would be nice if you also had: Experience with advanced verification methodologies and tools. Familiarity with high-level synthesis (HLS) tools. Knowledge of scripting languages such as Python, Tcl, or Perl for automation. Develop RTL designs using VHDL/Verilog for FPGA/ASIC projects. Perform digital logic design, synthesis, and timing analysis. Conduct linting and static analysis to ensure code quality. Develop and implement verification methodologies (UVM, System Verilog). Create and maintain testbenches for simulation and functional coverage. Perform simulations and debugging to ensure design correctness. Participate in design reviews and provide feedback to improve design quality.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Preferred Qualifications: Bachelor's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Principal Duties and Responsibilities: Applies Hardware knowledge to assist in the planning, verification, and testing of electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Provides support for the integration of features and functionality into hardware designs in line with proposals or roadmaps. Assists in conducting simulations and analyses of designs as well as with the implementation of designs with the best power, performance, and area. Collaborates with team members to assist in the implementation of new requirements and incorporation of the latest test solutions. Assists in the evaluation, characterization, and development of manufacturing solutions for leading edge products in processes. Assists in the evaluation of reliability for materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Assists in the assessment of basic design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes technical documentation for Hardware projects. Level of Responsibility: Works under supervision. Decision-making affects direct area of work and/or work group. Requires verbal and written communication skills to convey basic, routine factual information. Tasks consist of a limited number of steps and can be referenced using directions or manuals. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [HIDDEN TEXT] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Preferred Qualifications: Bachelor's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Principal Duties and Responsibilities: Applies Hardware knowledge to assist in the planning, verification, and testing of electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Provides support for the integration of features and functionality into hardware designs in line with proposals or roadmaps. Assists in conducting simulations and analyses of designs as well as with the implementation of designs with the best power, performance, and area. Collaborates with team members to assist in the implementation of new requirements and incorporation of the latest test solutions. Assists in the evaluation, characterization, and development of manufacturing solutions for leading edge products in processes. Assists in the evaluation of reliability for materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Assists in the assessment of basic design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes technical documentation for Hardware projects. Level of Responsibility: Works under supervision. Decision-making affects direct area of work and/or work group. Requires verbal and written communication skills to convey basic, routine factual information. Tasks consist of a limited number of steps and can be referenced using directions or manuals. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [HIDDEN TEXT] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Preferred Qualifications: Bachelor's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Principal Duties and Responsibilities: Applies Hardware knowledge to assist in the planning, verification, and testing of electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Provides support for the integration of features and functionality into hardware designs in line with proposals or roadmaps. Assists in conducting simulations and analyses of designs as well as with the implementation of designs with the best power, performance, and area. Collaborates with team members to assist in the implementation of new requirements and incorporation of the latest test solutions. Assists in the evaluation, characterization, and development of manufacturing solutions for leading edge products in processes. Assists in the evaluation of reliability for materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Assists in the assessment of basic design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes technical documentation for Hardware projects. Level of Responsibility: Works under supervision. Decision-making affects direct area of work and/or work group. Requires verbal and written communication skills to convey basic, routine factual information. Tasks consist of a limited number of steps and can be referenced using directions or manuals. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [HIDDEN TEXT] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Preferred Qualifications: Bachelor's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Principal Duties and Responsibilities: Applies Hardware knowledge to assist in the planning, verification, and testing of electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Provides support for the integration of features and functionality into hardware designs in line with proposals or roadmaps. Assists in conducting simulations and analyses of designs as well as with the implementation of designs with the best power, performance, and area. Collaborates with team members to assist in the implementation of new requirements and incorporation of the latest test solutions. Assists in the evaluation, characterization, and development of manufacturing solutions for leading edge products in processes. Assists in the evaluation of reliability for materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Assists in the assessment of basic design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes technical documentation for Hardware projects. Level of Responsibility: Works under supervision. Decision-making affects direct area of work and/or work group. Requires verbal and written communication skills to convey basic, routine factual information. Tasks consist of a limited number of steps and can be referenced using directions or manuals. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [HIDDEN TEXT] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

General Summary: As a global technology leader, Qualcomm is committed to pushing the boundaries of innovation. We are seeking a Senior Hardware Engineer specializing in Static Timing Analysis (STA) to join our world-class team. This role focuses on timing convergence for complex SoCs, IP blocks, and advanced technology nodes. The ideal candidate will have deep technical expertise in STA, strong problem-solving skills, and the ability to collaborate across design, physical implementation, and tool development teams. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field and 6+ years of relevant experience OR Master's degree and 5+ years of experience OR PhD and 4+ years of experience in Hardware Engineering or related fields Required Experience and Skills: 6+ years of hands-on experience in Static Timing Analysis (STA) for large ASIC/SoC designs Strong foundation in STA concepts including: Setup/Hold time analysis, Clock Skew, Latch Transparency Multi-cycle and zero-cycle path handling AOCV/POCV (Advanced/Parametric On-Chip Variation) Crosstalk, Noise Analysis, and Signal Integrity Hands-on experience with industry STA tools: Synopsys PrimeTime , Cadence Tempus Expertise in timing constraint management (SDC), including: Multi-voltage domains Multi-mode timing closure Domain crossings and feedthrough handling Familiar with full ASIC back-end design flows (RTL to GDS): Tools: ICC2 , Innovus , PT , Tempus Experience in SPICE simulations (Hspice/FineSim), Monte Carlo runs, and silicon-to-SPICE correlation Proficiency in scripting languages such as: TCL , Perl , Python , Awk Strong collaboration and communication skills; experience working in cross-functional teams Preferred Qualifications: Knowledge of Qualcomm Hexagon DSP IPs and their timing behavior Exposure to device physics and process technology enablement Familiarity with digital design flow and EDA automation Experience in timing methodology development and automation within STA/PD flows Previous experience in timing convergence for chip-level and hard macro-level designs Key Responsibilities: Own and drive timing convergence for advanced SoC and IP designs across PVT (Process, Voltage, Temperature) corners Perform STA signoff using industry-standard tools and methodologies Develop, maintain, and optimize timing analysis flows and scripts Work with physical design teams to define and validate constraints, analyze violations, and recommend fixes Support cross-functional teams in constraint development , clock tree synthesis , and timing closure Correlate SPICE simulations with STA results to ensure timing accuracy and model validity Lead timing reviews , debug issues, and document findings and methodologies Contribute to tool evaluations , timing methodology enhancements , and internal flow automation Level of Responsibility: Works independently and takes ownership of key deliverables Provides technical leadership and mentoring to junior engineers Influences project direction and STA methodology Communicates complex technical issues effectively to stakeholders

General Summary: Qualcomm is a global leader driving next-generation innovations in technology, pushing boundaries to enable smarter, connected experiences. As a Qualcomm Hardware Engineer in the DDR Physical Design (PD) team, you will be involved in planning, designing, optimizing, verifying, and testing advanced electronic systems including circuits, mechanical, Digital/Analog/RF/optical systems, test systems, FPGA, and DSP systems. You will collaborate closely with cross-functional teams to meet stringent performance and timing requirements for cutting-edge products. Positions & Experience Levels: Senior Lead: 6 to 8 years of experience (2 openings) Staff Engineer: 8 to 10 years of experience (1 opening) Senior Staff Engineer: 10 to 12 years of experience (1 opening) Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field + 6+ years experience OR Master's degree + 5+ years experience OR PhD + 4+ years experience in Hardware Engineering or related field Key Technical Skills & Responsibilities: Static Timing Analysis (STA): Strong fundamentals in STA timing analysis, including AOCV/POCV concepts, CTS, timing constraints, latch transparency, 0-cycle and multi-cycle path handling Hands-on experience with STA tools like PrimeTime and Tempus Driving timing convergence at both Chip-level and Hard-Macro level STA setup, convergence, review, and sign-off for multi-mode, multi-voltage domain designs (including Qualcomm Hexagon DSP IPs) Signal Integrity and Parasitics: Deep understanding of cross-talk noise, signal integrity, layout parasitic extraction, and feed-through handling ASIC Back-end Design: Knowledge of back-end flows and tools such as ICC2, Innovus Experience with circuit simulations using Hspice, FineSim, and Monte Carlo methods Correlation between silicon and spice simulation models Scripting and Automation: Proficient in scripting languages: TCL, Perl, Awk Experience with automation scripting for STA and physical design tools Familiarity with design automation flows from RTL to GDS (using tools like ICC, Innovus, PrimeTime, Tempus) Process Technology: Basic device physical knowledge Familiarity with process technology enablement and related simulations Soft Skills: Strong technical writing and communication skills Willingness to work collaboratively in a cross-functional and global environment

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 6-12 years of experience in physical design from product-based/EDA companies. DDRPhy /PCIE-high speed interface PD Timing Signoff experience with SNPS/CDNS tools PDNIR signoff and Physical verification knowledge Automation skills python/Perl/TCL RDL-design + Bump Spec understanding for smooth SoC PDN integration and signoff Proficiency in automation to drive improvements in PPA Experience working on multiple technology nodes in advanced processes. Experience in low power design implementation, including Unified Power Format (UPF), multi-voltage domains, and power gating. Familiarity with ASIC design flows and physical design methodologies. Good to Have: Design level knowledge to optimize the implementation for PPPA Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [HIDDEN TEXT] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers

General Summary NUVIA, now a part of Qualcomm, is on a mission to reimagine silicon and develop computing platforms that redefine industry standards. We're building custom CPUs that lead the industry in power, performance, and scalability. As a CPU Physical Design CAD Engineer , you will be instrumental in developing and supporting advanced implementation tools and flows that ensure our silicon achieves best-in-class Power, Performance, and Area (PPA). This is a unique opportunity to work alongside some of the most talented engineers in the world, driving cutting-edge innovations in physical design and EDA tooling. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 6+ years of hardware engineering experience OR Master's degree in a relevant field and 5+ years of experience OR PhD in a relevant field and 4+ years of experience Roles and Responsibilities Develop, integrate, and release new features in high-performance place-and-route CAD flows Architect and recommend methodology improvements to optimize power, performance, and area Maintain and debug implementation flows , resolving project-specific issues Collaborate with global CPU physical design teams, offering methodology guidance and tools/flow support Partner with EDA vendors to define roadmaps and resolve tool issues Preferred Qualifications Bachelor's or Master's degree in Electrical/Electronics Engineering or Computer Science 10+ years of hands-on experience in place-and-route for high-performance chips, either in CAD or design roles High proficiency in Tcl and Python scripting Experience in automation of CAD and physical design tasks Familiarity with a broad range of Physical Design tasks , including place-and-route, timing analysis, and physical design verification (PDV) Experience working with advanced technology nodes (e.g., 5nm and below) Strong understanding of digital design, timing analysis, and physical verification Proficient with industry-standard tools such as Cadence Innovus Demonstrated success in managing and regressing place-and-route flows

We are seeking an experienced ASIC Physical Designer to join our team in Hyderabad. The successful candidate will be responsible for designing and implementing complex ASICs, ensuring timely and efficient physical design closure.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Physical Design Planning. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: Analog Layout. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Physical Design Planning. Experience3-5 Years.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Job Role Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Skill Set * Proficiency in Python/Tcl * Familiar with Synthesis tools (Fusion Compiler/Genus), * Fair knowledge in LEC, LP signoff tools* Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking* Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus* Should be sincere, dedicated and willing to take up new challenges Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 6-12 years of experience in physical design from product-based/EDA companies. DDRPhy /PCIE-high speed interface PD Timing Signoff experience with SNPS/CDNS tools PDNIR signoff and Physical verification knowledge Automation skills python/Perl/TCL RDL-design + Bump Spec understanding for smooth SoC PDN integration and signoff Proficiency in automation to drive improvements in PPA Experience working on multiple technology nodes in advanced processes. Experience in low power design implementation, including Unified Power Format (UPF), multi-voltage domains, and power gating. Familiarity with ASIC design flows and physical design methodologies. Good to Have: Design level knowledge to optimize the implementation for PPPA Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Overview Experienced STA/Timing Engineer with 3-10 Years of hands-on experience on timing sign off/convergence for complex SOCs. Ability to start immediately on timing analysis/sign-off with PD/Methodology teams across multiple sites and different technology nodes. : STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools for methodology development. Good Technical writing and Communication skills. Willing to work in cross-collaborative environment. Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS ICC, Innovous , PT/Tempus Familiar with process technology enablementCircuit simulations using Hspice/FineSim, Monte Carlo. Education B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI. Preferred Qualification/Skills Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling. Hands-on experience with STA tools - Prime-time, Tempus Have experience working on timing convergence at Chip-level and Hard-Macro level. In-depth knowledge crosstalk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows, methods, and tools (ICC2, Innovus) Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation. Proficient is scripting languages- TCL, Perl, Python Basic knowledge of device physics Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Preferred Qualifications: Bachelor's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Principal Duties and Responsibilities: Applies Hardware knowledge to assist in the planning, verification, and testing of electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Provides support for the integration of features and functionality into hardware designs in line with proposals or roadmaps. Assists in conducting simulations and analyses of designs as well as with the implementation of designs with the best power, performance, and area. Collaborates with team members to assist in the implementation of new requirements and incorporation of the latest test solutions. Assists in the evaluation, characterization, and development of manufacturing solutions for leading edge products in processes. Assists in the evaluation of reliability for materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Assists in the assessment of basic design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes technical documentation for Hardware projects. Level of Responsibility: Works under supervision. Decision-making affects direct area of work and/or work group. Requires verbal and written communication skills to convey basic, routine factual information. Tasks consist of a limited number of steps and can be referenced using directions or manuals. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5 to 10 years of experience in static timing analysis, constraints and other physical implementation aspects. Solid understanding industry standard tools PT, Tempus, GENUS, Innovus, ICC etc. Solid grip on STA fixing aspects to solve extreme critical timing bottleneck paths. Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs. Should be aware about the tricks for minimizing power. Experience in deep submicron process technology nodes is strongly preferred. Knowledge of high performance and low power implementation methods is preferred. Willing to push PPA to the best possible extent. Strong fundamentals. Expertise in Perl, TCL language Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm Hexagon DSP IP's 8+ years of experience in Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux- Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Additional General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux- Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 5+ years Hardware Engineering experience or related work experience. 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.