688 Timing Analysis Jobs - Page 2

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engine...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engine...

General Summary: Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Job Description Responsibilities: STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime ...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NA Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your typical day will involve collaborating with team members to ensure the successful imple...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, your typical day involves analyzing, designing, coding, and testing various components of application code across multiple clients. You will engage in maintenance and enhancement tasks, ensuring that the software remains efficient and effective. Coll...

We are looking for a passionate and experienced EDA Methodology Engineer to join our ASICdesign team, focusing on Spyglass lint checking using Synopsys Spyglass for CDC/RDC. In this role, you’ll work closely with design teams and EDA vendors to develop and implement robust verification flows that ensure structural correctness across design stages Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or VLSIDesign. 5–8 years of hands-on experience with Synopsys Spyglass. Strong understanding of RTL design languages: VHDL, Verilog, SystemVerilog. Expertis...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1. Resolving SFDC functions related issues 2. Resolving BRE level issues 3. Educating internal and field teams on issues due to training requirements 4. Constant observations on the issues raised by the field team 5. Raising regular IT request to resolve issues 6. Constant communication between IT and Product teams to identify the changes 7. Attending bi-weekly meetings with IT to find the bigger solution 8. Find solutions to the repetitive pro...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1. Resolving SFDC functions related issues 2. Resolving BRE level issues 3. Educating internal and field teams on issues due to training requirements 4. Constant observations on the issues raised by the field team 5. Raising regular IT request to resolve issues 6. Constant communication between IT and Product teams to identify the changes 7. Attending bi-weekly meetings with IT to find the bigger solution 8. Find solutions to the repetitive pro...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1. Resolving SFDC functions related issues 2. Resolving BRE level issues 3. Educating internal and field teams on issues due to training requirements 4. Constant observations on the issues raised by the field team 5. Raising regular IT request to resolve issues 6. Constant communication between IT and Product teams to identify the changes 7. Attending bi-weekly meetings with IT to find the bigger solution 8. Find solutions to the repetitive pro...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1. Resolving SFDC functions related issues 2. Resolving BRE level issues 3. Educating internal and field teams on issues due to training requirements 4. Constant observations on the issues raised by the field team 5. Raising regular IT request to resolve issues 6. Constant communication between IT and Product teams to identify the changes 7. Attending bi-weekly meetings with IT to find the bigger solution 8. Find solutions to the repetitive pro...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1. Resolving SFDC functions related issues 2. Resolving BRE level issues 3. Educating internal and field teams on issues due to training requirements 4. Constant observations on the issues raised by the field team 5. Raising regular IT request to resolve issues 6. Constant communication between IT and Product teams to identify the changes 7. Attending bi-weekly meetings with IT to find the bigger solution 8. Find solutions to the repetitive pro...

Job Purpose This position is open with Bajaj Finance ltd. To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Culture Anchor:Work Hard - Consistently puts in effort. plans and tracks daily progress to achieve targetsExecute with Rigor - Takes responsibility for meeting targets with focus and effortOwn It - Maintains honesty and fairness in all interactions in line with organizations policiesAct with Integrity Duties and Responsibilities 1. Resolving SFDC functions related issues2. Resolving BRE level issues3. Educating internal and field teams on issues due to training requiremen...

Location: Bangalore, Hyderabad, Noida, and Coimbatore. Skills: Soc level floorplanning, partitioning, timing budget generations, power planning, SOC PnR, CTS, block integration Handling timing closure of high frequency blocks. Expertise in signoff closure Timing with SI and OCV, Power, IR and physical verification at both block and chip level. Understanding constraints and fixing techniques. Experience in physical verification Understanding SI prevention, fixing methodology and implementation. Proficient in Synopsys ICC or Cadence or Mentor Olympus and Atoptech tool set. Experience in Design Automation and UNIX system. Experience in Tcl/ PERL is a plus. Primary Skills: Able to handle Soc PNR...

Job details: Job Title: Digital RTL Design Engineer Location: On-Site Experience Level: Mid-Senior (3-7 years) Job Description: Responsibilities: Design and implement digital RTL for complex systems. Collaborate with verification engineers to ensure design meets all functional and performance requirements. Perform synthesis, timing analysis, and optimization to meet design specifications. Debug and resolve design issues, ensuring high-quality and reliable designs. Participate in design reviews and provide constructive feedback. Document design processes, specifications, and methodologies. Work closely with cross-functional teams (DFT, PD, DV) for integration and sign-off. Requirements: Bache...

Role Overview: As a Senior RTL Design Lead at Synopsys, you will play a crucial role in leading complex ASIC digital subsystems from concept to silicon. You will be responsible for crafting subsystem architectures, developing functional specifications, implementing micro-architectures, and ensuring compliance with best RTL coding practices. Your expertise in industry-standard protocols such as PCIe, DDR, UFS, USB, and AMBA will be essential in integrating them within subsystem designs. Additionally, you will mentor junior engineers, participate in technical reviews, and drive innovation within the team. Key Responsibilities: - Lead the complete subsystem lifecycle, from requirements gatherin...

SYMPHISYS SOFTWARE CONSULTING is looking for ASIC Physical Design Engineer to join our dynamic team and embark on a rewarding career journey Collaborate with cross-functional teams to achieve strategic outcomes Apply subject expertise to support operations, planning, and decision-making Utilize tools, analytics, or platforms relevant to the job domain Ensure compliance with policies while improving efficiency and outcomes Disclaimer: This job description has been sourced from a public domain and may have been modified by Naukri.com to improve clarity for our users. We encourage job seekers to verify all details directly with the employer via their official channels before applying.

Job Description Hand-on experience and Comprehensive knowledge of Static Timing Analysis. Hands-on experience in Logical aware Synthesis, Logical Equivalence check and, Static Timing analysis. Hands-on the DMSA flow to fix pre and post STA timing. Knowledge in the Timing closure on Sub-system level & Block level and Chip level. Knowledge in writing Manual ECOs to fix timing violations and DRCs. Knowledge of constraint development. Good Knowledge of TCL scripting and UNIX env. Leading the team of 4 to 5 team members by guiding and mentoring on the STA /Synthesis. Pre-layout timing analysis and report out Post layout timing analysis for placement, CTS & PRO Clock gating checks and timing closu...

We are looking for a skilled professional with 5-15 years of experience to join our team as an SCOM in IDESLABS PRIVATE LIMITED, located in [location to be specified]. The ideal candidate will have a strong background in recruitment services and excellent communication skills. Roles and Responsibility Manage and coordinate recruitment activities to meet client requirements. Develop and implement effective recruitment strategies to attract top talent. Build and maintain relationships with clients and candidates for successful placements. Conduct interviews and assessments to identify the best candidates. Collaborate with internal teams to ensure seamless recruitment processes. Analyze recruit...

Expertise in ABAP and ABAP on HANA and oData Experience with analysis tools like Run time analysis, SQL Trace, code inspector and SAP ABAP Test Cockpit to check the quality of the ABAP code and optimize for SAP HANA. ABAP code pushdown and Data modelling, CDS views and AMDP Experience in correcting customer exit changes after upgrade/migration of SAP S/4 HANA. Hands-on Experience on SAP ECC on HANA migration projects Transform traditional ABAP programs in legacy SAP system into S/4 HANA architecture. Design and implement CDS and AMDP based on the business requirement.Adobe forms development in S/4 HANA (Online and Offline scenarios)Compile Technical Specification document for all the develop...

Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/ Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementatio n (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 20+ years Hardware Engineering experience or related work experience. 17+ years experience with PNR flo...

This exciting position as Silicon Design Engineer 2 in AMDs Silicon IP solutions & SOC group will provide the individual with an opportunity to kickstart his/her career in RTL IP design and Productization. Join us in providing innovative IP solutions as we embark on our journey into the cutting edge programmable logic based silicon designs by delivering the complex IP Solutions for multiple market segments As a Silicon Design Engineer 2 you will work as part of a team responsible for all phases of product development including product definition and delivery. Silicon Design Engineer 2 is expected to understand the u-Architecture definition for an individual IPs or IP subsystems and design an...

As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs. As a member of the physical integration and verification team , you will work closely with the physical design implementation, IP teams and fab contacts to achieve quality tapeout and first pass silicon success. THE PERSON: A successful candidate will work on full chip SoC physical integration, verification and tapeout with physical design engineers. The candidate is expected to be detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Drive Full chip physical integration and verification (DRC/LVS, ERC, DFM checks) Work with fab and fab contacts for all the ta...

Timing System Architect Location: Bangalore North Role Overview This is a hands-on technical and design-heavy role responsible for developing the Timing Subsystem for the PNT Payload completely from scratch. The engineer will work directly on atomic clock integration (OCXO, Rubidium, mRO, CSAC) and analog control circuit development to achieve a highly stable frequency/time output . The person will also perform testing, validation, and system-level integration while working cross-functionally with the payload, RF, and avionics teams . This is a build-from-ground-up role , not a maintenance or optimization role. Key Expectations The engineer will design, test, and validate the entire timing s...

Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from de...