838 Timing Analysis Jobs - Page 2

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

Role Overview: As the ASIC Back-End Head at Wipro Limited, you will be responsible for leading the physical design and implementation of Application-Specific Integrated Circuits (ASICs) to ensure optimal performance, power efficiency, and manufacturability. Your strategic leadership will define and execute the ASIC back-end design roadmap, overseeing synthesis, floorplanning, placement, routing, timing closure, and sign-off. You will work on physical design optimization to meet Power, Performance, and Area (PPA) targets, leveraging EDA tools such as Synopsys, Cadence, and Mentor Graphics for ASIC implementation. Collaboration with design, verification, DFT, and packaging teams will be essent...

As an HW engineer at Kinara, your role involves board design and verification of hardware products. You will collaborate closely with other functional teams during development and liaise with vendors and agencies throughout the product development process. Your responsibilities will also include developing software applications to showcase Deep Learning use cases, particularly in vision analytics workloads. Additionally, you will be creating application notes and documentation on software tool flows, as well as conducting performance and power measurement and analysis of Embedded AI systems. Key Responsibilities: - Design and verify new digital circuits/boards for hardware products - Select ...

You have 24 years of experience in ASIC Physical Design and Timing Analysis. You have hands-on expertise with tools such as: - Physical Design: Innovus, ICC2, Fusion Compiler, or similar - STA: PrimeTime, Tempus - Physical Verification: Calibre, Pegasus The open positions available are: - PD- 2-4 years (Chennai) - STA - Top level or Fullchip - 4+ years (Bangalore/Pune/Hyderabad) Your notice period should be immediate to 30 days.,

You are a highly skilled and experienced Full Chip RTL Design Architect with over 15 years of experience, seeking to join a dynamic team in Bangalore, Hyderabad, or Pune. Your role will involve a deep understanding of RTL design and SoC architecture, contributing to innovative semiconductor design solutions to drive successful chip-level RTL designs. **Key Responsibilities:** - **RTL Architecture and Design:** - Define and develop full chip architecture and RTL designs for complex SoCs. - Drive top-level integration of IPs and subsystems into full chip designs, ensuring design quality and efficiency. - Collaborate on micro-architectural specifications for seamless implementation. - **Design ...

ROLE & RESPONSIBILITIES Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal integrity, Power grid analysis atc in ASIC PNR Flow Engineer will be responsible for executing the block level place and route assignments from Netlist through GDS flow Should be able to do full chip implementation of complex SoCs (RTL-to-GDSII), but it is not must. To close STA timing across all corners and modes for blocks and should be able to generate ECO independently. Will be responsible to Work with design teams for closing CTS, IO timing, DFT timing. Responsible f...

Director- Physical Design About Semifive Founded in Seoul in 2019, SEMIFIVE is basing its foundation on Korea's semiconductor design competency that was amassed for more than 20 years. With expertise spanning front-end to back-end design, SEMIFIVE has become the fastest growing silicon design company that offers the most comprehensive design solutions. SEMIFIVE's core business is its innovative SoC Platform that enables low-cost and high-efficiency SoC design, and also provides full turnkey design services for global customers through its diverse network. As the cost of developing an SoC and the demand for customized silicon continue to grow rapidly, SEMIFIVE's SoC Platform will play a key r...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engine...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engine...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Verification Good to have skills : NA Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :Full chip / Subsystem / Block level Physical verification for deep submicron technology 7nm and belowExpertise in LVS, ERC, PERC, DRC, Antenna, DFM, DensityDeep understanding of ESD analysisGood exposure to BUMP and RDL planningHands on experience with Innovus / Fusion compiler ...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1.Conduct verification of the module/ IP functionality and provide customer support a.Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b.Create test bench development and test case coding of the one or multiple module c.Write the codes or check the code as required d.Execute the test cases and debug the test cases if required e.Conduct functional coverage analysis and document the test cases inc...

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test ca...

Role Overview: Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) team is responsible for powering Microsoft's Intelligent Cloud mission by delivering core infrastructure and foundational technologies for Microsoft's online businesses globally. As a Sr. Physical Design Engineer, you will play a crucial role in optimizing blocks for Power, Performance, and Area, ensuring design specifications are met, and collaborating with cross-functional teams to drive technical solutions for managing and optimizing the Cloud infrastructure. Key Responsibilities: - Own execution from synthesis to place and route of partitions through floorplanning for optimizing blocks for Power, Per...

As an experienced SoC/IP Design professional with 8-12 years of experience, your role will involve the following key responsibilities: - Writing detailed IP specifications, microarchitecture, IP design, subsystem, and SoC level integration - Expertise in RTL development following coding standards, with proficiency in lint, CDC tools, verification, and debugging of test cases, code, and functional coverage analysis - In-depth understanding of clocking methodology and low power implementation - Hands-on experience in writing constraints, performing synthesis, timing analysis, and design for test implementation - Familiarity with power partitioning, CPF/UPF usage, and IP design for ARM Microcon...

Job Description Seeking a highly motivated and innovative Senior digital design engineer with knowledge of ASIC development flow. As a Senior Staff IC Design Engineer at Renesas India, you will play a crucial role in the design and development of advanced integrated circuits that power our innovative MCU products. You will leverage your expertise in IC design to lead complex projects, mentor junior engineers, and drive the evolution of our design methodologies and processes. Responsibilities Lead the RTL synthesis and constraints generation/validation for MCU SoCs, ensuring they meet performance, power, and area specifications Develop and implement innovative implementation methodologies and...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NA Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your typical day will involve collaborating with team members to ensure the successful imple...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, your typical day involves analyzing, designing, coding, and testing various components of application code across multiple clients. You will engage in maintenance and enhancement tasks, ensuring that the software remains efficient and effective. Coll...

SUMMARY Max CTC : 21,330 Work Timings : US Shift/ Night Shift Contract Duration : 6 months Work location : CDC 5,Shollinganallur Important Pointers Candidate should be flexible to WFO Should be comfortable in International Voice Process. English communication should be excellent. Retention Bonus will be paid as follows 3months 5,000 3+6months -10,000 3+6+6months 10,000 Requirements Any Non Technical Graduates with Good communication skill Eligible. No PG and BE / BTECH Graduate is Eligible Should be able to Speak & Write good English with proper punctuation & grammar. Benefits PF,ESI BOTH WAY CAB(Pickup and drop will be provided) Work From office

Job Description If you are passionate about pushing the boundaries of Design technology and thrive in a collaborative, dynamic environment, we invite you to join our team as a Design Engineer. Join us to be part of our journey in shaping the future of SoC design and innovation. Responsibilities As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team integrating IP and developing logic for SoCs. You will work with the project team to understand and review the architecture a nd develop the design specifications. Your key responsibilities will include writing micro-architecture specifications, developing the RTL, fixing bugs and running various design ch...

You are a senior hardware board design engineer with over 5 years of experience, based in Vadodara, India. Your role involves leveraging your systems knowledge and ability to grasp high-level concepts to quickly realize results in hardware board design. Key Responsibilities: - Work on various stages of hardware product development cycles - Design high-speed boards - Utilize protocols such as PCIe, USB3.0, MIPI CSI/DSI, LVDS, HDMI, DDR3/4, SD/eMMC, NAND, SPI/I2C - Work with peripherals like Image sensors, LCD displays, flash memory, etc. - Conduct timing, pre and post-signal integrity analysis using simulation tools - Design board power supply including switching and linear regulators and pow...

Senior ASIC Design Engineer XBAR IP Location: Bengaluru, India Job Type: Full-time Role Summary :: We are looking for a Senior ASIC Design Engineer to join the client's Graphics team, contributing to the design of cutting-edge memory subsystem and interconnect (XBAR) IP used in world-leading GPU products. This role involves end-to-end RTL design, micro-architecture, collaboration across hardware and verification teams, and contributing to advanced computing platforms spanning graphics, AI, and autonomous systems. 2. Key Responsibilities A. RTL & Micro-Architecture Ownership Own micro-architecture and RTL development for assigned design modules. Define and implement features that meet perform...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience OR Master's degree in Computer Science, Electrical/Electronics Engineeri...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Sci...

Position: Physical Design Engineer, immediate Joiners and 30Days Notice Location: Bangalore Experience: 412 Years Role Overview: Block-level Physical Design from RTL/Netlist to GDSII Physical, Timing & Power Signoff at block level ECO generation and closure Scripting & automation using Perl, Tcl, Awk, Python Lead Role: Manage a team of 4–6 engineers and act as client SPOC Requirements: Strong expertise in Physical Design flows and signoff methodologies Excellent technical and communication skills Proven experience in leading small project teams (for Lead role)