8 Testbenches Jobs

As a Functional Verification Engineer, you will be responsible for verifying RTL designs using SystemVerilog and UVM. Your role involves developing testbenches, building reusable components, and ensuring complete functional coverage of IPs or SoC-level designs. Key Responsibilities: - Develop and maintain UVM-based testbenches for IP/subsystem/SoC verification - Create test plans from microarchitecture/design specifications - Write and debug directed and constrained-random tests - Implement functional coverage, assertions (SVA), and checkers - Run regressions using simulators like VCS, Xcelium, or Questa - Interface with RTL, DFT, and Firmware teams to track and resolve bugs - Analyze wavefo...

Over 10 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow Proficient with Verilog, System Verilog and UVM. Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard) Good in defining and developing UVM based verification frameworks, testbenches, processes and flows. Good in working in Linux and Windows environments. Familiarity with power aware simulation and firmware/hardware co-verification is a plus. Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus. Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.

Minimum qualifications: Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. 4 years of experience with design Verification, with a emphasis on ARM CPU verification. Experience verifying ARM CPU designs. Experience with CPU design tools and methodologies specific to ARM. Preferred qualifications: Master's or PhD degree in Electrical Engineering or Computer Science. Experience in scripting languages (Python, Perl) for automation and analysis. Excellent communication and people management skills, with the ability to collaborate effectively across teams. About the job Be part of a team that pushes boundaries, developing custom silicon solutions th...

As an AMS Design, Verification and Layout professional with 4+ years of experience in the Semiconductor domain, your role will involve: - Designing analog and mixed-signal circuits like amplifiers, data converters, PLLs, and regulators. You will conduct detailed transistor-level simulations including DC, AC, transient, PVT, and Monte Carlo. - Developing and maintaining behavioral models using Verilog-A/AMS. You will also create comprehensive testbenches for mixed-signal co-simulation with digital blocks. - Executing block-level and top-level verification, encompassing functional, corner-case, noise, and signoff simulations to ensure design adherence to specifications in all scenarios. - Crea...

Job description In this role, you will be creating UVM testbenches for a SoC and IP, as well as tests, regressions, and functional coverage to achieve zero bug escapes. You will interface with the designers to develop the test plans, and from that develop testcases and coverage to thoroughly verify the RTL. Your regressions will grow to cover the full functionality of the design relative to the architectural simulator and will include corner case testing for the more challenging cases. Your test and coverage reviews will ensure key coverage. ESSENTIAL DUTIES AND RESPONSIBILITIES: Create UVM testbenches, tests, and constraints to ensure design correctness Design, develop, and maintain modular...

As an FPGA Lead at our company, you will be responsible for designing, simulating, and implementing digital logic circuits on FPGAs using VHDL or Verilog. You will collaborate with hardware and software teams to integrate FPGA designs into larger systems, develop testbenches, and perform functional simulations to verify FPGA designs. Additionally, you will be involved in synthesis, place and route, and timing analysis using industry-standard FPGA toolchains such as Xilinx Vivado and Intel Quartus. Your role will also include debugging and validating FPGA designs on target hardware using oscilloscopes, logic analyzers, and in-system debugging tools. You will optimize FPGA designs for performa...

The position is with one of our IDM client. As a Functional Verification Engineer, you will be responsible for verifying RTL designs using SystemVerilog and UVM. You will develop testbenches, build reusable components, and ensure complete functional coverage of IPs or SoC-level designs. Key Responsibilities: - Develop and maintain UVM-based testbenches for IP/subsystem/SoC verification - Create test plans from microarchitecture/design specifications - Write and debug directed and constrained-random tests - Implement functional coverage, assertions (SVA), and checkers - Run regressions using simulators like VCS, Xcelium, or Questa - Interface with RTL, DFT, and Firmware teams to track and res...

Come build community, explore your passions, and do your best work at Microsoft with thousands of University interns from every corner of the world. This opportunity will allow you to bring your aspirations, talent, potential, and excitement for the journey ahead. As a Silicon Engineering Intern, you will design, develop, modify, and evaluate electronic parts, components, or integrated circuitry for digital electronic devices and other digital electronic systems. You will define design architecture and operating parameters for circuitry and microelectronic components, as well as select components and equipment based on analysis of specifications and reliability. Analyzing designs and compone...