5.0 - 9.0 years

0 Lacs

karnataka

On-site

As a Senior Lead Engineer in SOC Verification with 5+ years of experience, you will be responsible for ensuring the successful verification of complex System on Chip designs. Your expertise in System Verilog, UVM, and testbench methodologies will be crucial in debugging functional failures and identifying RTL issues. Additionally, your familiarity with formal verification techniques will be advantageous. Your role will require you to work both independently and collaboratively in a fast-paced environment, demonstrating a willingness to extend work hours when necessary to meet critical project milestones. Your ability to verify fixes and provide root-cause analysis will be essential in maintaining the integrity of the ASIC designs. Located in Bangalore, you should be an immediate joiner with a strong background in SOC Verification. If you possess the skills mentioned above and are ready to take on this challenging role, we encourage you to apply and be part of our dynamic team.,

Posted 1 day ago

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