Soc Verification Engineer - DV - ARM Coventine Digital

5.0 - 10.0 years

8 - 16 Lacs

Bengaluru

Work from Office

Job Description : We are looking for experienced SoC Verification Engineers with a strong background in ARM-based SoC architectures . Key Responsibilities : Perform verification at SoC level for ARM-based designs Develop, implement, and debug testcases and verification environments Work closely with RTL, DFT, and firmware teams to ensure high-quality SoC delivery Handle integration and verification of various IPs within the SoC Required Skills : 5+ years of experience in SoC-level verification Strong knowledge of ARM architecture (Cortex-A/M, AMBA protocols, etc.) Expertise in SystemVerilog/UVM , testbench development, and scripting Familiarity with simulation tools like VCS, Questa, etc. Ex...

Posted 4 months ago

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ASIC Digital Design, Sr Engineer Synopsys (India) Private Limited

3.0 - 6.0 years

3 - 6 Lacs

Hyderabad / Secunderabad, Telangana, Telangana, India

On-site

Create comprehensive test plans and verification strategies aligned with specifications Develop modular and reusable testbenches using SystemVerilog Write both directed and random tests to validate functionality Perform functional and code coverage modeling, analysis, and reviews Debug mismatches between RTL design and C-model behavior Integrate internal and third-party verification IP for full-chip simulations Review and optimize existing test suites and verification environments Mentor junior engineers and assist in skill development Ensure test plans are fully traceable to design specifications using coverage databases The Impact You Will Have: Lead innovation in processor and IP verifica...

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ASIC Digital Design Verification, Staff Engineer Synopsys (India) Private Limited

3.0 - 6.0 years

3 - 6 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

What You'll Be Doing: Developing and reviewing verification plans for SERDES/PHY/Controller IPs. Creating and maintaining verification environments, with a preference for UVM. Conducting RTL, GLS, and co-simulations to ensure comprehensive coverage closure. Delivering high-quality RTL and simulation models to customers. Using third-party VIP for protocol verification and simulation bring-up of protocol subsystems. Supporting customers with IP integration, silicon bring-up, and debugging issues. Demonstrating Testchip+FPGA system demos to customers and at conferences. The Impact You Will Have: Ensuring the compliance and functionality of our interface IPs with industry protocols. Enhancing th...

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R&D Engineering, Staff Engineer - IP Verification Synopsys

3.0 - 5.0 years

3 - 7 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol

Posted 5 months ago

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Staff ASIC RTL Digital Design Engineer Synopsys

5.0 - 10.0 years

3 - 13 Lacs

Pune, Maharashtra, India

On-site

Description We are seeking a Staff ASIC RTL Digital Design Engineer to join our dynamic team in India. The ideal candidate will have a strong background in ASIC design and will be responsible for developing high-quality RTL designs, participating in verification processes, and collaborating with multiple teams to ensure successful project completion. Responsibilities Design and implement RTL code for ASIC digital circuits. Perform RTL simulations and verification using tools like ModelSim or VCS. Collaborate with verification engineers to ensure design functionality and performance. Participate in design reviews and provide constructive feedback. Work closely with physical design teams to en...

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