SOC Design Verification Engineer Proxelera

4.0 - 10.0 years

0 Lacs

bengaluru, karnataka, india

On-site

4 to 10 years experience in SoC/Subsystem Design Verification SystemVerilog and UVM Testbench creation experience is a must Own and drive Defining/Implementation of test plans Debugging complex issues Completion of coverage including gate-level simulations Experience in writing SVA (SystemVerilog Assertions) is a must Protocol Expertise (Deep knowledge and hands-on expertise) on one or more of the following PCIe, UCIe, CXL, or NVMe AXI, ACE or CHI Ethernet DDR, LPDDR or HBM Should have worked on verification of at least three full-chip/subsystem DV projects EDA tools Synopsys VCS/ Cadence Xcelium and Verdi debugger Experience of Power Aware Simulations using UPF is desirable (not a must) Exp...

Posted 4 weeks ago

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SMTS Verification Engineering Rambus

6.0 - 8.0 years

0 Lacs

bengaluru, karnataka, india

Remote

Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional SMTS Verification Engineer to join our Security IP team in Bangalore, India . In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. As a Lead MTS Verification Engineer, you'll play a pivotal role in the verification of secure ASIC cores developed by Rambus Security Division (RSD), working with cross functional teams including ASIC design engineers and architects, other verification engineers and system test engineers, security experts, and cryptographers. Cryptography and hardwa...

Posted 2 months ago

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Head of Sales Coventine Digital Private Limited

6.0 - 10.0 years

0 Lacs

vijayawada, andhra pradesh

On-site

You are invited to join Coventine Digital Private Limited as a Senior/Lead Design Verification Engineer based in Siruseri, Chennai. In this role, you will have the opportunity to work closely with a top-tier client and play a pivotal role in developing next-gen chip-level verification environments utilizing System Verilog and UVM methodologies. This is a full-time position that requires you to work from the office. As a Senior/Lead Design Verification Engineer, you will be responsible for functional verification at both block and chip levels for complex designs. Your tasks will include developing verification test plans based on detailed design specifications, constructing UVM-based simulati...

Posted 5 months ago

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Sales Coventine Digital Private Limited

6.0 - 10.0 years

0 Lacs

vijayawada, andhra pradesh

On-site

You are invited to join Coventine Digital Private Limited as a Senior/Lead Design Verification Engineer in Siruseri, Chennai! In this role, you will have the opportunity to work directly with a prominent client, contributing to the development of next-generation chip-level verification environments utilizing System Verilog and UVM methodologies. As a Senior/Lead Design Verification Engineer, you will be responsible for functional verification at both block and chip levels for complex designs. You will play a crucial role in developing verification test plans based on detailed design specifications and constructing UVM-based simulation environments using System Verilog. Additionally, you will...

Posted 5 months ago

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Ams Verification Engineer Einfochips

4.0 - 9.0 years

4 - 9 Lacs

Ahmedabad, Gujarat, India

On-site

Key Responsibilities: Min 4 Years of overall experience in ASIC Verification Should have worked on AMS Verification for minimum of 2 years Develop and execute verification plans for AMS designs. Create test benches and run simulations using tools like Cadence Virtuoso, Spectre, or AMS Designer. Verify mixed-signal blocks (e.g., ADCs, DACs, PLLs) and ensure proper analog-digital interaction. Debug and resolve design issues in collaboration with design teams. Document verification results and ensure compliance with design specifications.

Posted 6 months ago

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