6 Tcltk Jobs

You will be responsible for executing internal projects or small tasks within customer projects related to VLSI Frontend, Backend, or Analog design with minimal supervision from the Lead. Your role will involve working as an Individual contributor on tasks such as RTL Design, Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. You will be expected to analyze and complete assigned tasks within the defined domain successfully and on time with minimal support from senior engineers, ensuring quality delivery as approved by the senior engineer or project lead. Quality of deliverables is a key focus, requiring clean delivery of modules that are easy to integrate at the top level, meeting functional specifications and design guidelines without deviation. Timely delivery is crucial, meeting project timelines set by the team lead or program manager and assisting in the delivery of intermediate tasks by other team members to ensure overall progress. Teamwork is essential, involving active participation and support for team members when needed, along with the ability to perform additional tasks if necessary. Innovation and creativity are encouraged, with a proactive approach towards automating tasks to save design cycle time and active participation in technical discussions. Your skills should include proficiency in languages and programming such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, and Spice. Familiarity with EDA tools like Cadence, Synopsys, and Mentor, along with technical knowledge in areas such as IP Spec Architecture, Micro Architecture, Bus Protocols, Physical Design, Circuit Design, and Analog Layout is required. Knowledge of technology including CMOS, FinFet, FDSOI, and experience in previous projects related to RTL Design, Verification, DFT, Physical Design, STA, PV, Circuit Design, or Analog Layout is beneficial. You should possess strong communication skills, good analytical reasoning, problem-solving abilities, attention to detail, and the capability to learn new skills as required. Delivering tasks with quality and on time, per quality guidelines and GANTT, is essential. Your role as an Assistant Engineer at UST will involve executing Standard Cell characterization tasks, debugging failures, and utilizing tools such as PrimeLib, Liberate, Redhawk, and CCSP/PGV characterization. Experience in Python coding and API coding is a plus. A Bachelor's or Master's degree in Engineering is required with 2-8 years of relevant experience.,

Are you looking for a unique opportunity to be a part of something great Want to join a 20,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where over a thousand people are proudly enrolled annually. The company takes pride in its commitment to employee development, values-based decision making, and a strong sense of community, driven by its Vision, Mission, and 11 Guiding Values. This approach, referred to as the Aggregate System, has won Microchip countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo. Microchip achieved record revenue and over 30 years of quarterly profitability thanks to a great team dedicated to empowering innovation people like you. Visit our careers page to explore the exciting opportunities and company perks awaiting you! **Job Description:** **Company Description** Microchip Technology Incorporated is a leading supplier of field-programmable embedded control solutions. The company delivers a broad spectrum of innovative microcontrollers, analog, mixed-signal and security products, wired and wireless connectivity products, related non-volatile memory products, and Flash-IP solutions. **Data Center Solutions (DCS) Business Unit** The Data Center Solutions Business Unit within Microchip designs enterprise-class storage products to enable the world's leading enterprises and data centers. These products utilize the latest RAID, Security, PCIe, NVMe, SAS, SATA, SDRAM, NAND, and CXL technologies. As a member of the Applications Engineering team, a successful applicant will provide best-in-class technical support to customers for one or more of the Data Center Solution products. The Applications Engineering Team works closely with Product Development, Product Validation, Marketing, and Sales teams to support customers in evaluating, developing, and ramping up production with the solutions. This role involves developing and delivering training, customer collaterals, and debug tools, as well as resolving problems and challenges. The position offers a challenging and dynamic working environment with opportunities to learn and contribute substantially to the business's success. **Responsibilities:** - Support, manage, and resolve technical issues related to DCS Hardware and Firmware/Software products - Debug Firmware, Software, and protocol level issues for enterprise storage devices - Customize firmware, instrument firmware, create patches for bug fixes or workarounds - Develop and maintain customer collaterals such as FW User Manual, Quick Start Guide, Release Notes, Errata, Application Notes, etc. - Develop and provide product training to customers and internal teams - Develop debug tools using C, Python, TCL/Tk - Reproduce customer-reported problems and perform root cause analysis - Measure, analyze, and optimize performance - Perform competitive analysis and create reports - Lead and mentor a small team - Collaborate with North American, China, and Taiwan teams **Requirements/Qualifications:** **Qualifications** - Bachelors/Masters degree in Electronics or equivalent Engineering - Minimum 12.5 years of experience in related fields - Strong Firmware/Embedded Systems development and debug skills - Experience in designing, developing, and testing firmware using C language - Experience in developing debug tools using scripting languages (Java, TCL/TK, PERL, Python, etc.) - Experience or knowledge of Computer Architecture - Experience or knowledge of Operating System fundamentals - Strong knowledge or experience in PCIe protocol - Excellent communication, interpersonal skills, problem-solving skills, and the ability to work independently and as part of a team **Desired Qualifications:** - Experience in SSD Firmware Development - Experience or knowledge of SSD Architecture - Experience with tools such as FIO, SPDK, GIT - Experience or knowledge of storage protocols like NVMe or TCP/IP or SAS/SATA protocol - Experience or knowledge of debugging SDRAM or NAND Flash memory failures - Experience or knowledge of high-speed PCIe Serdes - Experience or knowledge of error correction algorithms such as LDPC - Experience in the use of lab equipment such as Bus Analyzers, JTAG, Emulators - Experience with Linux as a development environment - Experience or knowledge of AI/ML **Travel Time:** 0% - 25% To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.,

Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. If you flourish in a fast-paced, results-oriented environment, want to achieve individual success within a team-first organization, and believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for. Lattice Semiconductor is seeking a development test engineer to join the EDA tools development team in Pune. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn, and grow. As a development test engineer at Lattice, you will work closely with the EDA tools development team to understand new features and develop validation plans for those features in Verilog or HDL. You will implement and maintain tests for the EDA tools covering both back-end and the GUI modules using Squish or QtTest. Participation in Agile scrum process to support a high productivity and high impact EDA tools team will be expected. Additionally, you will lead test automation efforts to convert all manual test cases into fully automated test-suites for our development tests and assist with special projects and other duties as assigned. The ideal candidate for this role will have a bachelor's or master's degree in computer science, electronics/electrical engineering, or equivalent. Strong technical development testing skills in the context of C++ development are required. Additionally, very good knowledge and experience in automation and scripting with familiarity in TCl/Tk and Python are essential. Strong written and verbal communication skills, including the ability to effectively communicate technical issues to individuals at all levels of a global organization, will be beneficial. The ability to work in a fast-paced environment, prioritize appropriately, and manage competing priorities is a key attribute for success in this role. Lattice Semiconductor recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. A comprehensive compensation and benefits program is provided to attract, retain, motivate, reward, and celebrate the highest caliber employees in the industry. Lattice is an international, service-driven developer of innovative low-cost, low-power programmable design solutions. The global workforce, approximately 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how Lattice's FPGA, CPLD, and programmable power management devices help customers unlock their innovation, visit www.latticesemi.com. Lattice values the diversity of individuals, ideas, perspectives, insights, and values that employees bring to the workplace. Applications are welcome from all qualified candidates. Feel the energy with Lattice.,

You will be responsible for designing and maintaining the GUI component of the in-house tool Timevision at Ausdia Software India Private Limited, located in Bangalore, India. With 4 to 5 years of relevant experience, you should hold a degree in Computer Science or ECE/EEE. Your role will require extensive work experience in Tcl/Tk, particularly in the EDA domain software for the design and development of GUI tools. Familiarity with working with verilog netlists, good problem-solving and analysis skills, as well as knowledge of UNIX commands and utilities are essential. The ability to work independently in a fast-paced start-up environment is a must. Ausdia is a fast-paced, growing EDA company recognized as a leader in timing constraints generation, verification, management, and CDC analysis. The Timevision platform tools are utilized by top-tier semiconductor companies worldwide for developing cutting-edge chips. We are seeking dynamic, innovative individuals who are self-starters and wish to play a significant role in their own success and that of the organization. As a full-time employee at Ausdia, you will receive competitive salaries, excellent work-life balance, health insurance benefits, term insurance benefits, and employee stock options. Join us in shaping the future of semiconductor technology and making a substantial impact in the industry.,

You will be responsible for executing customer projects independently with minimum supervision, guiding team members technically in various fields of VLSI Frontend Backend or Analog design. As an individual contributor, you will take ownership of tasks/modules such as RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, Signoff, etc., leading the team to achieve results. Your responsibilities will include completing assigned tasks successfully and on-time within the defined domain(s), anticipating, diagnosing, and resolving problems, coordinating with cross-functional teams as necessary, delivering on-time quality work approved by the project manager and client, automating design tasks flows, writing scripts to generate reports, and coming up with innovative ideas to reduce design cycle time and cost accepted by UST Manager and Client. Additionally, you will be expected to write papers, file patents, and devise new design approaches. Your performance will be measured based on the quality of deliverables, timely delivery, reduction in cycle time and cost, number of papers published, number of patents filed, and number of trainings presented to the team. You will be expected to ensure zero bugs in the design/circuit design, deliver clean design/modules for ease of integration, meet functional specifications/design guidelines without deviation, and document tasks and work performed. Furthermore, you will be responsible for meeting project timelines, facilitating other team members" progress by delivering intermediate tasks on time, and seeking help and support in case of any delays. Your role will also involve active participation in team work, supporting team members as needed, anticipating when support may be required, and being able to explain project tasks and support delivery to junior team members. Your creativity and innovation will be showcased through tasks such as automating processes to save design cycle time, participating in technical discussions, training forums, white paper or patent filings, and contributing to technical discussions. Your skill set should include proficiency in languages and programming skills such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, Makefile, Spice, and familiarity with EDA Tools like Cadence, Synopsys, Mentor tool sets, and various simulators. You should have strong technical knowledge in IP Spec Architecture Design, Micro Architecture, Bus Protocols, Physical Design, Circuit Design, Analog Layout, Synthesis, DFT, Floorplan, Clocks, P&R, STA, Extraction, Physical Verification, Soft/Hard/Mixed Signal IP Design, and Processor Hardening. Additionally, you should possess communication skills, analytical reasoning, problem-solving skills, and the ability to interact effectively with team members and clients. Your knowledge and experience should reflect leadership and execution of projects in areas such as RTL Design, Verification, DFT, Physical Design, STA, PV, Circuit Design, Analog Layout, and understanding of design flow and methodologies. Independent ownership of circuit blocks, clear communication, diligent documentation, and being a good team player are essential attributes for this role. Overall, your role will involve circuit design and verification of Analog modules in TSMC FinFet technologies, developing circuit architecture, optimizing designs, verifying functionality, performance, and power, as well as guiding layout engineers. Strong problem-solving skills, results orientation, attention to detail, and effective communication will be key to your success in this position.,

As an experienced professional with 7-9 years of experience, you will be responsible for executing customer projects independently with minimal supervision in the field of VLSI Frontend Backend or Analog design. Your role will involve guiding team members technically and taking ownership of specific tasks/modules related to RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. You will lead the team to achieve results, complete assigned tasks successfully and on-time, and anticipate, diagnose, and resolve problems as necessary. Your responsibilities will also include ensuring on-time quality delivery approved by the project manager and client, automating design tasks flows, writing scripts to generate reports, and coming up with innovative ideas to reduce design cycle time and cost. Additionally, you will be expected to write papers, file patents, and devise new design approaches. To measure the outcomes of your work, quality will be verified using relevant metrics by UST Manager/Client Manager, timely delivery will be assessed based on relevant metrics, and the reduction in cycle time and cost using innovative approaches will be monitored. The number of papers published, patents filed, and trainings presented to the team will also be considered. Your outputs are expected to demonstrate high quality deliverables with zero bugs in the design/circuit design, clean delivery of the design/module, meeting functional specs/design guidelines without deviation, and thorough documentation of tasks and work performed. Timely delivery, teamwork, innovation, and creativity will be key aspects of your role, along with participation in technical discussions and training forums. Your skills should include proficiency in languages and programming skills such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, and Makefile. You should have experience with EDA tools like Cadence, Synopsys, and Mentor tool sets, as well as technical knowledge in IP spec architecture design, bus protocols, physical design, circuit design, analog layout, synthesis, DFT, floorplan, clocks, P&R, STA, extraction, physical verification, and more. Strong communication skills, analytical reasoning, problem-solving abilities, attention to detail, and the ability to interact with team members and clients effectively are essential. You should also be well-versed in using available EDA tools, delivering tasks on time per quality guidelines, understanding standard specs and functional documents, and continuously learning new skills as needed. If you have led and executed projects in RTL Design, Verification, DFT, Physical Design, STA, PV, Circuit Design, Analog Layout, and possess a good understanding of design flow and methodologies, this role could be a great fit for you. Additionally, experience in analog circuit design and verifications, knowledge of TSMC FinFet technologies, and familiarity with Cadence Virtuoso circuit design suite would be beneficial. In this role, you will be responsible for circuit design and verification of analog modules like Voltage regulator, LDOs, developing circuit architecture, optimizing designs, guiding layout engineers, problem-solving, and effective communication skills. Desired skills include solid CMOS Analog design fundamentals, hands-on experience with Cadence Virtuoso, technical knowledge of power-performance trade-offs, understanding device parameter variation, and being a good team player in a multi-site work environment. Join us at UST, a global digital transformation solutions provider, where you will work alongside the world's best companies to make a real impact through transformation. With deep domain expertise, innovation, and agility, UST partners with clients to embed innovation and create boundless impact, touching billions of lives in the process.,