Job Purpose "This position is open with Bajaj Finance ltd." To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1.Resolving SFDC functions related issues 2.Resolving BRE level issues 3.Educating internal and field teams on issues due to training requirements 4.Constant observations on the issues raised by the field team 5.Raising regular IT request to resolve issues 6.Constant communication between IT and Product teams to identify the changes 7.Attending bi-weekly meetings with IT to find the bigger solution 8.Find solutions to the repetitive problems and submit BRD 9.Interacting with field teams to identify the exact issues Required Qualifications and Experience ducational Qualifications a)Graduate or equivalent b)1+ years of experience Finance industry support of system c)Well versed in MS Office d)Agile ability on the work timings

Job Purpose "This position is open with Bajaj Finance ltd." To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1.Resolving SFDC functions related issues 2.Resolving BRE level issues 3.Educating internal and field teams on issues due to training requirements 4.Constant observations on the issues raised by the field team 5.Raising regular IT request to resolve issues 6.Constant communication between IT and Product teams to identify the changes 7.Attending bi-weekly meetings with IT to find the bigger solution 8.Find solutions to the repetitive problems and submit BRD 9.Interacting with field teams to identify the exact issues Required Qualifications and Experience ducational Qualifications a)Graduate or equivalent b)1+ years of experience Finance industry support of system c)Well versed in MS Office d)Agile ability on the work timings

Job Purpose "This position is open with Bajaj Finance ltd." To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1.Resolving SFDC functions related issues 2.Resolving BRE level issues 3.Educating internal and field teams on issues due to training requirements 4.Constant observations on the issues raised by the field team 5.Raising regular IT request to resolve issues 6.Constant communication between IT and Product teams to identify the changes 7.Attending bi-weekly meetings with IT to find the bigger solution 8.Find solutions to the repetitive problems and submit BRD 9.Interacting with field teams to identify the exact issues Required Qualifications and Experience ducational Qualifications a)Graduate or equivalent b)1+ years of experience Finance industry support of system c)Well versed in MS Office d)Agile ability on the work timings

Job Purpose "This position is open with Bajaj Finance ltd." To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1.Resolving SFDC functions related issues 2.Resolving BRE level issues 3.Educating internal and field teams on issues due to training requirements 4.Constant observations on the issues raised by the field team 5.Raising regular IT request to resolve issues 6.Constant communication between IT and Product teams to identify the changes 7.Attending bi-weekly meetings with IT to find the bigger solution 8.Find solutions to the repetitive problems and submit BRD 9.Interacting with field teams to identify the exact issues Required Qualifications and Experience ducational Qualifications a)Graduate or equivalent b)1+ years of experience Finance industry support of system c)Well versed in MS Office d)Agile ability on the work timings

Job Purpose "This position is open with Bajaj Finance ltd." To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1.Resolving SFDC functions related issues 2.Resolving BRE level issues 3.Educating internal and field teams on issues due to training requirements 4.Constant observations on the issues raised by the field team 5.Raising regular IT request to resolve issues 6.Constant communication between IT and Product teams to identify the changes 7.Attending bi-weekly meetings with IT to find the bigger solution 8.Find solutions to the repetitive problems and submit BRD 9.Interacting with field teams to identify the exact issues Required Qualifications and Experience ducational Qualifications a)Graduate or equivalent b)1+ years of experience Finance industry support of system c)Well versed in MS Office d)Agile ability on the work timings

Job Purpose "This position is open with Bajaj Finance ltd." To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1.Resolving SFDC functions related issues 2.Resolving BRE level issues 3.Educating internal and field teams on issues due to training requirements 4.Constant observations on the issues raised by the field team 5.Raising regular IT request to resolve issues 6.Constant communication between IT and Product teams to identify the changes 7.Attending bi-weekly meetings with IT to find the bigger solution 8.Find solutions to the repetitive problems and submit BRD 9.Interacting with field teams to identify the exact issues Required Qualifications and Experience ducational Qualifications a)Graduate or equivalent b)1+ years of experience Finance industry support of system c)Well versed in MS Office d)Agile ability on the work timings

Job Purpose "This position is open with Bajaj Finance ltd." To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1.Resolving SFDC functions related issues 2.Resolving BRE level issues 3.Educating internal and field teams on issues due to training requirements 4.Constant observations on the issues raised by the field team 5.Raising regular IT request to resolve issues 6.Constant communication between IT and Product teams to identify the changes 7.Attending bi-weekly meetings with IT to find the bigger solution 8.Find solutions to the repetitive problems and submit BRD 9.Interacting with field teams to identify the exact issues Required Qualifications and Experience ducational Qualifications a)Graduate or equivalent b)1+ years of experience Finance industry support of system c)Well versed in MS Office d)Agile ability on the work timings

Job Purpose "This position is open with Bajaj Finance ltd." To handle and provide solution for a transactional activities of field team and making sure the implementation of projects are end to end satisfying the requirement. Duties and Responsibilities 1.Resolving SFDC functions related issues 2.Resolving BRE level issues 3.Educating internal and field teams on issues due to training requirements 4.Constant observations on the issues raised by the field team 5.Raising regular IT request to resolve issues 6.Constant communication between IT and Product teams to identify the changes 7.Attending bi-weekly meetings with IT to find the bigger solution 8.Find solutions to the repetitive problems and submit BRD 9.Interacting with field teams to identify the exact issues Required Qualifications and Experience ducational Qualifications a)Graduate or equivalent b)1+ years of experience Finance industry support of system c)Well versed in MS Office d)Agile ability on the work timings

Job Purpose This position is open with bajaj finance ltd Duties and Responsibilities To achieve Debt Management Services targets assigned to the territory by meeting Debt Management Services target for the states or region assigned.¥ Meeting the Target on Cost of Debt Management Services. Ensuring meeting PI Targets within cost limit specified.¥ Ensuring legal guidelines are complied for entire Debt Management Services structure in letter and sprits.¥ Ensure that the Debt Management Services agencies and executives adhere to the legal guidelines provided by the law in force.¥ Ensure adherence to the Code of Conduct.¥ Continuously monitoring Debt Management Services agencies and Debt Management Services executives to identify fraudulent practices and ensure that no loss is incurred due to such activities. ¥ Keeping the write off per cent within risk pricing.¥ Control portfolio in terms of bucket flows.¥ Handle customer issues escalations.¥ Feed back on credit policy based on market conditions.¥ Approve waivers on PI as per delegation matrix.¥ Ensuring documented feedback and action taken on all cases in soft buckets.¥ Ensuring adequate £Feet on Street availability area-wise / bucket-wise / segment-wise.¥ Manage and put support mechanism for legal / police issues.¥ Ensuring audit queries are complied with, ensuring corrective and preventive action.¥ Manage productivity by fixing productivity parameters for DMA / Agencies / Debt Management Services executives monitoring performance against set parameters and daily review of Area Managers and monthly review of Debt Management Services officers.¥ Recruitment of Debt Management Services officers / area managers.¥ Constant evaluation of Debt Management Services officers/area managers Required Qualifications and Experience People Management skills. ¥ Demonstrated success & achievement orientation. ¥ Excellent communication skills. ¥ Negotiation Skills ¥ Strong bias for action & driving results in a high performance environment. ¥ Demonstrated ability to lead from the front. ¥ Excellent relationship skills. ¥ Affirmative in nature, Strong Leadership Skills, Clarity of thought and perseverance.. ¥ Exceptionally high motivational levels and needs to be a self starter. ¥ Working knowledge of computers.

About The Role : Come join Intel's highly regarded Devices Development Group, responsible for creating Client SOCs. We envision the future of computing and design for the next generation of laptop and desktop computers.We are seeking a highly skilled and motivated STA (Static Timing Analysis) Engineer to join our team specializing in timing analysis for cutting-edge and complex SoC projects. This role offers a unique opportunity to work on high-level designs and collaborate with multidisciplinary teams in a dynamic and challenging environment. Your responsibilities may include but not be limited to: STA setup, convergence, reviews and sign-off for Multi-Mode and Multi-corner Multi voltage domain designs. Timing analysis and Timing Closure at Partition/Sub-system/FC level. Develops and defines methodologies to ensure highest quality of timing models that enable the physical design team to operate efficiently. Defines the right process, voltage, and temperature (PVT) conditions to be used for timing analysis for a given design based on the product plans such as operating conditions and binning. Collaborates with architecture, clocking design, and logic design teams to deliver flow development for chip integration and validates high performance low power clock network guidelines. Familiar with Constraint Generation, development and clean up. Good at Timing ECO Implementation strategy development/convergence. Should have an experience in enabling the Tweaker/Prime Time based ECO flows. Work on Automation scripts with in STA tools for Methodology development. Familiar with digital design Implementation RTL to GDSII :Synopsys/Cadence tools. Familiar with LVF/POCV variation formats and understanding of deep sub-micron topics. Participate in and lead cross-functional meetings to drive project progress and resolve timing-related challenges. Act as a liaison between timing analysis and physical design teams, ensuring alignment and high-quality deliverables. The ideal candidate should exhibit behavioral traits that indicate: Self-motivator with strong problem-solving skills. Excellent interpersonal skills, including written, verbal, and presentation communications. Attention to detail and organizational skills. Ability to work as part of a team and collaborate in a high-paced atmosphere. Qualifications Educational Qualifications: BS/BTech degree with 8 years of experience, or MS/MTech degree with 6 years of experience in Electronics/VLSI/Computer Science or a related field. Preferred Qualification: At least 8+ years of experience in STA Timing Analysis using industry EDA tools.Experience in Python/Perl/TCL programming languages. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 9914 Date posted 03/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for developing and validating Process Design Kits (PDKs) for cutting-edge custom design platforms. With a robust background in CAD engineering and a deep understanding of the design process, you thrive in collaborative environments and excel at problem-solving. Your expertise in scripting languages such as Python, Tcl, and UNIX, coupled with your strong communication skills, makes you an invaluable asset to any team. You are adaptable, capable of handling complex projects, and are always eager to network with senior internal and external personnel. Your ability to coach and mentor junior peers, along with your readiness to tackle demanding situations, sets you apart as a leader in your field. What You’ll Be Doing: Developing and validating Process Design Kits (PDKs) for Synopsys Custom Design platform. Supporting internal and external customers on previously developed PDKs. Interacting with customers to gather data and specifications, and managing project deliverables. Collaborating with cross-functional teams to test and implement custom tool adjacencies such as Physical Verification, Parasitic Extraction, and Design Enablement. Coaching other PDK developers to build quality, design-ready PDKs for Custom Compiler users. Engaging with various stakeholders to enable feature-rich iPDKs. The Impact You Will Have: Enhancing the efficiency and quality of PDKs, ensuring they meet the high standards required for advanced custom design. Contributing to the successful deployment and optimization of Synopsys Custom Design platforms. Supporting the seamless integration of advanced design tools, improving the overall user experience for customers. Driving innovation by ensuring PDKs are equipped with the latest features and technologies. Mentoring and developing the next generation of PDK developers, fostering a culture of excellence and continuous improvement. Strengthening Synopsys' position as a leader in the semiconductor industry through high-quality, reliable PDK solutions. What You’ll Need: BS with 5+ years of relevant experience or MS with 4+ years of experience. Basic overall understanding of the design process. Expert knowledge of scripting languages such as Python, Tcl, and UNIX. Strong problem-solving and debugging skills. Experience in executing projects from start to completion, handling complex projects, and identifying best practices. Who You Are: A collaborative team player with strong communication skills. A proactive and adaptable individual, capable of working under stress and managing demanding situations. A mentor and coach to junior peers, guiding them to achieve their best. An innovative thinker with a passion for continuous improvement and excellence. The Team You’ll Be A Part Of: You will be part of a dynamic team focused on the development of Process Design Kits for Synopsys Custom Design platform. This team collaborates with cross-functional teams to ensure the seamless integration and optimization of custom design tools, driving innovation and excellence in the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hiring: DFT Engineer (Design for testability) for Staff/Sr Staff positions Location: Noida (Hybrid 3 Days Work from Office) Experience: 7 to 15 years We are looking for a technical leader to drive the DFT aspects of high-performance compute SOC/MCU development. The candidate must be experienced, hands-on and have robust understanding of testability features including SSN, MBIST, LBIST, Scan Insertion, ATPG, GLS and post silicon debug on automotive grade SOCs. Key Responsibilities: Hierarchical scan insertion and SSN-based ATPG flow MBIST integration & verification at RTL level LBIST RTL integration, verification, and GLS enablement Implementation & verification of IEEE 1149.1 JTAG, IJTAG Post-silicon debug for DFT patterns Close collaboration with RTL, PD, and Verification teams Proficiency in scripting languages ( TCL, Perl, or Python ) Apply Now! Click on the Apply button or share your resume with Heena at heena.k@randstad.in Tag your connections who might be interested in this exciting opportunity!

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Job Overview: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Systems Engineer, you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions that enables the development of cutting-edge technology. Qualcomm Systems Engineers collaborate across functional teams on next generation System-on-chip (SoC) for smartphone, tablet, automotive, machine-learning accelerators and other product categories. Minimum Qualifications: Bachelor/Master"™s Degree in Electronics & Communication / Micro Electronics or related field and 5+ years of Physical Design or related work experience. ORPhD in Electronics & Communication / Micro Electronics or related field and 2+ years of Physical Design or related work experience. Overview Work with Qualcomm's Platform Architecture team on next generation System-on-chip (SoC) for Compute, smartphone, IoT and other product categories. Candidate will be involved in architecture and/or microarchitecture of various subsystems and interfaces of the SoCs, e.g. reset, boot, power management, security, access control, debug services, various processing subsystems like CPU, DSP, GPU and AI Accelerator subsystems etc. The successful candidate will - Be part of Qualcomm Platform Architecture Team Work with Hardware and Software teams to understand the design requirements, specification, and interface details. Validate architecture/ microarchitecture models for multiple peripherals, interconnects, and IPs for Qualcomm SoC platforms. Work with team to integrate these models to the SoC platform and validate IP/ System Level use cases. Perform area, power, performance trade-offs and analysis of HW/SW re-usability requirements for IP/Cores and complete SoC. Develop Specification, system level architecture/micro-architecture of system use-cases, working with cross functional teams. Have experience working with ARM-based SoC architectures, in-depth understanding of computer architecture fundamentals, the ability to develop complex systems. Candidate will be working closely with cross-functional teams "“ in analyzing power, performance, area trade-offs, IP wise Area deep dive analysis. will be involved in perform architectural analysis and architectural validation Individuals who possess skills/experience in one or more of the following are requested to apply: Minimum Qualifications: Good understanding of SoC Design & Physical Design Concepts. Understanding of VLSI flow from spec to tapeout Strong debugging, analytical and problem-solving skills Good understanding of interfaces and on-chip interconnects Proficiency in digital design, VLSI, computer architecture, HDL languages, Scripting languages (Perl/Tcl/Python preferred) ARM architecture, Coresight architecture, power management fundamentals Good communication skills, presentation skills and should manage his/her tasks independently Self-motivated, Go-getter & Strong inter-personal skills , Desired: hands on experience with SoC design and integration for complex SoCs Desired: Profiles with both Design and PD (SOC Floorplan/PKG/PDN) background is a big plus Desired: Python Scripting, Data visualization tools like XL - Pivot table, PowerBI Areas of Expertise (the more the better): Candidates should have one or more of the following areas of knowledge and/or expertise: Physical Design flow, understanding of design, floorplan & placement of different Digital/Analog components on an SOC Understanding of VLSI flow from spec to tape out with proficiency in digital design, HDL languages, Scripting languages is preferred. ARM and RISC-V Architecture expertise specifically in areas of Coherency, Signaling, Memory Management, Virtualization, etc DSPs, CPUs (ARM preferred), High and Low Speed peripherals DDR, Interconnect, System Cache, QOS. Power, Boot, Debug, Security, Access Control Architecture. Power and/or performance analysis, simulation, and modelling. Minimum Qualifications: "¢ Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Bachelor"™s or Master"™s degree from a top-tier institute. 6-11 years of experience in physical design from product-based companies. Experience: Proven experience in managing complex subsystems and small teams. Proficiency in synthesis, place and route (PnR), and sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations. Job Requirements: Expertise in meeting demanding Power, Performance, and Area (PPA) requirements for complex subsystems/System on Chips (SoCs), place and route, and IP integration. Experience in low power design implementation, including Unified Power Format (UPF), multi-voltage domains, and power gating. Familiarity with ASIC design flows and physical design methodologies. Strong understanding of circuit design, device physics, and deep sub-micron technology. Experience working on multiple technology nodes in advanced processes. Proficiency in automation to drive improvements in PPA.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: "¢ 12+ years Hardware Engineering experience or related work experience. "¢ 12+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Additional About The Role : 7-14 yrs experience in Physical Design and timing signoff for high speed cores. Should have good exposure to high frequency design convergence for physical design with PPA targets and PDN methodology. Masters/Bachelors Degree in Electrical/Electronics science engineering with at least 7+ years of experience in IC design. Experience in leading block level or chip level Physical Design, STA and PDN activities. Work independently in the areas of RTL to GDSII implementation. Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Knowledge of low power flow (power gating, multi-Vt flow, power supply management etc.) Circuit level comprehension of time critical paths in the design Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.) Tcl/Perl scripting Willing to handle technical deliveries with a small team of engineers. Strong problem-solving skills.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: "¢ 8+ years Hardware Engineering experience or related work experience. "¢ 8+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Systems Test Engineering General Summary: Good understanding of electronic communication technology in general and particularly in WLAN as well coding in C#/C++ or python. Designs test plans, scenarios, scripts, or procedures. Documents software defects, using a bug tracking system, and report defects to software developers. Develops testing programs that address explicit and implicit requirements. Automates test cases and executes them. Participates in product design reviews to understand feature design and provide inputs on any gaps. Minimum Qualifications: "¢ Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Test Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Test Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Test Engineering or related work experience. Minimum Qualifications Bachelor's degree in Electronics & Communication Engineering, Information Systems, Computer Science, or related field. Good knowledge in WLAN protocol/Communications /RF 6 - 9 years"™ experience in testing wifi protocol 6 - 9 years"™ experience with Programming Language such as C, C#, C++, Java, Python, etc. Preferred Qualifications 6 - 9 years"™ experience with Software Test or System Test, developing and automating test plans, and tools (e.g., Source Code Control Systems, Continuous Integration Tools, and Bug Tracking Tools). Master"™s degree in engineering, Information Systems, Computer Science, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles "¢ Synthesis, Static Timing Analysis and LEC of SoC/Cores "¢ Full chip and block level timing closure, IO budgeting for blocks "¢ Logical equivalence check between RTL to Netlist and Netlist to Netlist "¢ Knowledge of low-power techniques including clock gating, power gating and MV designs "¢ ECO timing flow "¢ Proficient in scripting languages (TCL and Perl). Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Bachelors / Masters degree in electrical or electronics engineering with 3-6 yrs of experience is preferred

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Be a member of the team that plays a significant role in ensuring the quality of Connectivity SoCs through structured DFT, Automatic Test Pattern Generation (ATPG) and Memory Built-In Self-Test (MBIST) techniques. Primary responsibilities will include,– Interface with design team to ensure DFT design rules and coverages are met. – Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques.– MBIST verification (including repair), test pattern generation through Mentor tool.– ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.– Work with the Product/Test engineering teams on the delivery of manufacturing test patterns for ATE.– Responsible for supporting post silicon debug effort, issue resolution.– Responsible for Diagnostic Tool generation for ATPG, MBIST and bring-up on ATE.– Developing, enhancing and maintaining scripts as necessary Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 2-6 years"™ experience in ASIC/DFT "“simulation and Silicon validation– Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement– In depth knowledge and hands-on experience in ATPG -coverage analysis.– In depth knowledge of Memory verification, repair and failure root-cause analysis.– Experience with any of these tools is required– ATPG - TestKompress– MBIST - Mentor ETVerify– Simulation - VCS (preferred), modelsim.– Expertise in scripting languages such as Perl, shell, etc. is an added advantage– Ability to work in an international team, dynamic environment with good communication skills– Ability to learn and adapt to new tools, methodologies.

Job Area: Engineering Group, Engineering Group > Systems Test Engineering General Summary: WLAN IEEE802.11 a/b/g/n/ac/ax Test experience Ethernet & Wired networking (added advantage) Independent Project handling with analytical ability Functional / Blue Tooth-Co-Existence/Performance / IOT WLAN tests Sound knowledge on Layer 1, 2, 3, IEEE802.11 a/b/g/n/ac/ax Knowledge on WPA2/WPA3, MU-MIMO, OFDMA, Beamforming, Roaming etc Understating and Usage of Traffic generator tools like Spirent / Ixia / Chariot/ Veriwave. Knowledge on RFC2544, RFC2889, RFC3918 tests etc. Wireshark, Ethereal, airopeak/omnipeak Windows 10/XP/Win7, Linux Scripting Knowledge of Automation Scripts is mandatory "“ Python / Perl / TCL Minimum Qualifications: 10+ years of experience post BE/B.Tech or ME/M.Tech

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm Hexagon DSP IP's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills

Job Area: Engineering Group, Engineering Group > Systems Test Engineering General Summary: WLAN IEEE802.11 a/b/g/n/ac/ax Test experience Ethernet & Wired networking (added advantage) Independent Project handling with analytical ability Functional / Blue Tooth-Co-Existence/Performance / IOT WLAN tests Sound knowledge on Layer 1, 2, 3, IEEE802.11 a/b/g/n/ac/ax Knowledge on WPA2/WPA3, MU-MIMO, OFDMA, Beamforming, Roaming etc Understating and Usage of Traffic generator tools like Spirent / Ixia / Chariot/ Veriwave. Knowledge on RFC2544, RFC2889, RFC3918 tests etc. Wireshark, Ethereal, airopeak/omnipeak Windows 10/XP/Win7, Linux Scripting Knowledge of Automation Scripts is mandatory "“ Python / Perl / TCL Minimum Qualifications: 10+ years of experience post BE/B.Tech or ME/M.Tech

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. We are looking for bright ASIC design engineers with excellent analytical and technical skills. This is an excellent opportunity to be part of a fast paced team responsible for delivering Snapdragon CPU design, flows for high performance SoCs in sub-10nm process for Mobile, Compute and IOT market space. Job Responsibilities: Participate on a project involved in the development of ASICs, with emphasis in Place and Route Implementation, Timing Closure, Low Power, Power Analysis and Physical Verification. Create design of experiments and do detailed PPA comparison analysis to improve quality of results, tuning recipes and setting course for the projects going forward Work closely with RTL design, Synthesis, low power, Thermal, Power analysis and Power estimation teams to optimize Performance, Power and Area(PPA) Tabulate metrics results for analysis comparison Develop Place & Route recipes for optimal PPA Minimum Qualifications 2+ years of High Performance core Place & Route and ASIC design Implementation work experience Preferred Qualifications Minimum 3+ years of experience in PD Extensive experience in Place & Route with FC or Innovus is an absolute must Complete ASIC flow with low power, performance and area optimization techniques Experience with STA using Primetime and/or Tempus is required Proficient in constraint generation and validation Experience of multiple power domain implementation with complex UPF/CPF definition required Formal verification experience (Formality/Conformal) Perl/Tcl, Python, C++ skills are needed Strong problem solving and ASIC development/debugging skills Experience with CPU micro-architecture and their critical path Low power implementation techniques experience High speed CPU implementation Clock Tree Implementation Techniques for High Speed Design Implementation are required Exposure to Constraint management tool and Verilog coding experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains"“ LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux "“ Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: "¢ 5+ years Hardware Engineering experience or related work experience. "¢ 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm