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6.0 years
0 Lacs
bengaluru, karnataka, india
On-site
At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same. Job Description Fatigue & Damage Tolerance Engineer Location: Bangalore Experience: 4–6 years Choosing Capgemini means choosing a place where you’ll be empowered to shape your career, supported ...
Posted 1 month ago
6.0 - 16.0 years
0 Lacs
hyderabad, telangana
On-site
As a Qualcomm Hardware Engineer, you will be responsible for the following: - STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs. - Conduct timing analysis, validation, and debug across multiple PVT conditions using PT/Tempus. - Utilize Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. - Evaluate multiple timing methodologies/tools on different designs and technology nodes. - Develop automation scripts within STA/PD tools for methodology enhancement. - Demonstrate good technical writing and communication skills while working in a cross-collaborative environment. - Experience in design automation using TCL/Perl/Python. - Fam...
Posted 1 month ago
10.0 - 15.0 years
0 Lacs
karnataka
On-site
Role Overview: As a part of Micron Technology, you will play a crucial role in innovating memory and storage solutions, accelerating the transformation of information into intelligence. Your expertise in ASIC Physical Verification and overall design flow will be instrumental in achieving the best PPA for block/chip PV closure and ensuring DRC & LVS closure for complex hierarchical designs. Key Responsibilities: - Achieve block/chip PV closure to optimize PPA - Conduct DRC & LVS closure for block and full chip designs in 5nm/3nm nodes - Collaborate with IR, IP, ESD, and PD teams to ensure Physical Verification convergence - Work on multiple blocks simultaneously with minimal supervision - Ens...
Posted 1 month ago
3.0 - 7.0 years
0 Lacs
karnataka
On-site
As an experienced Enovia Developer at our leading multinational company, your role will involve development, customization, and support of the ENOVIA PLM platform, with a focus on 3DEXPERIENCE, Engineering Central, and other modules. Key Responsibilities: - Translate business requirements into technical solutions - Perform customization using JPO, JSP, MQL, TCL - Develop and enhance features using Core Java, J2EE, JavaScript, REST APIs - Participate in ENOVIA 3DEXPERIENCE upgrades and server configuration - Collaborate with stakeholders, participate in Agile ceremonies - Analyze system gaps and recommend improvements Qualifications Required: - Strong experience in the PLM domain, especially ...
Posted 1 month ago
8.0 - 12.0 years
0 Lacs
andhra pradesh
On-site
As an RTL Micro Architect at Eximietas Design, you will be a key contributor in defining and implementing cutting-edge semiconductor designs. Your responsibilities will include: - Define and develop microarchitecture specifications for complex SoC designs. - Lead RTL design and implementation using Verilog/SystemVerilog, ensuring optimal performance, power, and area (PPA). - Collaborate with cross-functional teams to ensure successful project execution. - Perform design trade-off analysis to meet functional, performance, and power requirements. - Develop design methodologies to improve efficiency and quality. - Mentor junior engineers to foster a culture of innovation and excellence. - Parti...
Posted 1 month ago
8.0 - 12.0 years
0 Lacs
karnataka
On-site
Role Overview: As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will involve working on yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge products. You will collaborate with cross-functional teams to develop solutions and ensure performance requirements are met. Key Responsibilities: - Work with multiple SOC Design teams to rollout robust Logic Synthesis, UPF synthesis, QoR optimization, and netlist Signoff flows - Provide implementation f...
Posted 1 month ago
5.0 - 9.0 years
0 Lacs
hyderabad, telangana
On-site
Role Overview: You will be responsible for RTL verification and developing SV/UVM testbenches at Top/Sub-system/Block-levels. Your role will involve driving test plan and test spec development, executing tests, and generating relevant documents. Additionally, you will contribute to verification environment architecture and methodology development. The position requires experience in System Verilog, UVM programming, and verification of protocols like Ethernet, PCIe, SPI, I2C, and USB. Strong debugging skills, familiarity with Xilinx technology, FPGA verification, and scripting languages like Perl, Python, or TCL are also essential for this role. Key Responsibilities: - Develop SV/UVM testbenc...
Posted 1 month ago
3.0 - 7.0 years
0 Lacs
chennai, tamil nadu
On-site
Role Overview: As a Lithography Mask Designer at our company, you will play a crucial role in supporting semiconductor development processes by creating, optimizing, and automating lithography mask layouts. Your focus will be on ensuring precision and efficiency in advanced manufacturing environments. Key Responsibilities: - Design and generate lithography masks for semiconductor devices using industry-standard tools such as Cadence, KLayout, Calibre, with additional knowledge of DW2000 being a big plus - Collaborate with process engineers and product designers to translate device requirements into mask layouts - Develop and maintain scripts or software tools to automate mask generation, val...
Posted 1 month ago
5.0 - 12.0 years
0 Lacs
bengaluru, karnataka, india
On-site
Position Overview In this role, you will be responsible for design and implementation of Digital IPs for cutting-edge SoC projects. Work on implementing IP definitions that meet customer and application needs. This role requires a strong background in design methodologies, hands-on experience with industry-standard tools, and the ability to lead/participate in design efforts from planning through execution. Key Responsibilities Understand IP architecture, micro-architecture and register specification. Participate in specification writeup. Participate in detailed performance, architectural and design requirement analysis with cross-functional teams, Vendors and customers. Implement a specific...
Posted 1 month ago
0 years
0 Lacs
pune, maharashtra, india
On-site
Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment...
Posted 1 month ago
4.0 - 9.0 years
20 - 30 Lacs
noida, pune, bengaluru
Work from Office
Role : Design Verification Work Location : Preferred Pune WFO, If candidate is found to be excellent Noida or Bangalore Remote options are open Years of Experience : 4+ Years Education Qualification : MS (or higher) in EE/EC/ECC Engineering Skills Must have excellent knowledge of computer architecture and design verification fundamentals. Must have experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies. Experience in developing complex test bench in System Verilog using OVM/ UVM methodology. Hands-on experience in AMBA protocol, PCIe MAC/ USB /MAC/ Bluetooth MAC/ Wifi 802.11 MAC layer protocol. Experience in Low Power Simulation/UPF setup, d...
Posted 1 month ago
15.0 years
0 Lacs
greater hyderabad area
Remote
Senior Principal Logic Design Engineer Location: Bangalore We are a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing As a SPE Logic Design Engineer, you’ll play a pivotal role in designing and implementing the world’s best Registered Clocking Driver (RCD) products. In this full-time role, you’ll report directly to our Logic Design Manager. Our MIC IDC is dedicated to leverage over three decades of high-performance memory expertise to deliver cutting-edge memory interface chipset solutions, enhancing memory bandwidth and capacity for data centers and client applications a...
Posted 1 month ago
15.0 years
0 Lacs
greater delhi area
Remote
Senior Principal Logic Design Engineer Location: Bangalore We are a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing As a SPE Logic Design Engineer, you’ll play a pivotal role in designing and implementing the world’s best Registered Clocking Driver (RCD) products. In this full-time role, you’ll report directly to our Logic Design Manager. Our MIC IDC is dedicated to leverage over three decades of high-performance memory expertise to deliver cutting-edge memory interface chipset solutions, enhancing memory bandwidth and capacity for data centers and client applications a...
Posted 1 month ago
8.0 years
0 Lacs
chennai, tamil nadu, india
On-site
Work Type: Full Time Experience Required: 5 – 8 Years Compensation: INR 14,00,000 – 21,00,000 (Fixed) | Max CTC up to INR 28,00,000 Visa/Work Status: India Only Work Mode: Hybrid (2–3 days office) | Swing Shift (2 PM – 11 PM IST) Job Overview We are seeking an experienced Associate/Lead Engineer – Enovia CAD Integration to join our PLM team in Chennai. The role focuses on enabling seamless integration between CAD systems and Enovia 3DExperience, ensuring smooth data flow and process alignment with business needs. You will participate in design workshops, provide technical expertise, execute integration tests, and ensure effective collaboration between engineering and IT teams. Key Responsibi...
Posted 1 month ago
8.0 years
0 Lacs
chennai, tamil nadu, india
On-site
Work Type: Full Time Experience Required: 5 – 8 Years Compensation: INR 14,00,000 – 21,00,000 (Fixed) | Max CTC up to INR 28,00,000 Visa/Work Status: India Only Work Mode: Hybrid (2–3 days office) | Swing Shift (2 PM – 11 PM IST) Job Overview We are seeking an experienced Associate/Lead Engineer – Enovia CAD Integration to join our PLM team in Chennai. The role focuses on enabling seamless integration between CAD systems and Enovia 3DExperience, ensuring smooth data flow and process alignment with business needs. You will participate in design workshops, provide technical expertise, execute integration tests, and ensure effective collaboration between engineering and IT teams. Key Responsibi...
Posted 1 month ago
8.0 years
0 Lacs
chennai, tamil nadu, india
On-site
Work Type: Full Time Experience Required: 5 – 8 Years Compensation: INR 14,00,000 – 21,00,000 (Fixed) | Max CTC up to INR 28,00,000 Visa/Work Status: India Only Work Mode: Hybrid (2–3 days office) | Swing Shift (2 PM – 11 PM IST) Job Overview We are seeking an experienced Associate/Lead Engineer – Enovia CAD Integration to join our PLM team in Chennai. The role focuses on enabling seamless integration between CAD systems and Enovia 3DExperience, ensuring smooth data flow and process alignment with business needs. You will participate in design workshops, provide technical expertise, execute integration tests, and ensure effective collaboration between engineering and IT teams. Key Responsibi...
Posted 1 month ago
8.0 years
0 Lacs
chennai, tamil nadu, india
On-site
Work Type: Full Time Experience Required: 5 – 8 Years Compensation: INR 14,00,000 – 21,00,000 (Fixed) | Max CTC up to INR 28,00,000 Visa/Work Status: India Only Work Mode: Hybrid (2–3 days office) | Swing Shift (2 PM – 11 PM IST) Job Overview We are seeking an experienced Associate/Lead Engineer – Enovia CAD Integration to join our PLM team in Chennai. The role focuses on enabling seamless integration between CAD systems and Enovia 3DExperience, ensuring smooth data flow and process alignment with business needs. You will participate in design workshops, provide technical expertise, execute integration tests, and ensure effective collaboration between engineering and IT teams. Key Responsibi...
Posted 1 month ago
8.0 years
0 Lacs
chennai, tamil nadu, india
On-site
Work Type: Full Time Experience Required: 5 – 8 Years Compensation: INR 14,00,000 – 21,00,000 (Fixed) | Max CTC up to INR 28,00,000 Visa/Work Status: India Only Work Mode: Hybrid (2–3 days office) | Swing Shift (2 PM – 11 PM IST) Job Overview We are seeking an experienced Associate/Lead Engineer – Enovia CAD Integration to join our PLM team in Chennai. The role focuses on enabling seamless integration between CAD systems and Enovia 3DExperience, ensuring smooth data flow and process alignment with business needs. You will participate in design workshops, provide technical expertise, execute integration tests, and ensure effective collaboration between engineering and IT teams. Key Responsibi...
Posted 1 month ago
8.0 years
0 Lacs
chennai, tamil nadu, india
On-site
Work Type: Full Time Experience Required: 5 – 8 Years Compensation: INR 14,00,000 – 21,00,000 (Fixed) | Max CTC up to INR 28,00,000 Visa/Work Status: India Only Work Mode: Hybrid (2–3 days office) | Swing Shift (2 PM – 11 PM IST) Job Overview We are seeking an experienced Associate/Lead Engineer – Enovia CAD Integration to join our PLM team in Chennai. The role focuses on enabling seamless integration between CAD systems and Enovia 3DExperience, ensuring smooth data flow and process alignment with business needs. You will participate in design workshops, provide technical expertise, execute integration tests, and ensure effective collaboration between engineering and IT teams. Key Responsibi...
Posted 1 month ago
20.0 years
0 Lacs
hyderabad, telangana, india
On-site
minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/ Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementatio n (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: • 20+ years Hardware Engineering experience or related work experience. • 17+ years experience with ...
Posted 1 month ago
6.0 years
0 Lacs
india
Remote
Staff Gen AI based DV Methodology Engineer We are a US based Stealth mode Start-up location: Hyderabad / Bangalore / Remote ( any where in India ) We unify the processes used in Semiconductor and Hardware Systems design - thus reducing bugs, improving efficiency and productivity Our breakthrough technology has drawn investment from Silicon Valley’s boldest VCs and semiconductor pioneers. Beyond capital, they bring decades of expertise and powerful networks, Senior Application Engineer, AI based CAD systems This role offers an exceptional opportunity to lead product definition, validation and customer engagement. Key Responsibilities: Work with the software development team to define the deta...
Posted 1 month ago
6.0 years
0 Lacs
bengaluru, karnataka, india
On-site
At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same. Job Description Structural Analysis Engineer Location: Bangalore Experience: 4–6 years Choosing Capgemini means choosing a place where you’ll be empowered to shape your career, supported by a co...
Posted 1 month ago
3.0 - 7.0 years
0 Lacs
karnataka
On-site
As a Synthesis & STA engineer, you will be responsible for performing RTL Synthesis to optimize the Performance/Power/Area of the designs. Your role will involve DFT insertions such as MBIST and SCAN, setting up Timing Constraints for functional and Test Modes, and Validation. You will be expected to create Power Intent for the designs, verify power intent on RTL, run static Low-Power checks on gate level netlists, and ensure Logic Equivalency Checks between RTL to Gates and Gates to Gates. Collaborating with the Design/DFT/PD teams, you will set up signoff Static Timing Analysis and ECO flows to achieve timing closure. Additionally, you will be involved in Power Analysis, estimating power a...
Posted 1 month ago
10.0 - 14.0 years
0 Lacs
karnataka
On-site
As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. You will work on a variety of systems including circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams will be essential to develop solutions and meet performance requirements. Key Responsibilities: - Minimum 10 to 14 years of experience in physical design from product-based/EDA companies - Expertise in DDRPhy /PCIE-high speed interface PD or 3DIC - Experience with Timing Signoff using SNPS/CDNS tools - Knowledge of PDN: IR signoff and Physical veri...
Posted 1 month ago
5.0 years
0 Lacs
noida, uttar pradesh, india
Remote
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled R&D Staff Engineer passionate about pushing the boundaries of static low power verification products. With 5 to 8 years of experience in software engineering, you have honed your expertise in C/C++ and possess a robust understanding of data structures and ...
Posted 1 month ago
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