3439 Tcl Jobs - Page 3

As an FPGA Engineer at TekWissen, your role will involve the design, implementation, test, integration, and delivery of system-level digital designs for FPGA blocks timing verification. You will be responsible for debugging design timing related issues on different FPGA families and performing manifold segmentation of the FPGA designs. Additionally, you will be required to run internal scripts for performance testing and update scripts as necessary. Key Responsibilities: - Design, implement, test, integrate, and deliver system-level digital designs for FPGA blocks timing verification - Debug design timing related issues on various FPGA families - Perform manifold segmentation of FPGA designs...

As an ASIC Digital Verification Engineer at Synopsys, you play a crucial role in enhancing the reliability and performance of digital IP solutions in the semiconductor industry. Your expertise in digital verification methodologies and programming skills make you a valuable asset to any team. Your attention to detail and collaborative spirit ensure successful deliveries and continuous technological innovation. Join us to be a part of a dynamic and forward-thinking team dedicated to transforming the future through advanced verification solutions. **Role Overview:** You will be responsible for: - Writing comprehensive verification plans and specifications. - Making critical architecture decisio...

You are invited to join our team as a skilled Hardware Verification Engineer based in Hyderabad. In this role, you will be instrumental in contributing to the development of cutting-edge hardware solutions. Your primary responsibilities will include developing and maintaining System Verilog /UVM test-benches at various levels, defining test plans and specifications, engaging in verification environment architecture, collaborating with design teams, generating comprehensive documentation, performing hardware testing, and contributing to FPGA-based verification. Key Responsibilities: - Develop and maintain System Verilog /UVM test-benches at block, subsystem, and top levels. - Define and drive...

As an experienced "Memory Layout" Engineer with 10+ years of experience, you will be responsible for designing memory layout for blocks such as Caches, CAMs, Register files, multiport register Files, Compilers, and analog layouts like PLLs, TX, RX, amplifiers. Your role will require hands-on work, leadership abilities, and a growth mindset. Effective communication skills are essential for collaborating with cross-site designers. You should have practical experience with technologies like Finfets, GAA, and working with technology nodes below 7nm. Proficiency in debugging and resolving issues related to LVS, DRC, Antenna, DFM, EM, IR, and Methodology check is required. Additionally, you will b...

As an AMS Circuit Design Engineer at ACL Digital, a leader in digital engineering and transformation, you will be responsible for designing Analog and SERDES IP Circuits. Your primary responsibilities will include: - Designing various Analog IPs such as GPIO, RCOMP, ADC, DAC, LDO, PLL, Thermal Sensor, Voltage Monitor, Process Monitor, and their respective blocks. - Working on SERDES IPs including DLL, PLL, Clocking path Analysis, SERDES System Design and Analysis, Power Delivery Analysis, Transmitter, Receiver, Channel Analysis, LDO, RCOMP, Sensors, Process Monitor, Temp Sensor, Voltage Sensor, GPIOs, High-Speed View/Test IOs, DFX, High-Speed ADC, etc. - Demonstrating knowledge of SERDES pro...

Role Overview: Marvell's semiconductor solutions play a crucial role in creating the data infrastructure that connects the world. From enterprise to cloud computing, AI, automotive, and carrier architectures, Marvell's innovative technology is driving new opportunities. Working at Marvell allows you to impact individual lives, shape entire industries, and contribute to future transformations. If you are passionate about making a lasting impact through innovation, Marvell provides a thriving environment for learning and leadership. Key Responsibilities: - Lead DV efforts for blocks, subsystems, and top-level verification. - Develop and maintain UVM-based verification environments. - Define an...

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description As an Electrical Design Engineer – (FPGA Logic Design) in the Systems Integration Group (SIG) at Micron Technology, you will be responsible for designing, developing, and implementing FPGA and/or SoC solutions for advanced semiconductor manufacturing test equipment. Responsibilities include generation of specifications, component selection, FPGA coding, simulation, and analyses,...

Develop RTL synthesis strategy and scripts to perform synthesis, timing path analysis and PPA analysis (performance, power, area) at subsystem level as well as at block level RTL designs to drive for continued improvement of QoR (quality of result) Develop ECO strategy, perform netlist and/or conformal assisted RTL ECOs, perform LEC on resulting netlists and resolve discrepancies Develop, adopt and automate RTL static design rule checks in collaboration with Back-End Integration and Physical design teams, triage and debug design rule violations with RTL design team, support IP integration with SoC team Develop and adopt FEINT design and verification infrastructure, methodology and tools Pref...

About the role: As a Principal DevOps Engineer focused on Vulnerability Remediation within Infrastructure Engineering and Cloud Operations (IECO), you will contribute to the development of our solution delivery platforms supporting our web-based applications on the latest cloud technologies within a DevSecOps culture. You will have the opportunity to utilize automation technologies and private/public cloud technologies to provide world-class solutions that serve the non-profit industry and ensure the security of the environment. What you'll do: Build automation leveraging CI/CD processes, automated testing, unit testing,code coverageand other software development best practices Contribute to...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Position: DFT Engineer Location: Bangalore Experience: 5+ Years Email: karthik.adasu@proxelera.com Job Description: We are looking for an experienced DFT Engineer with strong hands-on expertise in ATPG and Scan-based test methodologies. The candidate will be responsible for implementing and validating DFT features to ensure robust test coverage and high-quality silicon delivery. Key Responsibilities: * Perform scan insertion and ensure DFT design compliance. * Execute SCAN DRC checks and perform coverage debug for improved fault coverage. * Generate and validate ATPG patterns for stuck-at and transition faults. * Run gate-level simulations (Zero Delay and Timing Delay) for DFT verification. ...

To develop the script to check the standard rules for Architecture and design team to reduce lead time for business delivery with EKL/CAT Script/VBA technologies.1 - 7 years of experience in CATIA/CAT Script/EKL Required Candidate profile Commitment and target should be achieved. Enhance the new technologies and platforms. Ability to convey technical messages effective Data management and reporting

About The Role We are seeking top-tier Design Verification Engineers with proven expertise across the full verification cycle. The ideal candidate will be a high-performing verification professional with a deep understanding of SoC architecture, verification methodologies, and debugging techniques. You’ll work closely with design and architecture teams to ensure first-time functional silicon success for large-scale SoCs. Key Responsibilities Drive end-to-end verification of complex SoC and IP blocks, from test planning to verification closure. Develop verification environments using SystemVerilog/UVM or Specman/E. Define and implement test strategies, test plans, and coverage-driven verifica...

About The Role We are seeking top-tier Design Verification Engineers with proven expertise across the full verification cycle. The ideal candidate will be a high-performing verification professional with a deep understanding of SoC architecture, verification methodologies, and debugging techniques. You’ll work closely with design and architecture teams to ensure first-time functional silicon success for large-scale SoCs. Key Responsibilities Drive end-to-end verification of complex SoC and IP blocks, from test planning to verification closure. Develop verification environments using SystemVerilog/UVM or Specman/E. Define and implement test strategies, test plans, and coverage-driven verifica...

Job Summary Person at this position takes ownership of a module and associated quality and delivery. Person at this position provides instructions, guidance and advice to team members to ensure quality and on time delivery. Person at this position is expected to be able to instruct and review the quality of work done by technical staff. Person at this position should be able to identify key issues and challenges by themselves, prioritize the tasks and deliver results with minimal direction and supervision. Person at this position has the ability to investigate the root cause of the problem and come up alternatives/ solutions based on sound technical foundation gained through in-depth knowled...

About The Role We are seeking top-tier Design Verification Engineers with proven expertise across the full verification cycle. The ideal candidate will be a high-performing verification professional with a deep understanding of SoC architecture, verification methodologies, and debugging techniques. You’ll work closely with design and architecture teams to ensure first-time functional silicon success for large-scale SoCs. Key Responsibilities Drive end-to-end verification of complex SoC and IP blocks, from test planning to verification closure. Develop verification environments using SystemVerilog/UVM or Specman/E. Define and implement test strategies, test plans, and coverage-driven verifica...

Design Verification Engineer – Debug and Trace Verification About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: MIPS is seeking an experienced Design Verification Engineer with over 7 years of industry experience to lead verification efforts focused specifically on th...

Job Description: As ASIC STA engineer candidate should have solid foundation on STA methodology , deep sub-micron technology., Constraint development and debugging. Candidate will be responsible for block and SOC timing closure. Work closely with other functional team to resolve timing issues . At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synopsys Primetime / STAR-RC knowledge Digital design basic skills Signal integrity Analysis Knowledge of ASIC design flow Deep Submicron effect Constraint develop...

Division: RMI Engineering Employment Status: Exempt Salary Grade: 110 Shift: Requisition ID: 74926 Please be aware that if you are selected to formally interview for an internal position you will be required to notify your current manager. Please refer to the Employee Transfers Guidelines posted on Skylink. Description Responsibilities Digital design specification, design, analysis, and HDL (Verilog) coding Behavioral modeling of analog and mixed signal circuits Digital back-end: synthesis, physical implementation (prep for P&R), static timing, scan insertion, etc. Verification of digital sub-systems, mixed-signal sub-systems, and the entire chip using a combination of digital models/RTL, fi...

Job Summary Person at this position is able to apply broad knowledge of their technical discipline or advanced knowledge of specific technical practices. Person identifies problems in existing systems and modifies it by following defined work procedures. Operationally oriented role responsible for achieving day to day defined tasks.Works under close supervision of Team Lead/ Project Manager. Roles & Responsibilities Responsible for design, coding, testing, bug fixing, documentation and technical support in the assigned area. Responsible for on time delivery while adhering to quality and productivity goals. Responsible for adhering to guidelines and checklists for all deliverable reviews, sen...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to ...

We’re hiring a skilled DFT Engineer with 6–9 years of experience in ATPG, Scan Insertion, and DFT Architecture. The ideal candidate will have strong debugging, scripting, and STA/timing closure expertise for VLSI front-end design. Required Candidate profile Experienced DFT Engineer with hands-on exposure to ATPG,Scan Insertion, and Static Timing Analysis. Strong in debugging,scripting (Perl/Python/TCL),and collaboration within global semiconductor teams.

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking Analyzes results and makes recommendations to fix violations for current and future product archi...

Responsibilities Define, develop, verify and optimize complex digital circuits for low-power mixed-signal circuits. Design digital hardware functions and sub systems in RTL code using SystemVerilog, Verilog or VHDL. Collaborate with system design to create digital specification definition. Implement design for testability (scan chain, BIST, boundary scan) and diagnosis features to support hardware testing. Generate technical documentation and participate in design reviews. (40%) Support constraints definition, logic synthesis, and physical design for timing closure, DFT insertion and test vectors creation, static timing closure. (15%) Support development of comprehensive verification plans a...

Job Description: Broadcom is looking for a staff level physical design engineer. In this highly visible role, you will be contributing to ASIC for Storage/ AI products. Qualifications: Education and Experience : Master's degree in Electronics/Computer Engineering with over 10 years of experience in physical design. Physical Design Expertise : Extensive experience in Place & Route using Synopsys FC or Cadence Innovus tools is essential. Proficiency in STA using Primetime and/or Tempus. Demonstrated knowledge of Clock Tree Implementation Techniques for High-Speed Design Implementation. Ability to drive front-end and back-end implementation from RTL to GDSII, including synthesis, formal verific...