930 Tcl Jobs - Page 3

Requirement: Java Trainer ExcelR is seeking an experienced and passionate Freelance Trainer for our comprehensive Full Stack Web Development Program. You will train aspiring developers through a 50-day structured curriculum Offline at College Campus focused on real-world application development and end-to-end deployment.🧑‍💻 What You’ll Teach (Curriculum Overview) ✅ Frontend Development HTML5: Text, Media, Forms, Tables, Semantic Tags, Meta Tags CSS3: Box Model, Flexbox, CSS Grid, Responsive Design, Pseudo-classes, Transitions JavaScript ReactJS: JSX, Components, State, Props, useEffect, useRef, useMemo, Forms, Routing Bootstrap Mini Projects & CRUD App Frontend Deployment & Interview Prep ✅ Backend Development Java Node.js & Express.js REST API design and integration ✅ Database Skills (10 Days) MySQL SQL Queries, Joins, Aggregations DDL, DML, TCL Commands Analytical/Window Functions 📌 Requirements Proven experience as a Full Stack Developer or Trainer Hands-on expertise with HTML, CSS, JS, React, Django/FastAPI/Node.js Strong SQL skills (MySQL) Prior teaching/training/mentoring experience preferred Excellent communication and presentation skills Ability to explain complex topics to beginners effectively Comfortable using Zoom, Google Meet, or Microsoft Teams 🎯 Preferred Qualifications B.Tech/B.E ,M.Tech/M.E in Computer Science Engineering Field. 5+ Years Experience delivering training in bootcamp or corporate environments Familiarity with online learning tools and live coding sessions Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. CAD Staff Engineer Our vision is to transform how the world uses information to enrich life. Join an inclusive team focused on one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we create helps make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while contributing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. Job Description As a CAD Staff Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, improving EDA and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for the physical layout, verification and design of CMOS integrated circuits. You will work closely with the Layout design teams to increase their productivity and work efficiency. Responsibilities And Tasks Include, But Not Limited To Work closely with memory layout teams and solve their daily challenges and provide complete solutions for the future. Proactively identify problem areas for improvement, propose, and develop innovative solutions. Develop methodologies for highly reliable layout with faster Time to Market approach. Continuously evaluate and implement new tools and technologies to improve the current layout development flows. Provide guidance and mentorship to junior members of the team. Qualifications 8+ years of experience in Layout automation, Physical Verification, or related domains. Experience in customizing a design environment, automation methodologies and utilities to increase memory layout productivity. Working experience in Place and Router flows for custom memory layouts with industry standard tools like Cadence Virtuoso, Synopsys Custom Compiler, Pulsic Unity, Itools etc. Working experience in PDN analysis tools like Totem/VoltusXFA/XA is preferable. Working experience of Physical Verification flow and analyzing/debugging DRC, ERC, LVS, DFM, Antenna Calibre/ICV rule deck issues is plus. Good understanding of advanced CMOS process manufacturing and layout design rules, EMIR, RC-Extraction, ESD, and Latch-up. Good understanding of programming fundamentals, as well as exposure to various programming languages including Skill (Cadence), Perl, Python, Tcl. Working knowledge of Linux is a must. Excellent problem-solving skills with attention to detail. Ability to work in a dynamic environment. Proficiency in working effectively with global teams and stakeholders. Education A bachelor’s or a master’s degree in Electronics, Electrical or Computer Engineering. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

The candidate will be responsible for implementing the place and route of design blocks including floor planning, placement, clock tree building, routing, timing optimizations, DRC, LVS fixing, IR drop analysis, Formal verification, power intent checks etc. The candidate will also be responsible for block level physical design closure in terms of timing, power, DRC/LVS etc. REQUIREMENTS: 4-9 years of experience in ASIC Physical Design Have good Hands on entire physical design process from floorplan till GDS generation Good Exposure to Physical Verification Process Have hands-on experience in latest sub-micron technologies below 7nm Hands –on experience in leading PnR tools Synopsys ICC/ICC2 Experience in low power designs and handling congestion or timing critical tiles will be preferred Should be a quick learner and have good attention to detail Experience in ECO implementation preferred Scripting skills in Perl/Tcl/Python etc Must have good communication & problem-solving skills. Should be able to handle PnR tasks with minimal supervision Location :: Hyderabad & Bangalore *Adds on advantage atleast one or two projects has worked in AMD projects in his / her carier. Thanks, P Mohankrishna, Mohankrishna.p@Altcognitosystems.com Show more Show less

Requirement: Java Trainer ExcelR is seeking an experienced and passionate Freelance Trainer for our comprehensive Full Stack Web Development Program. You will train aspiring developers through a 50-day structured curriculum Offline at College Campus focused on real-world application development and end-to-end deployment.🧑‍💻 What You’ll Teach (Curriculum Overview) ✅ Frontend Development HTML5: Text, Media, Forms, Tables, Semantic Tags, Meta Tags CSS3: Box Model, Flexbox, CSS Grid, Responsive Design, Pseudo-classes, Transitions JavaScript ReactJS: JSX, Components, State, Props, useEffect, useRef, useMemo, Forms, Routing Bootstrap Mini Projects & CRUD App Frontend Deployment & Interview Prep ✅ Backend Development Java Node.js & Express.js REST API design and integration ✅ Database Skills (10 Days) MySQL SQL Queries, Joins, Aggregations DDL, DML, TCL Commands Analytical/Window Functions 📌 Requirements Proven experience as a Full Stack Developer or Trainer Hands-on expertise with HTML, CSS, JS, React, Django/FastAPI/Node.js Strong SQL skills (MySQL) Prior teaching/training/mentoring experience preferred Excellent communication and presentation skills Ability to explain complex topics to beginners effectively Comfortable using Zoom, Google Meet, or Microsoft Teams 🎯 Preferred Qualifications B.Tech/B.E ,M.Tech/M.E in Computer Science Engineering Field. 5+ Years Experience delivering training in bootcamp or corporate environments Familiarity with online learning tools and live coding sessions Show more Show less

Requirement: Java Trainer ExcelR is seeking an experienced and passionate Freelance Trainer for our comprehensive Full Stack Web Development Program. You will train aspiring developers through a 50-day structured curriculum Offline at College Campus focused on real-world application development and end-to-end deployment.🧑‍💻 What You’ll Teach (Curriculum Overview) ✅ Frontend Development HTML5: Text, Media, Forms, Tables, Semantic Tags, Meta Tags CSS3: Box Model, Flexbox, CSS Grid, Responsive Design, Pseudo-classes, Transitions JavaScript ReactJS: JSX, Components, State, Props, useEffect, useRef, useMemo, Forms, Routing Bootstrap Mini Projects & CRUD App Frontend Deployment & Interview Prep ✅ Backend Development Java Node.js & Express.js REST API design and integration ✅ Database Skills (10 Days) MySQL SQL Queries, Joins, Aggregations DDL, DML, TCL Commands Analytical/Window Functions 📌 Requirements Proven experience as a Full Stack Developer or Trainer Hands-on expertise with HTML, CSS, JS, React, Django/FastAPI/Node.js Strong SQL skills (MySQL) Prior teaching/training/mentoring experience preferred Excellent communication and presentation skills Ability to explain complex topics to beginners effectively Comfortable using Zoom, Google Meet, or Microsoft Teams 🎯 Preferred Qualifications B.Tech/B.E ,M.Tech/M.E in Computer Science Engineering Field. 5+ Years Experience delivering training in bootcamp or corporate environments Familiarity with online learning tools and live coding sessions Show more Show less

Company Description MosChip® Technologies is a publicly traded company specializing in Silicon and Product Engineering solutions, with over 1300 engineers located in Silicon Valley, USA, and India. Our expertise includes end-to-end silicon design, verification, systems, software, and device engineering, along with AI/ML solutions and test automation. MosChip® has an impressive track record with first-time right silicon of over 200 SoC tape-outs and has shipped millions of connectivity ICs. We provide comprehensive services including Digital IPs, Verification IPs, Mixed Signal IPs development, and Turnkey ASIC services. Role Description This is a full-time on-site role for a Senior Lead Physical Design Engineer located in Hyderabad. The Senior Lead Physical Design Engineer will be responsible for the complete physical design flow including, but not limited to, floorplanning, power planning, place and route, clock tree synthesis, and physical verification. The individual will also collaborate with cross-functional teams to ensure design specifications are met, timing closure is achieved, and design targets are aligned with company standards and customer expectations. Qualifications He/She should be able to do block level PNR including PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. Minimum of 7-15 years of experience in physical design. He/She should have worked on 7nm or lower node designs with adv low power techniques such as Voltage Islands, Power Gating and substrate-bias. Provide technical guidance, mentoring to physical design engineers. Lead a team of Physical design engineers and be responsible for their blocks’ closure Interface with front-end ASIC teams to resolve issues. Low Power Design - Voltage Islands, Power Gating, Substrate-bias techniques. Expertise in Timing closure on high speed interfaces is a plus Excellent communication skills. Strong Back ground of ASIC Physical Design: Floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure. Extensive experience and detailed knowledge in Cadence or Synopsys. Expertise in scripting languages such as PERL, TCL. Strong Physical Verification skill set. Static Timing Analysis in Primetime or Primetime-SI. Good written and oral communication skills. Ability to clearly document plans. Ability to interface with different teams and prioritize work based on project needs. Show more Show less

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join us today. NVIDIA is an equal opportunity employer. We are now looking for a DFT Verification Engineer. Design-for-Test (DFT) Engineering at NVIDIA works on groundbreaking innovations every day involving crafting creative solutions for DFT architecture, implementation, verification and post-silicon validation on some of the industry's most complex semiconductor chips. We use the best industry tools and go beyond with internal methodologies to address some of NVIDIA's unique challenges. We are looking for you to implement the best verification methodologies for DFT IP at unit and system levels. You will bring in expertise in SystemVerilog, UVM, FPGA and Emulation application in DFT domain. What You'll Be Doing As a member of our team, You will build "state of the art" verification test benches and methodologies to verify DFT features in complex IP's/Sub-systems/SOC's. Develop and own verification environment using UVM or equivalent. Your responsibility will include to build reusable bus functional models, monitors, checkers and scoreboards. Own functional coverage driven verification closure and own design verification sign-offs at multiple levels. Collaborate closely with multi-functional teams like chip architecture, ASIC design, functional verification, and post silicon teams. Will be part of innovation to strive to improve the quality of DFT methods What We Need To See BSEE with 3+ or MSEE with 2+ years of experience in IP verification or related domains Expertise in System Verilog and verification methodologies like UVM/VMM. Expertise in prototyping, verification and debug tools (Emulation, FPGA, VCS, Debussy, Formality, PrimeTime etc). Good exposure to ASIC design methodologies: RTL design, clocking, timing and low-power architectures. Strong programming/scripting skills in C++, Perl, Python or Tcl Excellent written and oral communication skills Excitement to work on rare challenges Strong analytical and problem solving skills Ways To Stand Out From The Crowd Strong experience or interest in both DFT and RTL Verification domains Knowledge in Formal verification methodologies and tools for IP and SoC level verification Hands-on experience in post silicon debug on ATE and/or system labs. JR1998780 Show more Show less

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: PD CAD Engineer Location:Hyderabad Work Type: Onsite Job Type: Full time Job Description: KEY RESPONSIBILITIES: Timing analysis and timing closure flow development and support , with focus on Synopsys Prime time, PrimePower, PrimeClosure Tools. Maintain and add enhancements to the AMD PD code flow Work closely with Design teams and EDA vendors to debug and fix issues in the PD flow and tools. Regressions to benchmark new Prime time tool versions PREFERRED EXPERIENCE: Experienced professional in PD, timing signoff and physical design Good understanding of advanced technologies in Prime time like Hyperscale and SMVA Good understanding of Physical Design implementation Good scripting skills in TCL, Perl or Python Work Experience 2-6 years TekWissen® Group is an equal opportunity employer supporting workforce diversity. Show more Show less

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Software Engineer (Development and test) Responsible for developing & testing of software Responsible for generating documents, such as design, user-guide, test plan, test spec, test report etc., Skills Must have Candidate should have 5+ yrs experience Experience: Experience in C/C++ programming Experience with Multi-threaded software development in Linux environment Experience with Embedded IP subsystems e.g. Ethernet/PCIe/SPI/I2C/USB/GPIO/Memory architectures /DDR/SDRAM/DMA Experience with development of software targeted for x86, standalone and RTOS platforms Experience in low level driver development, register interface programming, general algorithms and data structures, bootloaders/Uboot Experience with CI tools, test automation, etc. Strong debugging skills at device and board level using JTAG debuggers Experience in Software programming for FPGAs is an advantage Scripting language experience like Perl, Python or TCL Nice to have Excellent interpersonal, written and verbal communication skills Excellent communication, problem solving and analytical skills EducationB.tech/M.Tech in CSE/IT/ECE/EEE/E&I OtherLanguagesEnglishB2 Upper Intermediate SeniorityRegular

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Responsible for developing & testing of software Responsible for generating documents, such as Spec, design, user-guide, API spec, etc., Skills Must have Candidate should have 7+ yrs experience Experience: Experience in designing complex multithreaded Performant SW Experience in designing SW API interfaces. Experience in C/C++ programming Experience with Multi-threaded software development in Linux environment Experience with Embedded IP subsystems e.g. Ethernet/PCIe/SPI/I2C/USB/GPIO/Memory architectures /DDR/SDRAM/DMA Experience with development of software targeted for x86, standalone and RTOS platforms Experience in low level driver development, register interface programming, general algorithms and data structures, bootloaders/Uboot Experience working with and integrating open-source software Strong debugging skills at device and board level using JTAG debuggers Experience in Software programming for FPGAs is an advantage Scripting language experience like Perl, Python or TCL Nice to have Excellent interpersonal, written and verbal communication skills Excellent communication, problem solving and analytical skills EducationB.tech/M.Tech in CSE/IT/ECE/EEE/E&I OtherLanguagesEnglishB2 Upper Intermediate SenioritySenior

Minimum qualifications: Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. 5 years of experience in characterizing standard-cells or memory. 5 years of experience in static timing analysis and simulation. Preferred qualifications: Master's degree in VLSI Integration, Computer Engineering, Electronics Engineering, or a related field. Experience in spice and statistical circuit simulators, including FineSim, HSpice, Spectre, and Solido. Experience in Practical Extraction and Report Language (PERL)/Shell/Transaction Control Language (TCL) scripting or similar languages. Understanding of Complementary Metal-Oxide-Semiconductor (CMOS) circuits and timing concepts (e.g., setup, hold). Ability to automate repeatable tasks to improve efficiency/productivity using the scripting languages. Proficiency with industry-standard Electronic Design Automation (EDA) tools for implementation and signoff. About The Job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google Silicon team develops custom silicon solutions that provide differentiated user experiences in Google hardware products and optimize performance and power for the use cases. This includes SoCs and other mixed signal, logic, and sensor integrated circuits for our product portfolio. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Work with Post-Si teams to improve and debug Vmin and yield related issues. Explore and specify new custom circuit opportunities for optimized Power Performance Area (PPA) for high-performance, low-power subsystems. Work with the testchip teams on latest process nodes to build, validate and characterize custom IPs. Build automation for circuit design simulation and analysis. Work with cross-functional teams on circuit design, physical design and sign-off methodology teams. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form . Show more Show less

Project Role : Business Function Implement Practitioner Project Role Description : Support the implementation of activities for a specific business function to improve performance for a function end to end. Activities include analyzing and designing/re-designing business processes and/or defining parts of an organization. Must have skills : SAP S/4HANA for Pharmaceuticals Good to have skills : NAMinimum 12 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Business Function Implement Practitioner, you will support the implementation of activities for a specific business function to improve performance end to end. This involves analyzing and designing/re-designing business processes and defining parts of an organization. Roles & Responsibilities:- Expected to be an SME.- Collaborate and manage the team to perform.- Responsible for team decisions.- Engage with multiple teams and contribute on key decisions.- Expected to provide solutions to problems that apply across multiple teams.- Lead process improvement initiatives within the organization.- Develop and implement strategies to enhance business function performance. Professional & Technical Skills: - Must To Have Skills: Proficiency in SAP S/4HANA for Pharmaceuticals.- Strong understanding of pharmaceutical industry processes.- Experience in implementing SAP S/4HANA solutions for pharmaceutical companies.- Knowledge of regulatory requirements in the pharmaceutical sector.- Hands-on experience in business process analysis and optimization. Additional Information:- The candidate should have a minimum of 12 years of experience in SAP S/4HANA for Pharmaceuticals.- This position is based at our Gurugram office.- A 15 years full time education is required. Qualification 15 years full time education

Job Purpose To Manage Information Security activities and ITSM processes related to Airport IT Operations. To ensure Security, Quality and Compliance of Systems, Services , Processes . To ensure IT Process Alignment with Business and Stakeholder Requirements To manage Information Security activities and Information Technology Services processes governance relating to IT Operations to ensure confidentiality, integrity and availability of systems, services and associated information are in tune with business and stakeholders needs and adhering to regulatory & statutory requirements ORGANISATION CHART Key Accountabilities Reducing gap between current state and desired state to acceptable risks. Roll out corporate Initiatives as per corporate guidelines Propose, Review and Recommend cost-effective solutions Asset Classification Business Impact Assesments Threat and Vulnerability evalautions Risk Assesment and Risk Management Evaluate information security controls and countermeasures Integrate risk, threat and vulnerability identification and management into information management life cycle Identify and evaluate information security technologies, emerging trends Align information security architectures with changing business needs Develop information security standards, procedures and guidelines implement and communicate information security policies, standards, procedures and guidelines Design controls and review controls effectiveness KEY ACCOUNTABILITIES - Additional Details EXTERNAL INTERACTIONS External - Roles you need to interact with outside the organization to enable success in your day to day work Concessionaires/Regulatory Agencies /Airlines: Information Security Approvals for new service requests. Non-disclosure Agreements MDI Acceptance and awareness on Information Security Policy Regulatory and Legal Compliance Data privacy and Protections Incidents/Breaches Quality assurance Vendors Information Security Policy Compliance Physical and Environmental controls in use of facilities Review of Incidents/ Breaches Regulatory and Legal compliance Contracts and Procurement Info security guidelines Upgrades / Releases/Patches Security Bulletins Awareness and Training Vulnerability and Security Assessment tailored to business needs SLA Reviews Audits Event and log correlation Quality Assurance Implementation Partners: (Dubai Technology Partners, TCL, TTSL, BSNL, Pathfinder, IBM, KRONOS). Review for security policy compliance with Data and Privacy regulations Quality Assurance Implementation Partners: (Dubai Technology Partners, TCL, TTSL, BSNL, Pathfinder, IBM, KRONOS). Review for security policy compliance with Data and Privacy regulations Quality Assurance OEMs (UFIS, RESA, IER, SAFEGATE, BOSE, SIEMENS COMMUNICATION, SITA) : Performance Review SLA review Incidents and Problem review Legal and Regulatory compliance Security Policy compliance Quality Assurance INTERNAL INTERACTIONS Internal - Roles you need to interact with inside the organization to enable success in your day to day work Business units Aligning Business Requirements with security policy Awareness Programs Compliance and Regulatory Requirements Contractual requirements Human Resources Pre entry, entry and exit Physical and Environmental Requirements Business Continuity Tests Access Controls Quality Assurance Joint Venture Partners (HMACPL, HDFRL, NOVOTEL, FUEL FARM) : Security policy alignment with business requirements Security Awareness Regulatory and Legal compliance SLA Reviews Quality Assurance GHIAL employees Policy awareness Policies compliance Trainings Incident Reporting and Management Quality Assurance DIAL IT & Corporate IT: Share best practices CISO: Ensure corporate requirements are rolled out to business unit-GHIAL Review technological and business unit security requirements Quality Assurance FINANCIAL DIMENSIONS OPEX AOP SIEM Log monitoring and Compliance Cost optimization and Revenue maximizations assurance activities Other Dimensions Team size: 1 Customers : 130 End users : 1000+ (staff across HIAL, GADL & Other companies inside the campus using IT services) Education Qualifications Required B.E (Computers / Electronics /IT) Required Postgraduate in computer/ IT Required CRISC (Certified in Risk and Information Systems Control) / or CISA/ or CISM Desirable MBA Relevant Experience Minimum 9-11 Years in IT with at least 8 Years in Information security, quality and assurance functions COMPETENCIES Personal Effectiveness Social Awareness Entrepreneurship Problem Solving & Analytical Thinking Planning & Decision Making Capability Building Strategic Orientation Stakeholder Focus Networking Execution & Results Teamwork & Interpersonal influence Show more Show less

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! We are now looking for highly driven and innovative ASIC / Hardware Engineers. We are looking for bright engineers across our hardware engineering groups to help us Architect, Design and verify our next generation GPUs, CPU and SoCs meant to accelerate the performance of Data Center, Machine Learning, Autonomous Driving, Ray Tracing and many more exciting applications. You will get to work on high performance GPU / SOC/ CPU across Memory sub-systems, Graphic processing units, NOC based Interconnect Fabric, High speed IO's etc. What You'll Be Doing Work on hardware models of different levels of extraction, including performance models, RTL test benches and emulators to find performance bottlenecks in the system. Work closely with the architecture and design teams to explore architecture trade-offs related to system performance, area, and power consumption. Understand key performance use cases or the product. Develop workloads and test suites targeting graphics, machine learning, automotive, video, compute vision applications running on our products. You will be responsible to make architectural trade-offs based on feature/performance/power requirements, analyse system implications, come up with the micro-architecture, implement RTL, drive the verification, close timing, and support silicon validation. Developing test plans, tests and verification infrastructure for complex IP's/sub-system/SOC's. Creating verification environment using UVM methodology and reusable bus functional models, monitors, checkers and scoreboards. Driving functional coverage driven verification closure. Develop and enhance timing analysis/signoff work-flow from frontend (pre-layout) to backend (post-layout) at both chip and block level. Develop custom timing scripts using tcl/primetime for clock skew analysis, special circuits such as clock dividers, core logic IO macros interfaces such as PCI-E, Frame-Buffer/Memory, HDMI, etc. Chip level Integration, physically partitioning and floor planning along with Physical Verification and EM IR Drop You will be responsible for the design and implementation of state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression. In addition, you will help develop and deploy DFT methodologies for our next generation products. Be apart of innovation to strive improve the quality of DFT methods. Work with architects, designers and post-silicon teams. What We Need To See BTech/MTech with 2+ years of experience in micro-architecture, RTL development of complex designs. Possess strong digital design fundamentals. Preferably have a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor planning, ECO, bring up and lab debug is a prerequisite for this role. If you have experience in at least a few of the following skills, we will have an excellent match for our needs: GPU / CPU / SOC Performance verification and analysis. CPU, Memory controller, Bus Interconnect, Cache coherency IP / SOC Design, Micro-architecture across High Speed IO controller (UFS/PCIE/ XUSB), Network on Chip / 10G Ethernet MAC and (or) Switch IP / SOC Graphics Processing Unit (GPU Design & Verification) BOOT and Power management features for complex SOC’s FPGA Prototype with prior experience in HAP Good debugging and analytical skills. Good interpersonal skills and ability to work as an excellent teammate Excellent communication skills to collaborate with cross-cultural teams and work in a matrix organization With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you're creative and independent, with a genuine real passion for technology, we want to hear from you. JR1978791 Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. Job Summary VPM is a sign-off tool for Low Power Design and Verification in custom mixed-signal IP designs. As a part of the VPM R&D team, you will be responsible for the design, development and maintenance of the cutting-edge products and features for low power design and verification in custom mixed-signal designs. You will be required to apply your software development, data structures and algorithms, skills along with the key concepts of the low power circuit design and verification to write and update, performance efficient code in C++ and Tcl programming languages, debug and fix code issues and develop and maintain unit and feature tests to test the software. The development environment is Linux so familiarity with Linux operating system, and commands, concepts of make file, UNIX shell scripting is also needed. The position also requires creating and reviewing functional specification for new VPM features using Microsoft Office Suite tools. You should be a team player willing to works with other members of the team as well and share your knowledge and learn from others. Knowledge of Low power designs and/or prior experience in EDA tool, QT, GUI and Tcl development would be a plus. Job Responsibilities Responsible for applying software development, data structures and algorithms, skills along with the key concepts of the low power circuit design and verification to design, develop, troubleshoot, and debug start-of-the-art software programs in C/C++/Tcl programming languages and shell scripting in Linux Operating system based development environment Create and review functional specification for new products and features using Microsoft Office Suite or equivalent tools Develop and maintain unit and feature tests to test the software. Improve stability, debug capabilities of the software Work independently and efficiently Works with other members of the team as well and share your knowledge and learn from others Continuously scale solutions (runtime, memory, number of CPUs etc.) to take care of next-generation larger designs Engage with customers as needed and help in creative solutions Qualifications BE/BTech/ME/MS/MTech in Computer Science Engineering or Electrical Engineering or Electronics Engineering Experience And Technical Skills Required Experience required : 2-4yrs Candidate must have experience of complex software development and maintenance using C/C++ Strong background in Software data structures and algorithms Must have excellent debugging skills and ability to separate out the critical issues from trivial ones. Familiarity with following is needed UNIX/Linux development environment, shell scripting, GNU gcc/g++ compilers, linters, linkers, make-file concepts debugging tools like GDB, DDD, or latest IDE, etc. Software memory and run time profiling tools, like valgrind, Kcachegrind, etc., Static analysis tools like ASAN, Parasoft, ASAN, Microsoft Office Suite Experience in one or more of the following flows areas is a big plus: Custom Analog Design and Verification Low power design and Verification in custom mixed signal designs Knowledge of Low Power Specification formats like IEEE1801 (UPF), Liberty, Common Power Format, etc. Digital Implementation flow on advanced nodes EDA tool development Knowledge of QT, GUI and Tcl development Knowledge of scripting languages & Flow development Behavioral Skills Required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore what’s possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity We’re doing work that matters. Help us solve what others can’t. Show more Show less

This role is for one of Weekday's clients Min Experience: 8 years JobType: full-time Requirements About the Role: We are looking for a seasoned Logic Design Engineer with expertise in microarchitecture , RISC-V , VLSI , and VHDL , to lead the design and development of the L2 and Last Level Cache (LLC) for high-performance processor systems. This role is critical in delivering industry-leading CPU performance and efficiency by owning the complete lifecycle of cache architecture — from concept to pre-silicon signoff. As a technical leader in the team, you will be responsible for developing the microarchitecture of the cache subsystem, defining the RTL design, and collaborating across cross-functional teams including verification, DFT, physical design, and software/firmware groups to deliver world-class silicon. Key Responsibilities: Architect and design the L2 and LLC blocks for next-generation high-performance RISC-V processor systems. Translate system-level performance requirements — including capacity, latency, bandwidth, and RAS — into efficient, scalable cache architecture and microarchitecture solutions. Drive high-level feature definition and propose architectural enhancements in high-level design discussions. Develop detailed microarchitecture specifications and implement robust RTL designs in VHDL, ensuring performance, area, and power efficiency. Collaborate with the verification team to define verification plans, support testbench development, and debug RTL issues. Interface with DFT and physical design teams to integrate and optimize the cache subsystem for manufacturability and silicon readiness. Engage with firmware and software teams to support system bring-up and low-level programming interface development. Own pre-silicon signoff of the cache subsystem, meeting all functional, timing, and quality goals before tape-out. Continuously analyze performance metrics and identify areas of microarchitecture and logic improvements. Mentor junior engineers, contribute to design reviews, and participate in architecture working groups. Required Skills and Qualifications: 8+ years of experience in logic design and microarchitecture in high-performance CPU or SoC development. Deep expertise in microarchitecture and design of cache systems, memory hierarchies, or complex compute subsystems. Proven experience with RISC-V or RISC-based processor architectures and SoC integration. Proficient in RTL design using VHDL (Verilog/SystemVerilog is a plus). Solid knowledge of VLSI design principles, synthesis, STA, linting, and clock-domain crossing. Strong understanding of SoC design workflows and cache coherency, ECC/parity, and performance optimization techniques. Familiarity with performance modeling, cache hierarchy tradeoffs, and CPU-SoC system design. Excellent communication and collaboration skills to effectively interface with architecture, verification, physical design, and software teams. Preferred Qualifications: Experience with RISC-V core or cache subsystem development in commercial or open-source environments. Familiarity with scripting tools like Python, Perl, or Tcl for design automation and verification. Exposure to tools like Synopsys Design Compiler, VCS, or Cadence Genus and Innovus. Show more Show less

At F5, we strive to bring a better digital world to life. Our teams empower organizations across the globe to create, secure, and run applications that enhance how we experience our evolving digital world. We are passionate about cybersecurity, from protecting consumers from fraud to enabling companies to focus on innovation. Everything we do centers around people. That means we obsess over how to make the lives of our customers, and their customers, better. And it means we prioritize a diverse F5 community where each individual can thrive. Role Overview: The Network Support Engineer (NSE) is an experienced technical support professional who provides remote assistance on F5 solutions to customers and partners. They manage multiple complex cases, analyze network environments, and apply sound judgment within defined procedures to resolve issues and ensure customer satisfaction. NSE work independently, follow scheduled shifts, and use various troubleshooting tools. They maintain strong relationships with internal teams and external clients, communicate effectively, and take full ownership of cases until resolution. This role will be based in Hyderabad . Sounds interesting? Read on! What you will do: Demonstrates good judgement to select the best methods and techniques to provide a diverse scope of technical support (Level 1 to Level 3) to troubleshoot and resolve hardware and software issues on F5 product and services, based on data analysis of a complex set of customer specific factors. Proactively and effectively communicates status, plan-of-action, and resolution of issues based on an ISO Quality Management System defined set of procedures. Provides F5 customers and partners with a consistently high-quality support experience Participates in on-going training with F5 products and related technologies Maintains high schedule adherence (work hours and on-phone time) Effectively manages case escalations to tier 3 (Engineering Services) while maintaining customer communication, with limited assistance/mentoring from senior support personnel or management Manages multiple routine cases and prioritizes based upon customer and business needs Performs additional projects as required Responsible for upholding F5’s Business Code of Ethics and promptly reporting violations of the code or other company policies. What you will bring: 5 years' experience in a professional technical support role or equivalent experience, working with relevant technologies Bachelors BA/BS, Honors, Graduate Certificate preferred. Certification to 201 level certification is expected to be achieved at NSE II level in their core module area of expertise. Level 301 certification is preferred but not expected. Excellent customer service skills together with experience supporting corporate customers and service providers in production environments. Key areas of knowledge – Protocols, Linux, Networking, Popular Public Cloud Vendors, containerization, Experience with AI technology. Thorough understanding and experience with HTTP and web applications and Hands-on technical experience preferred with inter-networking/data center operations. Network: OSI Model, Network & routing protocols, WAN operations Security: SSL, Cryptography, Firewall, VPN, DDoS & experience in network security exposure. Familiarity with Windows, MacOS, working knowledge of UNIX/Linux operating systems and commands Proficiency in cloud platforms such as AWS, Azure, or Google Cloud. Experience with containerization and orchestration technologies such as K8s and Docker. Experience with VMware, KVM or equivalent hypervisors. Experience with Salesforce service CRM system. API knowledge, Basic Programming/Scripting skills (Python, tcl, bash, JavaScript) Experience interacting with AI and prompting for questions. What You’ll Get: Hybrid working mode Career growth and development opportunities Recognitions and Rewards Employee Assistance Program Competitive pay, comprehensive benefits, and cool perks Culture of Giving Back Dynamic Diversity & Inclusion Interest Groups Apply if you believe your own unique capabilities can contribute to the success of this role and our organization! The Job Description is intended to be a general representation of the responsibilities and requirements of the job. However, the description may not be all-inclusive, and responsibilities and requirements are subject to change. Please note that F5 only contacts candidates through F5 email address (ending with @f5.com) or auto email notification from Workday (ending with f5.com or @myworkday.com) . Equal Employment Opportunity It is the policy of F5 to provide equal employment opportunities to all employees and employment applicants without regard to unlawful considerations of race, religion, color, national origin, sex, sexual orientation, gender identity or expression, age, sensory, physical, or mental disability, marital status, veteran or military status, genetic information, or any other classification protected by applicable local, state, or federal laws. This policy applies to all aspects of employment, including, but not limited to, hiring, job assignment, compensation, promotion, benefits, training, discipline, and termination. F5 offers a variety of reasonable accommodations for candidates. Requesting an accommodation is completely voluntary. F5 will assess the need for accommodations in the application process separately from those that may be needed to perform the job. Request by contacting accommodations@f5.com. Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life. Join an inclusive team focused on one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solution we create help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while contributing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. Job Description: As a CAD Applications Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, improving EDA and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for STA Analysis. You will work closely with the Design teams to increase their productivity and work efficiency. Responsibilities and Tasks include, but not limited to: Deliver methodology and tool solutions for static timing closure and power optimization . Deploy innovative modeling and optimization approaches to achieve globally optimal targets .Prudently apply best-in-class algorithms and ECO techniques for value-adding design solutions . Pursue deep analysis of timing paths and power inefficiencies to isolate key issues . Implement code infrastructure to facilitate analytics and visualization . Collaborate with silicon design, CAD, and EDA partners to identify flow deficiencies and enact creative remedies Qualifications: Typically requires 10+ years of hands on experience in static timing analysis and/or design optimization flows. Familiar with STA of large high-performance in Memory technologies Strong analytical skills and ability to identify high ROI opportunities. Proven software engineering background and experience with C++, Python, Tcl programming languages. Solid understanding of cross-talk, variation, and margining. Good communicator who can accurately assess, describe issues to management and follow solutions through to completion. Familiarity with timing and power ECO techniques and implementation is a plus Familiarity with TSMC based designs will be an added plus Leading IP delivery project will be a additional plus About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. CAD Staff Engineer Our vision is to transform how the world uses information to enrich life. Join an inclusive team focused on one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we create helps make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while contributing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. Job Description: As a CAD Staff Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, improving EDA and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for the physical layout, verification and design of CMOS integrated circuits. You will work closely with the Layout design teams to increase their productivity and work efficiency. Responsibilities and Tasks include, but not limited to: Work closely with memory layout teams and solve their daily challenges and provide complete solutions for the future. Proactively identify problem areas for improvement, propose, and develop innovative solutions. Develop methodologies for highly reliable layout with faster Time to Market approach. Continuously evaluate and implement new tools and technologies to improve the current layout development flows. Provide guidance and mentorship to junior members of the team. Qualifications: 8+ years of experience in Layout automation, Physical Verification, or related domains. Experience in customizing a design environment, automation methodologies and utilities to increase memory layout productivity. Working experience in Place and Router flows for custom memory layouts with industry standard tools like Cadence Virtuoso, Synopsys Custom Compiler, Pulsic Unity, Itools etc. Working experience in PDN analysis tools like Totem/VoltusXFA/XA is preferable. Working experience of Physical Verification flow and analyzing/debugging DRC, ERC, LVS, DFM, Antenna Calibre/ICV rule deck issues is plus. Good understanding of advanced CMOS process manufacturing and layout design rules, EMIR, RC-Extraction, ESD, and Latch-up. Good understanding of programming fundamentals, as well as exposure to various programming languages including Skill (Cadence), Perl, Python, Tcl. Working knowledge of Linux is a must. Excellent problem-solving skills with attention to detail. Ability to work in a dynamic environment. Proficiency in working effectively with global teams and stakeholders. Education: A bachelor’s or a master’s degree in Electronics, Electrical or Computer Engineering. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization. Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions. Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus Good understanding of clocking architecture. Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Good knowledge of Tcl/Perl Scripting Strong problem-solving skills and good communication skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 1-3 yrs years of experience in Physical Design/Implementation Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Responsibilities STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools for methodology development. Good Technical writing and Communication skills, should be willing to work in cross-collaborative environment Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus Familiar with process technology enablement: Circuit simulations using Hspice/FineSim, Monte Carlo. Education : B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI. Preferred Qualification/Skills Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling Hands-on experience with STA tools - Prime-time, Tempus Have experience in driving timing convergence at Chip-level and Hard-Macro level In-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus) Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation. Proficient is scripting languages – TCL, Perl, Awk Basic knowledge of device physics Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3072172 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Job Role Work on Logic & Physical aware Synthesis with Low Power, QoR optimization, STA and Netlist Signoff flows. Work on Logic equivalence check and low power check clean up. Work on constraints development by interacting with designers and help in porting constraints from block to top-level. Should be able to handle multiple projects by leading a team of 3 to 5 members and deliver. Should be able to lead implementation flow development effort independently by working closely with design team and EDA vendors. Should be able to drive new tool evaluation, methodology refinement for PPA optimization. Should be sincere, dedicated and willing to take up new challenges. Skill Set Proficiency in Python/Tcl. Familiar with Synthesis & STA tools (Fusion Compiler/Genus, Primetime/Tempus). Fair knowledge in LEC, LP signoff tools. Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering practices like Version Control, Configuration Management. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3074218 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Qualcomm Chennai is looking for a VLSI engineers who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skills 2-4 yrs experience Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Bachelors / Masters degree in electrical or electronics engineering with 2 - 4 yrs of experience is preferred Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3071544 Show more Show less

Responsibilities: Assist in the development and validation of PDKs for various process nodes. Support the integration of technology files, DRC/LVS decks, and device models into EDA tools (e.g., Cadence, Synopsys). Write and maintain automation scripts (e.g., Python, TCL, Shell) to streamline PDK development processes. Collaborate with layout, design, and modeling teams to ensure PDK accuracy and usability. Troubleshoot and fix issues in PDK components related to DRC, LVS, parasitic extraction, and schematic symbols. Document PDK features, known issues, and development changes. Show more Show less

🚀 About the Role ExcelR is seeking an experienced and passionate Freelance Trainer for our comprehensive Full Stack Web Development Program . You will train aspiring developers through a 50-day structured curriculum Offline at College Campus focused on real-world application development and end-to-end deployment. 🧑‍💻 What You’ll Teach (Curriculum Overview) ✅ Frontend Development (40 Days) HTML5: Text, Media, Forms, Tables, Semantic Tags, Meta Tags CSS3: Box Model, Flexbox, CSS Grid, Responsive Design, Pseudo-classes, Transitions JavaScript (ES6+) ReactJS: JSX, Components, State, Props, useEffect, useRef, useMemo, Forms, Routing Bootstrap Mini Projects & CRUD App Frontend Deployment & Interview Prep ✅ Backend Development Django FastAPI Node.js & Express.js REST API design and integration ✅ Database Skills (10 Days) MySQL SQL Queries, Joins, Aggregations DDL, DML, TCL Commands Analytical/Window Functions 📌 Requirements Proven experience as a Full Stack Developer or Trainer Hands-on expertise with HTML, CSS, JS, React, Django/FastAPI/Node.js Strong SQL skills (MySQL) Prior teaching/training/mentoring experience preferred Excellent communication and presentation skills Ability to explain complex topics to beginners effectively Comfortable using Zoom, Google Meet, or Microsoft Teams 🎯 Preferred Qualifications B.Tech/B.E ,M.Tech/M.E in Computer Science Engineering Field. 5+ Years Experience delivering training in bootcamp or corporate environments Familiarity with online learning tools and live coding sessions Show more Show less